JP2002333464A5 - - Google Patents

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Publication number
JP2002333464A5
JP2002333464A5 JP2002092565A JP2002092565A JP2002333464A5 JP 2002333464 A5 JP2002333464 A5 JP 2002333464A5 JP 2002092565 A JP2002092565 A JP 2002092565A JP 2002092565 A JP2002092565 A JP 2002092565A JP 2002333464 A5 JP2002333464 A5 JP 2002333464A5
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JP
Japan
Prior art keywords
buffer
dut
test apparatus
clock signal
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002092565A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002333464A (ja
Filing date
Publication date
Priority claimed from EP01108250A external-priority patent/EP1164700B1/en
Application filed filed Critical
Publication of JP2002333464A publication Critical patent/JP2002333464A/ja
Publication of JP2002333464A5 publication Critical patent/JP2002333464A5/ja
Pending legal-status Critical Current

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JP2002092565A 2001-03-31 2002-03-28 試験装置 Pending JP2002333464A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP01108250.0 2001-03-30
EP01108250A EP1164700B1 (en) 2001-03-31 2001-03-31 Data flow synchronization

Publications (2)

Publication Number Publication Date
JP2002333464A JP2002333464A (ja) 2002-11-22
JP2002333464A5 true JP2002333464A5 (enExample) 2005-09-08

Family

ID=8177015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002092565A Pending JP2002333464A (ja) 2001-03-31 2002-03-28 試験装置

Country Status (4)

Country Link
US (1) US20020141525A1 (enExample)
EP (1) EP1164700B1 (enExample)
JP (1) JP2002333464A (enExample)
DE (1) DE60100060T2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7689739B2 (en) * 2005-07-11 2010-03-30 Via Technologies, Inc. Spread spectrum receiver, apparatus and method of a circular buffer for multirate data
US8775701B1 (en) * 2007-02-28 2014-07-08 Altera Corporation Method and apparatus for source-synchronous capture using a first-in-first-out unit
US9449032B2 (en) * 2013-04-22 2016-09-20 Sap Se Multi-buffering system supporting read/write access to different data source type
WO2016166780A1 (ja) * 2015-04-16 2016-10-20 ルネサスエレクトロニクス株式会社 半導体装置及びスキャンテスト方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS647400A (en) * 1987-06-29 1989-01-11 Hitachi Ltd Ic tester
US5323426A (en) * 1992-02-21 1994-06-21 Apple Computer, Inc. Elasticity buffer for data/clock synchronization
US5867672A (en) * 1996-05-21 1999-02-02 Integrated Device Technology, Inc. Triple-bus FIFO buffers that can be chained together to increase buffer depth
US6055285A (en) * 1997-11-17 2000-04-25 Qlogic Corporation Synchronization circuit for transferring pointer between two asynchronous circuits
US6073264A (en) * 1998-04-02 2000-06-06 Intel Corporation Debug vector launch tool
US6324664B1 (en) * 1999-01-27 2001-11-27 Raytheon Company Means for testing dynamic integrated circuits

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