JP2001067867A5 - - Google Patents
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- JP2001067867A5 JP2001067867A5 JP1999245053A JP24505399A JP2001067867A5 JP 2001067867 A5 JP2001067867 A5 JP 2001067867A5 JP 1999245053 A JP1999245053 A JP 1999245053A JP 24505399 A JP24505399 A JP 24505399A JP 2001067867 A5 JP2001067867 A5 JP 2001067867A5
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- command
- bank
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004044 response Effects 0.000 description 16
- 230000004913 activation Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 5
- 235000010205 Cola acuminata Nutrition 0.000 description 2
- 244000228088 Cola acuminata Species 0.000 description 2
- 235000015438 Cola nitida Nutrition 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 101000613347 Homo sapiens Polycomb group RING finger protein 3 Proteins 0.000 description 1
- 102100040920 Polycomb group RING finger protein 3 Human genes 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Images
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24505399A JP2001067867A (ja) | 1999-08-31 | 1999-08-31 | 半導体記憶装置 |
| US09/539,893 US6262931B1 (en) | 1999-08-31 | 2000-03-31 | Semiconductor memory device having voltage down convertor reducing current consumption |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24505399A JP2001067867A (ja) | 1999-08-31 | 1999-08-31 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001067867A JP2001067867A (ja) | 2001-03-16 |
| JP2001067867A5 true JP2001067867A5 (https=) | 2006-08-10 |
Family
ID=17127890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24505399A Pending JP2001067867A (ja) | 1999-08-31 | 1999-08-31 | 半導体記憶装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6262931B1 (https=) |
| JP (1) | JP2001067867A (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3535788B2 (ja) * | 1999-12-27 | 2004-06-07 | Necエレクトロニクス株式会社 | 半導体記憶装置 |
| JP3874247B2 (ja) * | 2001-12-25 | 2007-01-31 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| KR100532456B1 (ko) * | 2003-07-30 | 2005-11-30 | 삼성전자주식회사 | 메모리 컨트롤러 및 상기 메모리 컨트롤러를 구비하는반도체 장치 |
| KR100689817B1 (ko) * | 2004-11-05 | 2007-03-08 | 삼성전자주식회사 | 전압 발생 회로 및 이 회로를 구비하는 반도체 메모리 장치 |
| JP5261888B2 (ja) * | 2006-05-18 | 2013-08-14 | 富士通セミコンダクター株式会社 | 半導体記憶装置 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07113863B2 (ja) | 1985-06-29 | 1995-12-06 | 株式会社東芝 | 半導体集積回路装置 |
| JP2945508B2 (ja) | 1991-06-20 | 1999-09-06 | 三菱電機株式会社 | 半導体装置 |
| JPH09167488A (ja) * | 1995-12-18 | 1997-06-24 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JPH11250665A (ja) * | 1998-03-04 | 1999-09-17 | Mitsubishi Electric Corp | 半導体集積回路 |
-
1999
- 1999-08-31 JP JP24505399A patent/JP2001067867A/ja active Pending
-
2000
- 2000-03-31 US US09/539,893 patent/US6262931B1/en not_active Expired - Lifetime
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