JP2000294715A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a technique for manufacturing a semiconductor device of a bottom face terminal type without any lead disconnected by a die, and also to obtain a semiconductor device of a bottom face terminal type which can improve its bonding strength upon mounting. SOLUTION: In the semiconductor device having leads 3 as external terminals of the semiconductor device exposed to a bottom surface of leads 3, the leads 3 exposed to the bottom surface are formed to be thin in a direction perpendicular to the bottom surface at their outer ends. The method for manufacturing the semiconductor device includes steps of providing a series of sets of leads 3 to be formed as parts of a plurality of semiconductor devices, using a lead frame having the leads 3 external ends of which to a sealed body 5 are provided with recesses at cut-off positions, mounting a semiconductor chip 1 onto the lead frame, electrically connecting the chip 1 and the leads 3 of the lead frame, sealing the chip 1 with resin, and separating the sealed body 5 and the leads 3 at the recesses of the leads 3 to obtain separated individual semiconductor devices.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a technology effective when applied to a bottom terminal type semiconductor device.

[0002]

2. Description of the Related Art Since a semiconductor device is relatively easy to manufacture and inexpensive, an SOP type semiconductor device is covered with a sealing body using a resin, and a lead extending from the sealing body is used as an external terminal. Alternatively, a semiconductor device such as an SOJ type is widely used. In an SOP type semiconductor device or an SOJ type semiconductor device, since a lead serving as an external terminal of the semiconductor device extends from a side surface of the sealing body, a connection region between the lead and the wiring board is formed around the semiconductor device in a mounted state. Therefore, the occupied area in the mounted state is larger than the occupied area of the semiconductor device itself. In order to reduce the size of the electronic device, there is a need to reduce the size of the connection region as well as the size of the semiconductor device itself. In addition, a lead frame is used for assembling such a semiconductor device. A semiconductor chip is fixed to a tab with a resin or silver paste, and a pad electrode and a lead of the semiconductor chip are connected by a bonding wire. After this bonding, the semiconductor chip, the tab, and the bonding wire are sealed with a sealing body made of, for example, an epoxy resin, the dam bar and the tie bar are cut, each lead is separated mechanically and electrically, and the separated lead is The semiconductor device is completed by molding into a shape. In the cutting of the dam bar and the tie bar,
Because it is required to cut fine leads accurately,
These cuts require a highly accurate mold. As the leads become finer, higher precision is required for such a mold, and an increase in the cost of the mold becomes a problem. Further, there is a problem that burrs generated by this cutting affect the formation of the outer lead. In addition, since the strength of the lead is reduced as the lead is miniaturized, the lead is easily deformed during storage or transfer after forming the lead, and the deformation of the lead may cause a mounting failure. These problems can be solved in a semiconductor device such as a PGA type or BGA type in which external terminals are arranged in a plane on the bottom surface, but it is difficult to apply to a semiconductor device having a relatively small number of pins from the viewpoint of cost and the like. For this purpose, a bottom terminal type semiconductor device has been considered in which a semiconductor chip to be mounted is resin-sealed with a sealing body, and leads are exposed at the outer peripheral portion of the bottom surface of the sealing body to serve as external terminals of the semiconductor device. . QFN (Quad Flat Nonleaf)
Semiconductor devices of the d) type or the SON (Small Outline Nonlead) type are known. Such a bottom terminal type semiconductor device is disclosed in, for example, JP-A-63-296252 or JP-A-9-162327.

[0003]

However, in the techniques disclosed in these publications, it is unnecessary to cut the dam bar located between the leads, but a die is still required to cut the ends of the leads. . In the cutting of the lead end, the lead is cut by shearing using a mold, so that a large force is applied to the joint surface between the lead and the sealing body, and the lead is separated from the sealing body by this force. There is. Also,
In the bottom terminal type semiconductor device disclosed in the above publication,
Since the solder at the connection portion is thinner than the connection using a protruding electrode, etc., when thermal stress occurs due to the difference in the coefficient of thermal expansion between the mounting board such as glass epoxy resin and the sealing resin of the semiconductor device. In some cases, cracks may occur at the joint between the mounting board and the lead. In order to solve this problem, for example, as disclosed in Japanese Patent Application Laid-Open No. 8-64745, a protrusion is provided at an end of a lead, and solder is filled in a hollow formed by the protrusion. It is considered that the thickness of the solder is secured. However, in the method disclosed in JP-A-8-64745,
A die is still required to form a projection at the end of the lead by cutting, and high precision is required for cutting to form a uniform projection. In addition, since the protrusion is located at the outer end, the solder connecting the lead and the board wiring is blocked by the protrusion, which causes a problem that it is difficult to visually confirm the state of the solder. An object of the present invention is to solve these problems and to provide a technique for manufacturing a semiconductor device without cutting with a mold. Another object of the present invention is to provide a bottom terminal type semiconductor device having improved bonding strength during mounting. The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0004]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, typical ones are briefly described as follows. In a semiconductor device in which a lead serving as an external terminal of a semiconductor device is exposed at a bottom surface of a sealing body, a lead exposed at the bottom surface is formed thin at an outer end thereof in a direction perpendicular to the bottom surface. Further, with respect to the manufacturing method, a set of leads to be a plurality of semiconductor devices is provided continuously,
A step of mounting a semiconductor chip on the lead frame using a lead frame provided with a concave portion at a cut portion located at the outer end of the sealing body of each lead, and electrically connecting the semiconductor chip and the lead of the lead frame And a step of sealing the semiconductor chip with a resin, and a step of separating the sealing body and the lead at the concave portion of the lead and dividing the semiconductor chip into respective semiconductor devices.

[0005]

Embodiments of the present invention will be described below. In all the drawings for describing the embodiments, components having the same functions are denoted by the same reference numerals, and repeated description thereof will be omitted. FIG. 1 is a bottom view showing a QFN type semiconductor device according to an embodiment of the present invention, and FIG. 2 is a longitudinal sectional view taken along line aa in FIG. In the semiconductor device of the present embodiment, a semiconductor chip 1 having a circuit formed by forming a predetermined element on a semiconductor substrate such as single crystal silicon
The semiconductor chip 1 is fixed to the tab 2 with a resin or silver paste, and the inner ends of the leads 3 are connected by bonding wires 4. The semiconductor chip 1, the tab 2, the upper and side surfaces of the leads 3, and the bonding wires 4 are sealed by a sealing body 5 using a sealing resin in which a filler is mixed into an epoxy resin, for example. The lower surface of the lead 3 is exposed at the bottom surface of the sealing body 5, and the outer end surface of the lead 3 is exposed at the side surface of the sealing body 5. The bottom exposed part of the lead 3
The exposed surface is inclined at the outer end, and the outer end surface of the lead 3 is formed thinner in the direction perpendicular to the bottom surface of the sealing body 5 due to the inclination. In such a bottom terminal type semiconductor device, a plurality of leads are provided on the bottom surface of a sealing body for sealing a semiconductor chip. Therefore, when the semiconductor device is mounted on a mounting board, a connection region is formed around the semiconductor device. Since there is no need to provide, there is an advantage that the occupied area of the semiconductor device in the mounted state is reduced, and the surrounding space can be used effectively.

FIG. 3 is a longitudinal sectional view showing a main part of an electronic device in which the semiconductor device shown in FIGS. 1 and 2 is mounted on a wiring board. The wiring board has a plurality of wiring layers formed on the surface and inside of a substrate 6 formed of an insulating material such as glass epoxy or mullite ceramic in a plate shape, and the wiring layer 7 formed on the uppermost layer is partially formed. Becomes the connection terminal 7a. The connection terminal 7a and the lead 3 as an external terminal of the semiconductor device are connected by a solder 8 as a bonding agent. Lead 3
Since the exposed surface is inclined at its outer end, the solder 8 is formed thicker at this outer end. For this reason, the connection strength in the mounted state can be improved by the thick solder 8 at the outer end. Further, since the outer end portion of the lead 3 is thin, the state of the solder 8 can be easily visually observed to see the state of adhesion of the solder 8.

Next, a method of manufacturing the semiconductor device according to the present embodiment will be described with reference to FIGS. The semiconductor device according to the present embodiment uses a lead frame in which a plurality of sets of tabs and leads used for individual semiconductor devices are formed continuously. As shown in FIG. A plurality of signal leads 3 are arranged around the entire periphery of the tab 2 on which the semiconductor chip 1 is mounted, which is made of an Fe-Ni-based alloy or a Cu-based alloy. Each lead 3 is integrated by a tie bar 9, and supports the tab 2 by a tab suspension lead 10 provided between the leads 3. A cut portion 3a of each lead 3 located at the end of the sealing body 5 is provided with a V-shaped groove. This groove is formed by etching or pressing. Then, the semiconductor chip 1 is fixed to the tab 2 of the lead frame with resin or silver paste, respectively, and the pad electrodes of the semiconductor chip 1 and the leads 3 are bonded to the bonding wires 4.
And the semiconductor chip 1 is mounted on a lead frame. This state is shown in FIG.

Next, the lead frame on which the semiconductor chip 1 is mounted is placed on a laminate sheet 11 or the like, the mold 12 is lowered, and the semiconductor chip 1, tab 2, lead 3, bonding The sealing body 5 is formed by housing the wire 4 and injecting a sealing resin. Lead 3
Is covered with the sheet 11 and is exposed to the bottom surface of the sealing body 5 without attaching the sealing resin.
The mold 12 and the upper surface of the lead 3 are not brought into close contact with each other, and a slight gap is provided. The gap and the space between the leads 3 serve as a resin flow path to an adjacent cavity. Therefore, it is possible to reduce the injection resistance as compared with the conventional resin injection using only the gate as the resin flow path. With this resin injection, the semiconductor chip 1, the tab 2, and the bonding wire 4 are sealed with a sealing body 5 made of, for example, epoxy resin while the bottom surface of the lead 3 is exposed, and the tie bar 9 is covered with the dummy cavity 13. Sealing body 5 and dummy cavity 13
A thin break portion 14 made of resin is formed between the mold 12 and the lead 3 by the gap between the mold 12 and the lead 3. The break portion 14 is provided with a groove corresponding to the cut portion 3a of the lead 3. FIG. 6 shows a vertical cross section before resin sealing, FIG. 7 shows a vertical cross section after resin sealing, and FIG. 8 shows a plan view.

Next, as shown in FIG. 9, the lead 3 is cut along with the break portion 14 of the sealing resin at the cut portion 3a by applying a mechanical bending stress to the cut portion using, for example, a roller. 3 is separated mechanically and electrically to complete each semiconductor device. When cutting the sealing resin, the stress is concentrated on the groove provided in the break portion 14, so that the cutting becomes easy. The cutting portion 3a of the lead 3 receives bending stress with the break portion 14 of the sealing resin as a fulcrum and is easily cut. Since a force is applied in the lateral direction when the lead 3 is cut, separation between the lead 3 and the sealing body 5 hardly occurs. It is to be noted that a dicing technique for separating a semiconductor chip from a wafer can be applied to this division. In the present embodiment, the sealing body 5 and the dummy cavities 13 have the same thickness. For this reason, force is evenly applied to the cut portion 3a of the lead 3 from both sides at the time of the above-mentioned division, and a good cut is performed. In addition, in the case where the dummy cavity 13 is not provided, in the case where a division failure occurs, all of the adjacent semiconductor devices become defective, but in the case where the dummy cavity 13 is provided, the occurrence of the defect occurs. The dummy cavity adjacent to the damaged semiconductor device is not damaged and does not affect other semiconductor devices. In addition,
As the grooves provided in the cutting portion 3a, in addition to the V shape, FIG.
(A), a rectangular shape as shown in (b) of the figure, or a combination of these shapes. In the manufacturing method of the present embodiment, by diverting the steps of the conventional resin-encapsulated semiconductor device,
A semiconductor device having a relatively small number of pins can be manufactured at low cost.

As described above, the invention made by the present inventor
Although a specific description has been given based on the above-described embodiment, the present invention is not limited to the above-described embodiment, and it is needless to say that various modifications can be made without departing from the gist of the invention. For example, in the above description, the case where the invention made by the present inventor is mainly applied to the QFN type semiconductor device, which is the application field as the background, has been described. However, the present invention is not limited to this. It can be widely applied to other types of bottom terminal type semiconductor devices.

[0011]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows. (1) According to the present invention, the lead exposed on the bottom surface is formed thin at the outer end thereof in the direction perpendicular to the bottom surface, so that the bonding strength at the time of mounting can be improved. is there. (2) According to the present invention, there is an effect that a semiconductor device can be manufactured without cutting by a die by cutting a lead by applying a force in the lateral direction. (3) According to the present invention, the effect (1) has an effect of improving the connection strength of the bottom terminal type semiconductor device in the mounted state. (4) According to the present invention, according to the effect (2), there is an effect that separation of the lead is prevented and the yield of the semiconductor device is improved.

[Brief description of the drawings]

FIG. 1 is a bottom view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a longitudinal sectional view taken along the line aa in FIG.

FIG. 3 is a longitudinal sectional view showing a mounting state of the semiconductor device shown in FIGS. 1 and 2;

FIG. 4 is a plan view showing a lead frame used in the present embodiment.

FIG. 5 is a plan view showing a semiconductor device according to an embodiment of the present invention for each manufacturing process.

FIG. 6 is a plan view showing a semiconductor device according to an embodiment of the present invention for each manufacturing process.

FIG. 7 is a longitudinal sectional view illustrating a semiconductor device according to an embodiment of the present invention for each manufacturing process.

FIG. 8 is a longitudinal sectional view showing a semiconductor device according to an embodiment of the present invention for each manufacturing process.

FIG. 9 is a plan view showing a semiconductor device according to an embodiment of the present invention for each manufacturing process.

FIG. 10 is a longitudinal sectional view showing a modification of the semiconductor device according to one embodiment of the present invention;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip, 2 ... Tab, 3 ... Lead, 3a ... Cut part, 4 ... Bonding wire, 5 ... Sealing body, 6 ... Base,
7: wiring layer, 8: solder, 9: tie bar, 10: tab suspension lead, 11: sheet, 12: mold, 13: dummy cavity, 14: break part.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Katsuo Arai, Inventor 5--20-1, Kamizuhoncho, Kodaira-shi, Tokyo Within the Semiconductor Group, Hitachi, Ltd. (72) Tadatoshi Tanno, Gojokamihoncho, Kodaira-shi, Tokyo No. 20-1, Hitachi Ltd. Semiconductor Group (72) Inventor Kazuo Shimizu 5-20-1, Kamimizu Honmachi, Kodaira-shi, Tokyo F-Terminology, Hitachi Semiconductor Group 4M109 AA01 BA01 CA21 FA02 5F067 AB03 AB04 BC07

Claims (8)

[Claims] 1. A semiconductor device in which a lead serving as an external terminal of a semiconductor device is exposed at a bottom surface of a sealing body, wherein the lead exposed at the bottom surface is formed thin at an outer end thereof in a direction perpendicular to the bottom surface. A semiconductor device characterized by being performed. 2. The semiconductor device according to claim 1, wherein an exposed surface of the lead is inclined at an outer end portion so as to be thin in a direction perpendicular to the bottom surface. 3. The semiconductor device according to claim 1, wherein the sealing body is formed vertically thin at an outer end thereof. 4. A method of manufacturing a semiconductor device in which leads serving as external terminals of a semiconductor device are exposed at a bottom surface of a sealing body, wherein a plurality of sets of leads serving as semiconductor devices are provided continuously, and each lead is sealed. A step of mounting a semiconductor chip on the lead frame using a lead frame provided with a concave portion at a cutting portion located at the outer end of the body, and electrically connecting the semiconductor chip and a lead of the lead frame; And a step of separating the sealing body and the lead at the concave portion of the lead and dividing the semiconductor body into respective semiconductor devices. 5. The semiconductor device according to claim 4, wherein the leads of each semiconductor device are integrated by a tie bar, and the tie bar is covered by a dummy cavity formed between cut portions of adjacent semiconductor devices. A method for manufacturing a semiconductor device. 6. The method for manufacturing a semiconductor device according to claim 4, wherein the sealing body and the lead are separated by bending stress. 7. The method of manufacturing a semiconductor device according to claim 4, wherein the recess of the lead is provided in a V-shape. 8. The sealing body according to claim 4, wherein the sealing body is formed by providing a concave portion in the sealing body of the cut portion.
13. The method for manufacturing a semiconductor device according to claim 1.