JP2000235791A - クロック同期遅延制御回路 - Google Patents

クロック同期遅延制御回路

Info

Publication number
JP2000235791A
JP2000235791A JP11035946A JP3594699A JP2000235791A JP 2000235791 A JP2000235791 A JP 2000235791A JP 11035946 A JP11035946 A JP 11035946A JP 3594699 A JP3594699 A JP 3594699A JP 2000235791 A JP2000235791 A JP 2000235791A
Authority
JP
Japan
Prior art keywords
delay
pulse
circuit
output
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11035946A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000235791A5 (OSRAM
Inventor
Koji Kato
光司 加藤
Masahiro Kamoshita
昌弘 鴨志田
Shigeo Oshima
成夫 大島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP11035946A priority Critical patent/JP2000235791A/ja
Priority to TW089102417A priority patent/TW459245B/zh
Priority to US09/503,000 priority patent/US6198690B1/en
Publication of JP2000235791A publication Critical patent/JP2000235791A/ja
Publication of JP2000235791A5 publication Critical patent/JP2000235791A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/225—Clock input buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP11035946A 1999-02-15 1999-02-15 クロック同期遅延制御回路 Pending JP2000235791A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP11035946A JP2000235791A (ja) 1999-02-15 1999-02-15 クロック同期遅延制御回路
TW089102417A TW459245B (en) 1999-02-15 2000-02-14 Clock synchronous delay control circuit
US09/503,000 US6198690B1 (en) 1999-02-15 2000-02-14 Clock control circuit with an input stop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11035946A JP2000235791A (ja) 1999-02-15 1999-02-15 クロック同期遅延制御回路

Publications (2)

Publication Number Publication Date
JP2000235791A true JP2000235791A (ja) 2000-08-29
JP2000235791A5 JP2000235791A5 (OSRAM) 2005-06-30

Family

ID=12456167

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11035946A Pending JP2000235791A (ja) 1999-02-15 1999-02-15 クロック同期遅延制御回路

Country Status (3)

Country Link
US (1) US6198690B1 (OSRAM)
JP (1) JP2000235791A (OSRAM)
TW (1) TW459245B (OSRAM)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000286386A (ja) * 1999-03-30 2000-10-13 Toshiba Corp クロック同期遅延制御回路
KR100326809B1 (ko) * 1999-04-09 2002-03-04 박종섭 딜레이 동기회로
US6323705B1 (en) * 2000-04-25 2001-11-27 Winbond Electronics Corporation Double cycle lock approach in delay lock loop circuit
KR100527402B1 (ko) * 2000-05-31 2005-11-15 주식회사 하이닉스반도체 디디알 동기식메모리의 지연고정루프 장치
JP4005779B2 (ja) * 2001-07-03 2007-11-14 株式会社東芝 クロック同期回路
JP3699920B2 (ja) * 2001-10-25 2005-09-28 株式会社東芝 遅延回路および同期型遅延装置
US6711092B1 (en) * 2002-04-30 2004-03-23 Virage Logic Corp. Semiconductor memory with multiple timing loops
US7095261B2 (en) 2004-05-05 2006-08-22 Micron Technology, Inc. Clock capture in clock synchronization circuitry
US7276946B2 (en) * 2004-07-16 2007-10-02 Micron Technology, Inc. Measure-controlled delay circuits with reduced phase error
JP2019053444A (ja) * 2017-09-13 2019-04-04 東芝メモリ株式会社 半導体集積回路及び半導体装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0558079B1 (en) * 1992-02-28 1998-04-15 Sony Corporation Semiconductor memory device with address transition detector
JP2771464B2 (ja) * 1994-09-29 1998-07-02 日本電気アイシーマイコンシステム株式会社 ディジタルｐｌｌ回路
US5870445A (en) 1995-12-27 1999-02-09 Raytheon Company Frequency independent clock synchronizer
JP3410922B2 (ja) * 1996-04-23 2003-05-26 株式会社東芝 クロック制御回路
US5923613A (en) 1998-03-18 1999-07-13 Etron Technology, Inc. Latched type clock synchronizer with additional 180°-phase shift clock

Also Published As

Publication number Publication date
US6198690B1 (en) 2001-03-06
TW459245B (en) 2001-10-11

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