JP2000223682A5 - - Google Patents

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Publication number
JP2000223682A5
JP2000223682A5 JP1999025483A JP2548399A JP2000223682A5 JP 2000223682 A5 JP2000223682 A5 JP 2000223682A5 JP 1999025483 A JP1999025483 A JP 1999025483A JP 2548399 A JP2548399 A JP 2548399A JP 2000223682 A5 JP2000223682 A5 JP 2000223682A5
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JP
Japan
Prior art keywords
substrate
layer
separation layer
transfer
transfer layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1999025483A
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English (en)
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JP2000223682A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP11025483A priority Critical patent/JP2000223682A/ja
Priority claimed from JP11025483A external-priority patent/JP2000223682A/ja
Priority to US09/495,646 priority patent/US6426270B1/en
Publication of JP2000223682A publication Critical patent/JP2000223682A/ja
Publication of JP2000223682A5 publication Critical patent/JP2000223682A5/ja
Pending legal-status Critical Current

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【特許請求の範囲】
【請求項】 分離層を有し、その上に移設層を有する基体の前記移設層の一部を他の物体に移設した後に残る利用済みの基体を処理する処理方法であって、
前記利用済みの基体に残留する移設層を除去する移設層除去工程実施し、
その後、前記利用済みの基体の表面に残留する前記分離用の層を除去する分離層除去工程を実施する、
ことを特徴とする処理方法。
【請求項】 半導体基板の製造方法であって、
分離層を有し、その上に、半導体層を含む移設層を有する第1の基板と別に用意した第2の基板とを貼り合わせて、貼り合わせ基板を作成する作成工程と、
前記貼り合わせ基板を主に前記分離層で分離することにより、前記移設層の一部の領域を第2の基板の表面に移設して、表面に移設層を有する半導体基板を作成する移設工程と、
前記移設工程の後の前記第1の基板に残留する移設層を除去する移設層除去工程と、
前記移設層除去工程の後の前記第1の基板の表面に残留する前記分離層を除去する分離層除去工程と、
を有し、前記分離層除去工程の後の前記第1の基板を前記作成工程において貼り合わせ基板を作成するための材料として再利用する一連の処理を実施しながら半導体基板を得ることを特徴とする半導体基板の製造方法。
JP11025483A 1999-02-02 1999-02-02 基体の処理方法及び半導体基板の製造方法 Pending JP2000223682A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP11025483A JP2000223682A (ja) 1999-02-02 1999-02-02 基体の処理方法及び半導体基板の製造方法
US09/495,646 US6426270B1 (en) 1999-02-02 2000-02-01 Substrate processing method and method of manufacturing semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11025483A JP2000223682A (ja) 1999-02-02 1999-02-02 基体の処理方法及び半導体基板の製造方法

Publications (2)

Publication Number Publication Date
JP2000223682A JP2000223682A (ja) 2000-08-11
JP2000223682A5 true JP2000223682A5 (ja) 2006-03-16

Family

ID=12167310

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JP11025483A Pending JP2000223682A (ja) 1999-02-02 1999-02-02 基体の処理方法及び半導体基板の製造方法

Country Status (2)

Country Link
US (1) US6426270B1 (ja)
JP (1) JP2000223682A (ja)

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US8318588B2 (en) 2009-08-25 2012-11-27 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate

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FR2817394B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
KR100456526B1 (ko) * 2001-05-22 2004-11-09 삼성전자주식회사 식각저지막을 갖는 에스오아이 기판, 그 제조방법, 그위에 제작된 에스오아이 집적회로 및 그것을 사용하여에스오아이 집적회로를 제조하는 방법
TWI233154B (en) * 2002-12-06 2005-05-21 Soitec Silicon On Insulator Method for recycling a substrate
FR2849715B1 (fr) * 2003-01-07 2007-03-09 Soitec Silicon On Insulator Recyclage d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince
FR2849714B1 (fr) * 2003-01-07 2007-03-09 Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince
ATE426918T1 (de) * 2003-01-07 2009-04-15 Soitec Silicon On Insulator Recycling eines wafers mit einer mehrschichtstruktur nach dem abnehmen einer dunnen schicht
EP1588415B1 (en) * 2003-01-07 2012-11-28 Soitec Recycling by mechanical means of a wafer comprising a taking-off structure after taking-off a thin layer thereof
US20090325362A1 (en) * 2003-01-07 2009-12-31 Nabil Chhaimi Method of recycling an epitaxied donor wafer
FR2855908B1 (fr) * 2003-06-06 2005-08-26 Soitec Silicon On Insulator Procede d'obtention d'une structure comprenant au moins un substrat et une couche ultramince
US8475693B2 (en) 2003-09-30 2013-07-02 Soitec Methods of making substrate structures having a weakened intermediate layer
FR2860249B1 (fr) * 2003-09-30 2005-12-09 Michel Bruel Procede de fabrication d'une structure en forme de plaque, en particulier en silicium, application de procede, et structure en forme de plaque, en particulier en silicium
JP2005173544A (ja) * 2003-11-19 2005-06-30 Seiko Epson Corp 液晶装置及び電子機器
US7402520B2 (en) * 2004-11-26 2008-07-22 Applied Materials, Inc. Edge removal of silicon-on-insulator transfer wafer
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TWI493609B (zh) * 2007-10-23 2015-07-21 Semiconductor Energy Lab 半導體基板、顯示面板及顯示裝置的製造方法
FR2929758B1 (fr) * 2008-04-07 2011-02-11 Commissariat Energie Atomique Procede de transfert a l'aide d'un substrat ferroelectrique
JP5449706B2 (ja) * 2008-06-16 2014-03-19 芝浦メカトロニクス株式会社 Soi基板の製造方法及び製造装置
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CN102460642A (zh) 2009-06-24 2012-05-16 株式会社半导体能源研究所 半导体衬底的再加工方法及soi衬底的制造方法
US8278187B2 (en) 2009-06-24 2012-10-02 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate by stepwise etching with at least two etching treatments
WO2011024619A1 (en) 2009-08-25 2011-03-03 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing soi substrate
JP5634210B2 (ja) * 2009-10-27 2014-12-03 株式会社半導体エネルギー研究所 半導体基板の作製方法
FR2953640B1 (fr) * 2009-12-04 2012-02-10 S O I Tec Silicon On Insulator Tech Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante
WO2011132284A1 (ja) * 2010-04-22 2011-10-27 富士通株式会社 半導体装置及びその製造方法、電源装置
US8196546B1 (en) * 2010-11-19 2012-06-12 Corning Incorporated Semiconductor structure made using improved multiple ion implantation process
US9123529B2 (en) 2011-06-21 2015-09-01 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
JP6130995B2 (ja) * 2012-02-20 2017-05-17 サンケン電気株式会社 エピタキシャル基板及び半導体装置
CN105144841B (zh) 2013-04-15 2017-11-17 株式会社半导体能源研究所 发光装置

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8318588B2 (en) 2009-08-25 2012-11-27 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
US8288245B2 (en) 2009-10-09 2012-10-16 Semiconductor Energy Laboratory Co., Ltd. Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of SOI substrate

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