FR2849714B1 - Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince - Google Patents

Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince

Info

Publication number
FR2849714B1
FR2849714B1 FR0300098A FR0300098A FR2849714B1 FR 2849714 B1 FR2849714 B1 FR 2849714B1 FR 0300098 A FR0300098 A FR 0300098A FR 0300098 A FR0300098 A FR 0300098A FR 2849714 B1 FR2849714 B1 FR 2849714B1
Authority
FR
France
Prior art keywords
recycling
sampling
plate
thin layer
multilayer structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0300098A
Other languages
English (en)
Other versions
FR2849714A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR0300098A priority Critical patent/FR2849714B1/fr
Application filed filed Critical
Priority to KR1020057012741A priority patent/KR100874788B1/ko
Priority to JP2006500315A priority patent/JP5047609B2/ja
Priority to CN200480001944A priority patent/CN100580903C/zh
Priority to EP04700490A priority patent/EP1588415B1/fr
Priority to PCT/IB2004/000285 priority patent/WO2004061943A1/fr
Priority to TW93100389A priority patent/TWI309858B/zh
Publication of FR2849714A1 publication Critical patent/FR2849714A1/fr
Priority to US11/075,323 priority patent/US7602046B2/en
Priority to US11/075,272 priority patent/US7375008B2/en
Application granted granted Critical
Publication of FR2849714B1 publication Critical patent/FR2849714B1/fr
Priority to US12/503,537 priority patent/US20090325362A1/en
Priority to US12/718,804 priority patent/US20100167500A1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
FR0300098A 2003-01-07 2003-01-07 Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince Expired - Lifetime FR2849714B1 (fr)

Priority Applications (11)

Application Number Priority Date Filing Date Title
FR0300098A FR2849714B1 (fr) 2003-01-07 2003-01-07 Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince
JP2006500315A JP5047609B2 (ja) 2003-01-07 2004-01-07 除去構造を含んでなるウェハーの、その薄層を除去した後の、機械的手段による循環使用
CN200480001944A CN100580903C (zh) 2003-01-07 2004-01-07 剥离有用层及重复利用施主晶片的方法、应用和相应晶片
EP04700490A EP1588415B1 (fr) 2003-01-07 2004-01-07 Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouche apres separation d'une couche mince de celle-ci
PCT/IB2004/000285 WO2004061943A1 (fr) 2003-01-07 2004-01-07 Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouche apres separation d'une couche mince de celle-ci
TW93100389A TWI309858B (en) 2003-01-07 2004-01-07 Recycling by mechanical means of a wafer comprising a multi-layer structure after taking-off a thin layer thereof
KR1020057012741A KR100874788B1 (ko) 2003-01-07 2004-01-07 박층 박리 후에 박리 구조를 포함하는 웨이퍼의 기계적수단에 의한 재활용 방법
US11/075,323 US7602046B2 (en) 2003-01-07 2005-03-07 Recycling by mechanical means of a wafer comprising a multilayer structure after taking-off a thin layer thereof
US11/075,272 US7375008B2 (en) 2003-01-07 2005-03-07 Recycling by mechanical means of a wafer comprising a multilayer structure after taking-off a thin layer thereof
US12/503,537 US20090325362A1 (en) 2003-01-07 2009-07-15 Method of recycling an epitaxied donor wafer
US12/718,804 US20100167500A1 (en) 2003-01-07 2010-03-05 Method of recycling an epitaxied donor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0300098A FR2849714B1 (fr) 2003-01-07 2003-01-07 Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince

Publications (2)

Publication Number Publication Date
FR2849714A1 FR2849714A1 (fr) 2004-07-09
FR2849714B1 true FR2849714B1 (fr) 2007-03-09

Family

ID=32524716

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0300098A Expired - Lifetime FR2849714B1 (fr) 2003-01-07 2003-01-07 Recyclage par des moyens mecaniques d'une plaquette comprenant une structure multicouches apres prelevement d'une couche mince

Country Status (3)

Country Link
CN (1) CN100580903C (fr)
FR (1) FR2849714B1 (fr)
TW (1) TWI309858B (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5884585B2 (ja) * 2012-03-21 2016-03-15 住友電気工業株式会社 炭化珪素半導体装置の製造方法
JP6237248B2 (ja) * 2014-01-15 2017-11-29 住友電気工業株式会社 炭化珪素単結晶の製造方法
CN105374664A (zh) * 2015-10-23 2016-03-02 中国科学院上海微系统与信息技术研究所 一种InP薄膜复合衬底的制备方法
CN109308992A (zh) * 2018-09-21 2019-02-05 苏州汉骅半导体有限公司 回收碳化硅衬底的方法
CN109270696B (zh) * 2018-11-08 2021-02-09 宁波维真显示科技股份有限公司 3d膜的制备方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2775121B1 (fr) * 1998-02-13 2000-05-05 Picogiga Sa Procede de fabrication de substrats en film mince de materiau semiconducteur, structures epitaxiales de materiau semiconducteur formees sur de tels substrats, et composants obtenus a partir de ces structures
JP2000223682A (ja) * 1999-02-02 2000-08-11 Canon Inc 基体の処理方法及び半導体基板の製造方法
FR2794893B1 (fr) * 1999-06-14 2001-09-14 France Telecom Procede de fabrication d'un substrat de silicium comportant une mince couche d'oxyde de silicium ensevelie
US6500732B1 (en) * 1999-08-10 2002-12-31 Silicon Genesis Corporation Cleaving process to fabricate multilayered substrates using low implantation doses
JP3943782B2 (ja) * 1999-11-29 2007-07-11 信越半導体株式会社 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ

Also Published As

Publication number Publication date
CN1723553A (zh) 2006-01-18
FR2849714A1 (fr) 2004-07-09
CN100580903C (zh) 2010-01-13
TW200425303A (en) 2004-11-16
TWI309858B (en) 2009-05-11

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