JP2000040721A - チップスケールパッケージのテスト方法 - Google Patents

チップスケールパッケージのテスト方法

Info

Publication number
JP2000040721A
JP2000040721A JP10206202A JP20620298A JP2000040721A JP 2000040721 A JP2000040721 A JP 2000040721A JP 10206202 A JP10206202 A JP 10206202A JP 20620298 A JP20620298 A JP 20620298A JP 2000040721 A JP2000040721 A JP 2000040721A
Authority
JP
Japan
Prior art keywords
test
chip
frame substrate
scale package
final shape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10206202A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000040721A5 (enExample
Inventor
Kunihiro Shigetomo
邦宏 重友
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10206202A priority Critical patent/JP2000040721A/ja
Publication of JP2000040721A publication Critical patent/JP2000040721A/ja
Publication of JP2000040721A5 publication Critical patent/JP2000040721A5/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP10206202A 1998-07-22 1998-07-22 チップスケールパッケージのテスト方法 Pending JP2000040721A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10206202A JP2000040721A (ja) 1998-07-22 1998-07-22 チップスケールパッケージのテスト方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10206202A JP2000040721A (ja) 1998-07-22 1998-07-22 チップスケールパッケージのテスト方法

Publications (2)

Publication Number Publication Date
JP2000040721A true JP2000040721A (ja) 2000-02-08
JP2000040721A5 JP2000040721A5 (enExample) 2005-10-27

Family

ID=16519488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10206202A Pending JP2000040721A (ja) 1998-07-22 1998-07-22 チップスケールパッケージのテスト方法

Country Status (1)

Country Link
JP (1) JP2000040721A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006038257A1 (ja) * 2004-09-30 2006-04-13 Renesas Technology Corp. 半導体装置の製造方法
CN100378966C (zh) * 2002-07-10 2008-04-02 三菱电机株式会社 半导体器件及其制造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100378966C (zh) * 2002-07-10 2008-04-02 三菱电机株式会社 半导体器件及其制造方法
WO2006038257A1 (ja) * 2004-09-30 2006-04-13 Renesas Technology Corp. 半導体装置の製造方法

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