JP2000040721A5 - - Google Patents
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- Publication number
- JP2000040721A5 JP2000040721A5 JP1998206202A JP20620298A JP2000040721A5 JP 2000040721 A5 JP2000040721 A5 JP 2000040721A5 JP 1998206202 A JP1998206202 A JP 1998206202A JP 20620298 A JP20620298 A JP 20620298A JP 2000040721 A5 JP2000040721 A5 JP 2000040721A5
- Authority
- JP
- Japan
- Prior art keywords
- contact
- frame substrate
- test
- positioning
- socket
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 description 64
- 239000000758 substrate Substances 0.000 description 52
- 238000012360 testing method Methods 0.000 description 51
- 229910000679 solder Inorganic materials 0.000 description 50
- 239000004065 semiconductor Substances 0.000 description 40
- 238000004519 manufacturing process Methods 0.000 description 33
- 230000008569 process Effects 0.000 description 27
- 238000010998 test method Methods 0.000 description 18
- 238000009413 insulation Methods 0.000 description 3
- 238000013404 process transfer Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10206202A JP2000040721A (ja) | 1998-07-22 | 1998-07-22 | チップスケールパッケージのテスト方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10206202A JP2000040721A (ja) | 1998-07-22 | 1998-07-22 | チップスケールパッケージのテスト方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000040721A JP2000040721A (ja) | 2000-02-08 |
| JP2000040721A5 true JP2000040721A5 (enExample) | 2005-10-27 |
Family
ID=16519488
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10206202A Pending JP2000040721A (ja) | 1998-07-22 | 1998-07-22 | チップスケールパッケージのテスト方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000040721A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4002143B2 (ja) * | 2002-07-10 | 2007-10-31 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| WO2006038257A1 (ja) * | 2004-09-30 | 2006-04-13 | Renesas Technology Corp. | 半導体装置の製造方法 |
-
1998
- 1998-07-22 JP JP10206202A patent/JP2000040721A/ja active Pending
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