ITRM910243A1 - Mezzi a ridondanza per un dispositivo di memoria a semiconduttori e relativo procedimento - Google Patents

Mezzi a ridondanza per un dispositivo di memoria a semiconduttori e relativo procedimento

Info

Publication number
ITRM910243A1
ITRM910243A1 IT000243A ITRM910243A ITRM910243A1 IT RM910243 A1 ITRM910243 A1 IT RM910243A1 IT 000243 A IT000243 A IT 000243A IT RM910243 A ITRM910243 A IT RM910243A IT RM910243 A1 ITRM910243 A1 IT RM910243A1
Authority
IT
Italy
Prior art keywords
redundant
cell array
signal
semiconductor memory
memory device
Prior art date
Application number
IT000243A
Other languages
English (en)
Inventor
Yong-Sik Seok
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITRM910243A0 publication Critical patent/ITRM910243A0/it
Publication of ITRM910243A1 publication Critical patent/ITRM910243A1/it
Application granted granted Critical
Publication of IT1244971B publication Critical patent/IT1244971B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder

Landscapes

  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Semiconductor Memories (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
ITRM910243A 1990-12-22 1991-04-10 Mezzi a ridondanza per un dispositivo di memoria a semiconduttori e relativo procedimento IT1244971B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900021502A KR940008208B1 (ko) 1990-12-22 1990-12-22 반도체 메모리장치의 리던던트 장치 및 방법

Publications (3)

Publication Number Publication Date
ITRM910243A0 ITRM910243A0 (it) 1991-04-10
ITRM910243A1 true ITRM910243A1 (it) 1992-10-10
IT1244971B IT1244971B (it) 1994-09-13

Family

ID=19308222

Family Applications (1)

Application Number Title Priority Date Filing Date
ITRM910243A IT1244971B (it) 1990-12-22 1991-04-10 Mezzi a ridondanza per un dispositivo di memoria a semiconduttori e relativo procedimento

Country Status (9)

Country Link
US (1) US5255234A (it)
JP (1) JPH076598A (it)
KR (1) KR940008208B1 (it)
CN (1) CN1023266C (it)
DE (1) DE4111708A1 (it)
FR (1) FR2670943B1 (it)
GB (1) GB2251101B (it)
IT (1) IT1244971B (it)
NL (1) NL9100620A (it)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950001837B1 (ko) * 1992-07-13 1995-03-03 삼성전자주식회사 퓨우즈 박스를 공유하는 로우 리던던시 회로
US5557618A (en) * 1993-01-19 1996-09-17 Tektronix, Inc. Signal sampling circuit with redundancy
JP3257860B2 (ja) * 1993-05-17 2002-02-18 株式会社日立製作所 半導体メモリ装置
JP3273440B2 (ja) * 1994-10-19 2002-04-08 マイクロン・テクノロジー・インコーポレーテッド 部分的に良好なメモリ集積回路から使用可能な部分を得るための効率的な方法
KR0140177B1 (ko) * 1994-12-29 1998-07-15 김광호 반도체메모리소자의 메모리셀어레이의 배열방법
JP3036411B2 (ja) * 1995-10-18 2000-04-24 日本電気株式会社 半導体記憶集積回路装置
US5946257A (en) * 1996-07-24 1999-08-31 Micron Technology, Inc. Selective power distribution circuit for an integrated circuit
US5970013A (en) * 1998-02-26 1999-10-19 Lucent Technologies Inc. Adaptive addressable circuit redundancy method and apparatus with broadcast write
US6011733A (en) * 1998-02-26 2000-01-04 Lucent Technologies Inc. Adaptive addressable circuit redundancy method and apparatus
US6438672B1 (en) 1999-06-03 2002-08-20 Agere Systems Guardian Corp. Memory aliasing method and apparatus
US6188624B1 (en) * 1999-07-12 2001-02-13 Winbond Electronics Corporation Low latency memory sensing circuits
US7095642B1 (en) * 2003-03-27 2006-08-22 Cypress Semiconductor Corporation Method and circuit for reducing defect current from array element failures in random access memories
EP1720172B1 (en) * 2004-02-20 2012-06-06 Spansion LLc Semiconductor storage device and redundancy control method for semiconductor storage device
WO2005081260A1 (ja) * 2004-02-20 2005-09-01 Spansion Llc 半導体記憶装置および半導体記憶装置の冗長方法
US8072834B2 (en) 2005-08-25 2011-12-06 Cypress Semiconductor Corporation Line driver circuit and method with standby mode of operation
JP4781783B2 (ja) * 2005-10-31 2011-09-28 エルピーダメモリ株式会社 半導体記憶装置
KR100675299B1 (ko) * 2006-02-15 2007-01-29 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 데이터 라이트 및 리드방법
US7505319B2 (en) * 2007-01-31 2009-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for high efficiency redundancy scheme for multi-segment SRAM
US20110134707A1 (en) * 2007-11-02 2011-06-09 Saeng Hwan Kim Block isolation control circuit
JP5539916B2 (ja) * 2011-03-04 2014-07-02 ルネサスエレクトロニクス株式会社 半導体装置
US9478316B1 (en) * 2016-01-08 2016-10-25 SK Hynix Inc. Memory device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228528B2 (en) * 1979-02-09 1992-10-06 Memory with redundant rows and columns
JPS563499A (en) * 1979-06-25 1981-01-14 Fujitsu Ltd Semiconductor memory device
US4281398A (en) * 1980-02-12 1981-07-28 Mostek Corporation Block redundancy for memory array
US4389715A (en) * 1980-10-06 1983-06-21 Inmos Corporation Redundancy scheme for a dynamic RAM
JPS6141186A (ja) * 1984-08-01 1986-02-27 松下電器産業株式会社 カラ−デ−タ同時書込み装置
IE58219B1 (en) * 1984-11-07 1993-08-11 Procter & Gamble Liquid detergent compositions
JPS6226695A (ja) * 1985-07-26 1987-02-04 Nec Corp 半導体メモリ
JP2590897B2 (ja) * 1987-07-20 1997-03-12 日本電気株式会社 半導体メモリ
JPH01119995A (ja) * 1987-11-02 1989-05-12 Toshiba Corp 半導体メモリ
US4807191A (en) * 1988-01-04 1989-02-21 Motorola, Inc. Redundancy for a block-architecture memory
US5022006A (en) * 1988-04-01 1991-06-04 International Business Machines Corporation Semiconductor memory having bit lines with isolation circuits connected between redundant and normal memory cells
FR2644924A1 (fr) * 1989-03-23 1990-09-28 Sgs Thomson Microelectronics Circuit de selection d'une colonne redondante dans une memoire integree avec redondance de colonnes de donnees

Also Published As

Publication number Publication date
GB2251101B (en) 1995-03-22
FR2670943B1 (fr) 1994-05-13
DE4111708C2 (it) 1993-04-22
KR940008208B1 (ko) 1994-09-08
GB2251101A (en) 1992-06-24
DE4111708A1 (de) 1992-07-02
JPH076598A (ja) 1995-01-10
KR920013470A (ko) 1992-07-29
GB9107618D0 (en) 1991-05-29
CN1062613A (zh) 1992-07-08
NL9100620A (nl) 1992-07-16
FR2670943A1 (fr) 1992-06-26
ITRM910243A0 (it) 1991-04-10
US5255234A (en) 1993-10-19
CN1023266C (zh) 1993-12-22
IT1244971B (it) 1994-09-13

Similar Documents

Publication Publication Date Title
ITRM910243A1 (it) Mezzi a ridondanza per un dispositivo di memoria a semiconduttori e relativo procedimento
JP3361825B2 (ja) メモリ・アレイ・アーキテクチャ
KR100575005B1 (ko) 공유된 오픈 비트라인 센스 앰프 구조를 갖는 메모리 장치
US6418067B1 (en) Semiconductor memory device suitable for merging with logic
US6707730B2 (en) Semiconductor memory device with efficient and reliable redundancy processing
US4800525A (en) Dual ended folded bit line arrangement and addressing scheme
TW374174B (en) Semiconductor memory device with flexible redundancy
ITMI922474A1 (it) Circuito di ridonanza di colonna per un dispositivo di memoria a semiconduttore.
KR940010353A (ko) 임의접근 기억장치
KR930006725A (ko) 반도체 기억장치
KR920018757A (ko) 메모리 셀 어레이 분할형 반도체 기억 장치
KR970022773A (ko) 다중 뱅크 메모리 설계 및 그를 이용한 시스템과 방법
KR950020732A (ko) 다이나믹 반도체 기억장치
KR100242998B1 (ko) 잡음특성을 개선한 셀 어레이 및 센스앰프의 구조
JPH10269766A (ja) 半導体記憶装置
KR920006983A (ko) 저잡음 감지 구조를 가진 반도체 메모리 장치
EP0457347B1 (en) Semiconductor memory device
TW333645B (en) The semiconductor memory device
US5375097A (en) Segmented bus architecture for improving speed in integrated circuit memories
JPH1173792A (ja) 半導体記憶装置
US5867433A (en) Semiconductor memory with a novel column decoder for selecting a redundant array
JPH05174597A (ja) 半導体記憶装置
KR950002042A (ko) 서로 분리된 제 1 및 제 2 입출력선 그룹을 가지는 다이나믹랜덤 엑세스 메모리장치
KR960008856A (ko) 용장회로를 갖는 반도체 기억장치
GB2259594A (en) On-chip semiconductor memory test apparatus

Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970328