IL160581A0 - Interposer, interposer package and device assembly employing the same - Google Patents

Interposer, interposer package and device assembly employing the same

Info

Publication number
IL160581A0
IL160581A0 IL16058104A IL16058104A IL160581A0 IL 160581 A0 IL160581 A0 IL 160581A0 IL 16058104 A IL16058104 A IL 16058104A IL 16058104 A IL16058104 A IL 16058104A IL 160581 A0 IL160581 A0 IL 160581A0
Authority
IL
Israel
Prior art keywords
interposer
same
device assembly
package
assembly employing
Prior art date
Application number
IL16058104A
Other languages
English (en)
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of IL160581A0 publication Critical patent/IL160581A0/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01068Erbium [Er]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/0781Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811Extrinsic, i.e. with electrical conductive fillers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12043Photo diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15174Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15182Fan-in arrangement of the internal vias
    • H01L2924/15184Fan-in arrangement of the internal vias in different layers of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
IL16058104A 2003-03-14 2004-02-26 Interposer, interposer package and device assembly employing the same IL160581A0 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/388,997 US6819001B2 (en) 2003-03-14 2003-03-14 Interposer, interposer package and device assembly employing the same

Publications (1)

Publication Number Publication Date
IL160581A0 true IL160581A0 (en) 2004-07-25

Family

ID=32962177

Family Applications (1)

Application Number Title Priority Date Filing Date
IL16058104A IL160581A0 (en) 2003-03-14 2004-02-26 Interposer, interposer package and device assembly employing the same

Country Status (6)

Country Link
US (1) US6819001B2 (ja)
JP (1) JP5568205B2 (ja)
CN (1) CN100454532C (ja)
DE (1) DE102004012595A1 (ja)
IL (1) IL160581A0 (ja)
NL (1) NL1025639C2 (ja)

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US7242073B2 (en) * 2003-12-23 2007-07-10 Intel Corporation Capacitor having an anodic metal oxide substrate
US7019346B2 (en) * 2003-12-23 2006-03-28 Intel Corporation Capacitor having an anodic metal oxide substrate
US20060091538A1 (en) * 2004-11-04 2006-05-04 Kabadi Ashok N Low profile and tight pad-pitch land-grid-array (LGA) socket
US7230334B2 (en) * 2004-11-12 2007-06-12 International Business Machines Corporation Semiconductor integrated circuit chip packages having integrated microchannel cooling modules
EP1838462B1 (en) * 2005-01-11 2018-08-08 Koninklijke Philips N.V. Redistribution interconnect for microbeamformer(s) and a medical ultrasound system
KR100652397B1 (ko) * 2005-01-17 2006-12-01 삼성전자주식회사 매개 인쇄회로기판을 사용하는 적층형 반도체 패키지
CN101193711B (zh) * 2005-06-07 2010-12-29 皇家飞利浦电子股份有限公司 用于超声传感器组件的多器件衬块
JP4507101B2 (ja) * 2005-06-30 2010-07-21 エルピーダメモリ株式会社 半導体記憶装置及びその製造方法
JP2007139912A (ja) * 2005-11-15 2007-06-07 Sharp Corp 駆動素子実装表示装置
JP4744360B2 (ja) * 2006-05-22 2011-08-10 富士通株式会社 半導体装置
TWI326908B (en) * 2006-09-11 2010-07-01 Ind Tech Res Inst Packaging structure and fabricating method thereof
US20080068815A1 (en) * 2006-09-18 2008-03-20 Oliver Richard Astley Interface Assembly And Method for Integrating A Data Acquisition System on a Sensor Array
US7518226B2 (en) * 2007-02-06 2009-04-14 Stats Chippac Ltd. Integrated circuit packaging system with interposer
KR101387701B1 (ko) * 2007-08-01 2014-04-23 삼성전자주식회사 반도체 패키지 및 이의 제조방법
KR101623880B1 (ko) * 2008-09-24 2016-05-25 삼성전자주식회사 반도체 패키지
US7973272B2 (en) * 2009-03-09 2011-07-05 Bae Systems Information And Electronic Systems Integration, Inc. Interface techniques for coupling a microchannel plate to a readout circuit
US7923290B2 (en) * 2009-03-27 2011-04-12 Stats Chippac Ltd. Integrated circuit packaging system having dual sided connection and method of manufacture thereof
US7936060B2 (en) * 2009-04-29 2011-05-03 International Business Machines Corporation Reworkable electronic device assembly and method
WO2011030504A1 (ja) * 2009-09-11 2011-03-17 パナソニック株式会社 電子部品実装体及びその製造方法並びにインタポーザ
US8008121B2 (en) 2009-11-04 2011-08-30 Stats Chippac, Ltd. Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate
US8405229B2 (en) * 2009-11-30 2013-03-26 Endicott Interconnect Technologies, Inc. Electronic package including high density interposer and circuitized substrate assembly utilizing same
US8363418B2 (en) 2011-04-18 2013-01-29 Morgan/Weiss Technologies Inc. Above motherboard interposer with peripheral circuits
US9013041B2 (en) * 2011-12-28 2015-04-21 Broadcom Corporation Semiconductor package with ultra-thin interposer without through-semiconductor vias
US9006908B2 (en) * 2012-08-01 2015-04-14 Marvell Israel (M.I.S.L) Ltd. Integrated circuit interposer and method of manufacturing the same
WO2014121300A2 (en) * 2013-02-04 2014-08-07 American Semiconductor, Inc. Photonic data transfer assembly
US20140264938A1 (en) * 2013-03-14 2014-09-18 Douglas R. Hackler, Sr. Flexible Interconnect
WO2015047350A1 (en) * 2013-09-27 2015-04-02 Intel Corporation Dual-sided die packages
JP2015082524A (ja) * 2013-10-21 2015-04-27 ソニー株式会社 配線基板、半導体装置
US9613857B2 (en) * 2014-10-30 2017-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Electrostatic discharge protection structure and method
US11309192B2 (en) * 2018-06-05 2022-04-19 Intel Corporation Integrated circuit package supports
DE102020206769B3 (de) * 2020-05-29 2021-06-10 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Mikroelektronische anordnung und verfahren zur herstellung derselben
CN114698242A (zh) * 2022-03-29 2022-07-01 维沃移动通信有限公司 Fpc和电子设备

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Also Published As

Publication number Publication date
US6819001B2 (en) 2004-11-16
US20040178484A1 (en) 2004-09-16
CN100454532C (zh) 2009-01-21
DE102004012595A1 (de) 2004-10-28
JP5568205B2 (ja) 2014-08-06
JP2004282072A (ja) 2004-10-07
CN1531081A (zh) 2004-09-22
NL1025639C2 (nl) 2005-05-26
NL1025639A1 (nl) 2004-09-16

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