HK1202704A1 - 半導體器件的製造方法 - Google Patents
半導體器件的製造方法Info
- Publication number
- HK1202704A1 HK1202704A1 HK15102922.2A HK15102922A HK1202704A1 HK 1202704 A1 HK1202704 A1 HK 1202704A1 HK 15102922 A HK15102922 A HK 15102922A HK 1202704 A1 HK1202704 A1 HK 1202704A1
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- HK
- Hong Kong
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
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- H01—ELECTRIC ELEMENTS
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- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06568—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices decreasing in size, e.g. pyramidical stack
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06593—Mounting aids permanently on device; arrangements for alignment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1431—Logic devices
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1434—Memory
-
- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
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- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2013061088A JP2014187185A (ja) | 2013-03-22 | 2013-03-22 | 半導体装置の製造方法 |
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HK1202704A1 true HK1202704A1 (zh) | 2015-10-02 |
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HK15102922.2A HK1202704A1 (zh) | 2013-03-22 | 2015-03-23 | 半導體器件的製造方法 |
Country Status (5)
Country | Link |
---|---|
US (4) | US9053954B2 (zh) |
JP (1) | JP2014187185A (zh) |
CN (2) | CN108878371A (zh) |
HK (1) | HK1202704A1 (zh) |
TW (2) | TWI618217B (zh) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5876000B2 (ja) * | 2012-06-11 | 2016-03-02 | 株式会社新川 | ボンディング装置およびボンディング方法 |
JP2014187185A (ja) * | 2013-03-22 | 2014-10-02 | Renesas Electronics Corp | 半導体装置の製造方法 |
JP6207190B2 (ja) * | 2013-03-22 | 2017-10-04 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP6489965B2 (ja) * | 2015-07-14 | 2019-03-27 | 新光電気工業株式会社 | 電子部品装置及びその製造方法 |
US9799571B2 (en) * | 2015-07-15 | 2017-10-24 | Globalfoundries Singapore Pte. Ltd. | Methods for producing integrated circuits with interposers and integrated circuits produced from such methods |
JP6544160B2 (ja) * | 2015-09-09 | 2019-07-17 | 三菱電機株式会社 | 半導体装置 |
JP6624973B2 (ja) * | 2016-03-03 | 2019-12-25 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US10056528B1 (en) * | 2017-03-31 | 2018-08-21 | Intel Corporation | Interposer structures, semiconductor assembly and methods for forming interposer structures |
US10636757B2 (en) * | 2017-08-29 | 2020-04-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit component package and method of fabricating the same |
KR20200047930A (ko) * | 2018-10-26 | 2020-05-08 | 삼성전자주식회사 | 테스트 패드를 포함하는 반도체 패키지 |
US11600590B2 (en) * | 2019-03-22 | 2023-03-07 | Advanced Semiconductor Engineering, Inc. | Semiconductor device and semiconductor package |
CN112378934B (zh) * | 2021-01-15 | 2021-09-10 | 同源微(北京)半导体技术有限公司 | 光学芯片、探测器以及制作方法 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6977396B2 (en) * | 2003-02-19 | 2005-12-20 | Lumileds Lighting U.S., Llc | High-powered light emitting device with improved thermal properties |
JP4379102B2 (ja) | 2003-12-12 | 2009-12-09 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
KR100580635B1 (ko) * | 2003-12-30 | 2006-05-16 | 삼성전자주식회사 | 전자소자 및 그 제조방법 |
JP4467318B2 (ja) | 2004-01-28 | 2010-05-26 | Necエレクトロニクス株式会社 | 半導体装置、マルチチップ半導体装置用チップのアライメント方法およびマルチチップ半導体装置用チップの製造方法 |
JP4632690B2 (ja) * | 2004-05-11 | 2011-02-16 | スタンレー電気株式会社 | 半導体発光装置とその製造方法 |
JP5022598B2 (ja) * | 2005-12-27 | 2012-09-12 | 株式会社東芝 | ボンディング装置及び半導体装置の製造方法 |
TWI473245B (zh) * | 2006-10-31 | 2015-02-11 | Sumitomo Bakelite Co | 半導體電子零件及使用該半導體電子零件之半導體裝置 |
JP2008153499A (ja) | 2006-12-19 | 2008-07-03 | Sharp Corp | 半導体装置の製造方法 |
JP5218319B2 (ja) | 2009-07-27 | 2013-06-26 | 富士通セミコンダクター株式会社 | 半導体基板 |
JP5531508B2 (ja) | 2009-08-26 | 2014-06-25 | 株式会社ニコン | 基板重ね合わせ装置、基板重ね合わせ方法、及びデバイスの製造方法 |
JP5984394B2 (ja) * | 2010-01-15 | 2016-09-06 | 東レエンジニアリング株式会社 | 3次元実装方法および装置 |
JP5609144B2 (ja) | 2010-02-19 | 2014-10-22 | ソニー株式会社 | 半導体装置および貫通電極のテスト方法 |
US8896136B2 (en) | 2010-06-30 | 2014-11-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Alignment mark and method of formation |
US8928159B2 (en) * | 2010-09-02 | 2015-01-06 | Taiwan Semiconductor Manufacturing & Company, Ltd. | Alignment marks in substrate having through-substrate via (TSV) |
JP2012114381A (ja) * | 2010-11-29 | 2012-06-14 | Kyocer Slc Technologies Corp | 配線基板およびその製造方法 |
JP2012222161A (ja) | 2011-04-08 | 2012-11-12 | Elpida Memory Inc | 半導体装置 |
JP2014187185A (ja) * | 2013-03-22 | 2014-10-02 | Renesas Electronics Corp | 半導体装置の製造方法 |
-
2013
- 2013-03-22 JP JP2013061088A patent/JP2014187185A/ja active Pending
-
2014
- 2014-03-03 US US14/194,874 patent/US9053954B2/en active Active
- 2014-03-19 TW TW106132731A patent/TWI618217B/zh active
- 2014-03-19 TW TW103110350A patent/TWI605562B/zh not_active IP Right Cessation
- 2014-03-21 CN CN201810692239.8A patent/CN108878371A/zh active Pending
- 2014-03-21 CN CN201410106343.6A patent/CN104064482A/zh active Pending
-
2015
- 2015-03-23 HK HK15102922.2A patent/HK1202704A1/zh unknown
- 2015-05-12 US US14/709,841 patent/US9490218B2/en active Active
-
2016
- 2016-09-19 US US15/268,742 patent/US9825017B2/en active Active
-
2017
- 2017-10-12 US US15/730,977 patent/US10141295B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN108878371A (zh) | 2018-11-23 |
TWI618217B (zh) | 2018-03-11 |
US20150243605A1 (en) | 2015-08-27 |
US9053954B2 (en) | 2015-06-09 |
US9490218B2 (en) | 2016-11-08 |
US20170005080A1 (en) | 2017-01-05 |
CN104064482A (zh) | 2014-09-24 |
TWI605562B (zh) | 2017-11-11 |
TW201438178A (zh) | 2014-10-01 |
US20180040598A1 (en) | 2018-02-08 |
JP2014187185A (ja) | 2014-10-02 |
US20140287541A1 (en) | 2014-09-25 |
US10141295B2 (en) | 2018-11-27 |
US9825017B2 (en) | 2017-11-21 |
TW201806123A (zh) | 2018-02-16 |
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