HK1101863A1 - A phase locked loop that sets gain automatically - Google Patents

A phase locked loop that sets gain automatically

Info

Publication number
HK1101863A1
HK1101863A1 HK07105800A HK07105800A HK1101863A1 HK 1101863 A1 HK1101863 A1 HK 1101863A1 HK 07105800 A HK07105800 A HK 07105800A HK 07105800 A HK07105800 A HK 07105800A HK 1101863 A1 HK1101863 A1 HK 1101863A1
Authority
HK
Hong Kong
Prior art keywords
locked loop
phase locked
signal
sets gain
gain automatically
Prior art date
Application number
HK07105800A
Other languages
English (en)
Inventor
Mark Harris
Alan Andrew Smith
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB0328898A external-priority patent/GB2410629C/en
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of HK1101863A1 publication Critical patent/HK1101863A1/xx

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1077—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the phase or frequency detection means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Radio Transmission System (AREA)
HK07105800A 2003-12-12 2007-05-31 A phase locked loop that sets gain automatically HK1101863A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0610934A GB2426879C (en) 2003-12-12 2003-12-12 A phase locked loop that sets gain automatically
GB0328898A GB2410629C (en) 2003-12-12 2003-12-12 A phase locked loop that sets gain automatically

Publications (1)

Publication Number Publication Date
HK1101863A1 true HK1101863A1 (en) 2007-10-26

Family

ID=30130156

Family Applications (1)

Application Number Title Priority Date Filing Date
HK07105800A HK1101863A1 (en) 2003-12-12 2007-05-31 A phase locked loop that sets gain automatically

Country Status (10)

Country Link
EP (3) EP2211467A1 (de)
JP (2) JP2007532045A (de)
KR (1) KR100952526B1 (de)
AT (2) ATE479231T1 (de)
DE (2) DE602004031304D1 (de)
ES (2) ES2348107T3 (de)
GB (1) GB2426879C (de)
HK (1) HK1101863A1 (de)
PL (2) PL1912333T3 (de)
WO (1) WO2005060103A2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005532016A (ja) 2002-06-28 2005-10-20 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 自動周波数同調位相ロックループ
JP2012075000A (ja) * 2010-09-29 2012-04-12 Toshiba Corp 位相同期回路及び無線機
FR2992073B1 (fr) * 2012-06-19 2014-07-11 Commissariat Energie Atomique Dispositif d'alimentation d'un circuit electronique
CN108282162B (zh) * 2017-01-06 2021-08-31 联咏科技股份有限公司 抖动容限提高的时钟和数据恢复电路

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US4562410A (en) * 1983-12-29 1985-12-31 Rca Corporation Phase lock loop prepositioning apparatus with feedback control
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US5200712A (en) * 1991-12-26 1993-04-06 Zenith Electronics Corporation Variable speed phase locked loop
GB9213624D0 (en) * 1992-06-26 1992-08-12 Motorola Israel Ltd A phase lock loop
JPH06112817A (ja) * 1992-09-25 1994-04-22 Fujitsu Ltd Ｐｌｌ 周波数シンセサイザ回路
JP3001735B2 (ja) * 1992-11-10 2000-01-24 三菱電機株式会社 位相同期ループ周波数シンセサイザ
US5317285A (en) * 1993-02-26 1994-05-31 Motorola, Inc. Frequency synthesizer employing a continuously adaptive phase detector and method
US5382922A (en) * 1993-12-23 1995-01-17 International Business Machines Corporation Calibration systems and methods for setting PLL gain characteristics and center frequency
IT1279165B1 (it) * 1995-03-14 1997-12-04 Cselt Centro Studi Lab Telecom Circuito per l'estrazione del segnale di orologio da un flusso dati ad alta velocita'.
WO1996029785A1 (fr) * 1995-03-17 1996-09-26 Hitachi, Ltd. Synthetiseur de frequence a gain de boucle variable
JP3561035B2 (ja) * 1995-05-10 2004-09-02 株式会社ルネサステクノロジ 同期クロック生成回路
US5678200A (en) * 1995-06-21 1997-10-14 Mercur Ltd. Independent wideband RF transmission detector for cellular telephone
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JPH10261957A (ja) * 1997-03-19 1998-09-29 Advantest Corp Ｐｌｌ回路
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EP0991193A1 (de) * 1998-09-29 2000-04-05 Koninklijke Philips Electronics N.V. Funkgerät mit einem Frequenzsynthetisierer und Phasendiskriminator für ein solches Gerät
JP2001053606A (ja) * 1999-08-06 2001-02-23 Sanyo Electric Co Ltd Ｐｌｌシンセサイザ回路
JP3375584B2 (ja) * 2000-01-07 2003-02-10 松下電器産業株式会社 周波数比較器とそれを備えた位相同期回路
EP1184987B1 (de) * 2000-03-21 2006-06-14 Nippon Telegraph and Telephone Corporation Phasenregelschleife
JP2001274682A (ja) * 2000-03-27 2001-10-05 Toshiba Corp フェーズロックドループ回路
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JP2005236431A (ja) * 2004-02-17 2005-09-02 Matsushita Electric Ind Co Ltd 周波数シンセサイザー

Also Published As

Publication number Publication date
WO2005060103A2 (en) 2005-06-30
EP1912333B1 (de) 2010-08-25
PL1912333T3 (pl) 2010-12-31
ES2357436T3 (es) 2011-04-26
GB0610934D0 (en) 2006-07-12
ES2348107T3 (es) 2010-11-30
EP1692768B1 (de) 2011-02-02
DE602004028879D1 (de) 2010-10-07
GB2426879B (en) 2007-01-17
JP2011041300A (ja) 2011-02-24
KR20060096104A (ko) 2006-09-05
GB2426879C (en) 2008-01-21
GB2426879A (en) 2006-12-06
DE602004031304D1 (de) 2011-03-17
EP1692768A2 (de) 2006-08-23
ATE479231T1 (de) 2010-09-15
EP1912333A1 (de) 2008-04-16
JP2007532045A (ja) 2007-11-08
PL1692768T3 (pl) 2011-05-31
WO2005060103A3 (en) 2005-12-29
EP2211467A1 (de) 2010-07-28
KR100952526B1 (ko) 2010-04-12
ATE497652T1 (de) 2011-02-15

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20121212