HK1064503A1 - Data output circuit and data output method - Google Patents

Data output circuit and data output method

Info

Publication number
HK1064503A1
HK1064503A1 HK04107169A HK04107169A HK1064503A1 HK 1064503 A1 HK1064503 A1 HK 1064503A1 HK 04107169 A HK04107169 A HK 04107169A HK 04107169 A HK04107169 A HK 04107169A HK 1064503 A1 HK1064503 A1 HK 1064503A1
Authority
HK
Hong Kong
Prior art keywords
data output
output circuit
circuit
output method
data
Prior art date
Application number
HK04107169A
Other languages
English (en)
Inventor
Koji Naganawa
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Publication of HK1064503A1 publication Critical patent/HK1064503A1/xx

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106Data output latches
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069I/O lines read out arrangements
HK04107169A 2002-08-21 2004-09-17 Data output circuit and data output method HK1064503A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002240035A JP2004080553A (ja) 2002-08-21 2002-08-21 データ出力回路及びデータ出力方法

Publications (1)

Publication Number Publication Date
HK1064503A1 true HK1064503A1 (en) 2005-01-28

Family

ID=28450008

Family Applications (1)

Application Number Title Priority Date Filing Date
HK04107169A HK1064503A1 (en) 2002-08-21 2004-09-17 Data output circuit and data output method

Country Status (5)

Country Link
US (1) US6946867B2 (zh)
JP (1) JP2004080553A (zh)
CN (1) CN1323363C (zh)
GB (1) GB2394088B (zh)
HK (1) HK1064503A1 (zh)

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KR100578219B1 (ko) * 2004-12-30 2006-05-12 주식회사 하이닉스반도체 온-칩 데이터 전송 제어장치 및 그 제어방법
US20060270113A1 (en) * 2005-05-26 2006-11-30 Cisco Technology, Inc. Method and system for reducing simultaneous switching output noise
US7242624B2 (en) * 2005-06-14 2007-07-10 Qualcomm Incorporated Methods and apparatus for reading a full-swing memory array
KR100649353B1 (ko) 2005-09-29 2006-11-27 주식회사 하이닉스반도체 버스 구동 회로
US7394285B2 (en) 2005-09-29 2008-07-01 Hynix Semiconductor, Inc. Circuit for driving bus
KR100837813B1 (ko) * 2006-12-07 2008-06-13 주식회사 하이닉스반도체 반도체 집적 회로의 dbi 신호 생성 장치 및 방법
JP5077806B2 (ja) * 2006-12-19 2012-11-21 横河電機株式会社 メモリ試験装置
US8606982B2 (en) * 2008-03-10 2013-12-10 Qimonda Ag Derivative logical output
US8069403B2 (en) * 2008-07-01 2011-11-29 Sandisk Technologies Inc. Majority voting logic circuit for dual bus width
JP5314612B2 (ja) * 2010-02-04 2013-10-16 ルネサスエレクトロニクス株式会社 半導体記憶装置
CN103440219B (zh) * 2013-08-23 2016-06-08 上海航天测控通信研究所 一种通用总线转换桥ip核
US10558254B2 (en) * 2017-04-01 2020-02-11 Intel Corporation Power consumption management for communication bus
JP2021047967A (ja) 2019-09-20 2021-03-25 キオクシア株式会社 半導体デバイス
US11626147B2 (en) 2021-03-26 2023-04-11 Changxin Memory Technologies, Inc. Transmission circuit, transmission method, storage apparatus, and storage medium
CN115129231A (zh) * 2021-03-26 2022-09-30 长鑫存储技术有限公司 传输电路、方法、存储装置及存储介质
CN115206360A (zh) 2021-04-13 2022-10-18 长鑫存储技术有限公司 数据传输电路、方法及存储装置

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JPS59212027A (ja) * 1983-05-18 1984-11-30 Toshiba Corp 半導体集積回路の出力回路
US4667337A (en) * 1985-08-28 1987-05-19 Westinghouse Electric Corp. Integrated circuit having outputs configured for reduced state changes
JP2580325B2 (ja) 1989-05-26 1997-02-12 株式会社日立製作所 デ―タ伝送方式、デ―タ出力回路およびデ―タ入力回路
EP0444774A3 (en) * 1990-01-29 1991-09-11 Raytheon Company Method and apparatus for driving a digital bus
JP3100622B2 (ja) * 1990-11-20 2000-10-16 沖電気工業株式会社 同期型ダイナミックram
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WO1997011420A1 (fr) 1995-09-18 1997-03-27 Hitachi, Ltd. Procede de commande de bus, circuit de commande de bus et processeur utilisant ledit procede
JP3346999B2 (ja) * 1996-01-08 2002-11-18 株式会社東芝 入出力装置
JPH09305374A (ja) * 1996-05-13 1997-11-28 Mitsubishi Electric Corp 半導体集積回路及びその消費電力削減方法
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EP1403774B1 (en) 2002-09-25 2007-07-25 STMicroelectronics S.r.l. Process and devices for transmitting digital signals over buses and computer program product therefor

Also Published As

Publication number Publication date
US6946867B2 (en) 2005-09-20
GB0319465D0 (en) 2003-09-17
CN1323363C (zh) 2007-06-27
US20040255062A1 (en) 2004-12-16
JP2004080553A (ja) 2004-03-11
GB2394088B (en) 2005-10-12
GB2394088A (en) 2004-04-14
CN1487528A (zh) 2004-04-07

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20110820