GB1480129A - Method of obtaining high temperature resistant assemblies comprising isolated silicon islands bonded to a substrate - Google Patents

Method of obtaining high temperature resistant assemblies comprising isolated silicon islands bonded to a substrate

Info

Publication number
GB1480129A
GB1480129A GB7689/75A GB768975A GB1480129A GB 1480129 A GB1480129 A GB 1480129A GB 7689/75 A GB7689/75 A GB 7689/75A GB 768975 A GB768975 A GB 768975A GB 1480129 A GB1480129 A GB 1480129A
Authority
GB
United Kingdom
Prior art keywords
substrate
silicon
high temperature
wafer
islands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB7689/75A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
COMP INT POUR L INFORMATIQUE
Original Assignee
COMP INT POUR L INFORMATIQUE
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by COMP INT POUR L INFORMATIQUE filed Critical COMP INT POUR L INFORMATIQUE
Publication of GB1480129A publication Critical patent/GB1480129A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
  • Weting (AREA)
GB7689/75A 1974-02-26 1975-02-24 Method of obtaining high temperature resistant assemblies comprising isolated silicon islands bonded to a substrate Expired GB1480129A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7406492A FR2262406B1 (en, 2012) 1974-02-26 1974-02-26

Publications (1)

Publication Number Publication Date
GB1480129A true GB1480129A (en) 1977-07-20

Family

ID=9135457

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7689/75A Expired GB1480129A (en) 1974-02-26 1975-02-24 Method of obtaining high temperature resistant assemblies comprising isolated silicon islands bonded to a substrate

Country Status (7)

Country Link
JP (1) JPS50126181A (en, 2012)
BE (1) BE825855A (en, 2012)
DE (1) DE2508091A1 (en, 2012)
FR (1) FR2262406B1 (en, 2012)
GB (1) GB1480129A (en, 2012)
IT (1) IT1030218B (en, 2012)
NL (1) NL7502154A (en, 2012)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112938894A (zh) * 2021-03-11 2021-06-11 中北大学 一种多层次立体化的mems器件抗冲击防护结构的制备方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5086011A (en) * 1987-01-27 1992-02-04 Advanced Micro Devices, Inc. Process for producing thin single crystal silicon islands on insulator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112938894A (zh) * 2021-03-11 2021-06-11 中北大学 一种多层次立体化的mems器件抗冲击防护结构的制备方法

Also Published As

Publication number Publication date
IT1030218B (it) 1979-03-30
FR2262406B1 (en, 2012) 1982-02-19
DE2508091A1 (de) 1975-08-28
NL7502154A (nl) 1975-08-28
BE825855A (fr) 1975-08-25
FR2262406A1 (en, 2012) 1975-09-19
JPS50126181A (en, 2012) 1975-10-03

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee