GB1474745A - Nonvolatile semiconductor memory - Google Patents
Nonvolatile semiconductor memoryInfo
- Publication number
- GB1474745A GB1474745A GB3924474A GB3924474A GB1474745A GB 1474745 A GB1474745 A GB 1474745A GB 3924474 A GB3924474 A GB 3924474A GB 3924474 A GB3924474 A GB 3924474A GB 1474745 A GB1474745 A GB 1474745A
- Authority
- GB
- United Kingdom
- Prior art keywords
- source
- drain
- region
- substrate
- depletion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 abstract 3
- 238000009413 insulation Methods 0.000 abstract 2
- 230000000903 blocking effect Effects 0.000 abstract 1
- 239000002800 charge carrier Substances 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
1474745 Semiconductor memory elements TOKYO SHIBAURA ELECTRIC CO Ltd 9 Sept 1974 [21 Sept 1973] 39244/74 Heading H1K A non-volatile memory IGFET, e.g. of the MNOS type, in which information, represented by charge trapped in the gate insulation, is written in by reverse biasing the source and drain regions relative to the gate and substrate to cause surface avalanching beneath the gate insulation thereby generating charge carriers which then tunnel to the trapping sites therein, is so designed that, during writing, the region in which avalanching occurs can be completely isolated from the material of the substrate by a depletion region. In one embodiment the drain region forms part of a rectangular frame region closely surrounding the source region so that below the surface the depletion regions of source and drain overlap to provide the isolation. In the other the source and drain regions 22a, 23a, (Fig. 8) are elongated and the central gated area 43 bounded on opposite sides by the interconnected pair of gates 44 which are so biased during writing as to create depletion regions blocking any surface path to the substrate, with the source and drain depletion regions overlapping as in the first embodiment.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10679373A JPS5613029B2 (en) | 1973-09-21 | 1973-09-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1474745A true GB1474745A (en) | 1977-05-25 |
Family
ID=14442758
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB3924474A Expired GB1474745A (en) | 1973-09-21 | 1974-09-09 | Nonvolatile semiconductor memory |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS5613029B2 (en) |
CA (1) | CA1060993A (en) |
DE (1) | DE2444906C3 (en) |
GB (1) | GB1474745A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5458376A (en) * | 1977-10-19 | 1979-05-11 | Agency Of Ind Science & Technol | Semiconductor memory unit and its writing method |
US4375087C1 (en) * | 1980-04-09 | 2002-01-01 | Hughes Aircraft Co | Electrically erasable programmable read-only memory |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1175601A (en) * | 1966-03-28 | 1969-12-23 | Matsushita Electronics Corp | Insulated-Gate Field-Effect Transistor |
DE2201028C3 (en) * | 1971-01-15 | 1981-07-09 | Intel Corp., Mountain View, Calif. | Method for operating a field effect transistor and field effect transistor for carrying out this method |
-
1973
- 1973-09-21 JP JP10679373A patent/JPS5613029B2/ja not_active Expired
-
1974
- 1974-09-09 GB GB3924474A patent/GB1474745A/en not_active Expired
- 1974-09-11 CA CA208,942A patent/CA1060993A/en not_active Expired
- 1974-09-19 DE DE19742444906 patent/DE2444906C3/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2444906C3 (en) | 1982-02-04 |
DE2444906A1 (en) | 1975-04-24 |
JPS5613029B2 (en) | 1981-03-25 |
CA1060993A (en) | 1979-08-21 |
DE2444906B2 (en) | 1981-05-27 |
JPS5057779A (en) | 1975-05-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
746 | Register noted 'licences of right' (sect. 46/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |