JPS5621375A - Semiconductor nonvolatile memory device - Google Patents

Semiconductor nonvolatile memory device

Info

Publication number
JPS5621375A
JPS5621375A JP9642179A JP9642179A JPS5621375A JP S5621375 A JPS5621375 A JP S5621375A JP 9642179 A JP9642179 A JP 9642179A JP 9642179 A JP9642179 A JP 9642179A JP S5621375 A JPS5621375 A JP S5621375A
Authority
JP
Japan
Prior art keywords
type
region
film
substrate
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9642179A
Other languages
Japanese (ja)
Other versions
JPS6335111B2 (en
Inventor
Shinpei Tsuchiya
Takashi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9642179A priority Critical patent/JPS5621375A/en
Priority to DE8080302039T priority patent/DE3065360D1/en
Priority to EP80302039A priority patent/EP0021777B1/en
Priority to CA000354232A priority patent/CA1139880A/en
Publication of JPS5621375A publication Critical patent/JPS5621375A/en
Priority to US06/526,219 priority patent/US4491859A/en
Publication of JPS6335111B2 publication Critical patent/JPS6335111B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7886—Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To reduce read-in and erasing voltages remarkably, by providing memory and switching transistors on the same semiconductor substrate, forming a reverse electroconductive type region in a drain region of a memory element and switching it to grounding potential and also to float. CONSTITUTION:An n<+>-type source region 2 and an n<+>-type drain region 3 of a memory transistor QM are dispersingly formed on a p-type Si substrate 1, and an entire surface of the substrate 1 is covered with a thick field SiO2 film 16. And then, by providing a window on the film 16, a gate Si3N4 film 13 touching the edges of these regions is attached onto the surface of the substrate 1 which is exposed between the regions 2 and 3, and a floating gate is provided thereon to cover a PSG film 9. Adjoining the transistor QM, an n<+>-type drain region 4 and an n<+>-type source region 4 of a switching transistor QS are dispersingly formed, and by providing a gate electrode 8 through a gate SiO2 film in the same manner, the PSG film 9 is covered. In this mechanism, a p<+>-type region 6 is provided in the region 3, and read-in and erasing are executed by connecting and disconnecting the voltage impressed onto thus developed p-n junction.
JP9642179A 1979-06-18 1979-07-28 Semiconductor nonvolatile memory device Granted JPS5621375A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP9642179A JPS5621375A (en) 1979-07-28 1979-07-28 Semiconductor nonvolatile memory device
DE8080302039T DE3065360D1 (en) 1979-06-18 1980-06-17 Semiconductor non-volatile memory device
EP80302039A EP0021777B1 (en) 1979-06-18 1980-06-17 Semiconductor non-volatile memory device
CA000354232A CA1139880A (en) 1979-06-18 1980-06-18 Semiconductor non-volatile memory device
US06/526,219 US4491859A (en) 1979-06-18 1983-08-25 Semiconductor non-volatile memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9642179A JPS5621375A (en) 1979-07-28 1979-07-28 Semiconductor nonvolatile memory device

Publications (2)

Publication Number Publication Date
JPS5621375A true JPS5621375A (en) 1981-02-27
JPS6335111B2 JPS6335111B2 (en) 1988-07-13

Family

ID=14164509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9642179A Granted JPS5621375A (en) 1979-06-18 1979-07-28 Semiconductor nonvolatile memory device

Country Status (1)

Country Link
JP (1) JPS5621375A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0260565A (en) * 1988-08-26 1990-03-01 Kikkoman Corp Stabilization of extract flavor of fishes and shellfishes or animal meat
EP1178540A1 (en) * 2000-07-31 2002-02-06 STMicroelectronics S.r.l. Nonvolatile memory cell with high programming efficiency
US9030877B2 (en) 2007-08-30 2015-05-12 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49118376A (en) * 1973-03-12 1974-11-12

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49118376A (en) * 1973-03-12 1974-11-12

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0260565A (en) * 1988-08-26 1990-03-01 Kikkoman Corp Stabilization of extract flavor of fishes and shellfishes or animal meat
EP1178540A1 (en) * 2000-07-31 2002-02-06 STMicroelectronics S.r.l. Nonvolatile memory cell with high programming efficiency
US6734490B2 (en) 2000-07-31 2004-05-11 Stmicroelectronics S.R.L. Nonvolatile memory cell with high programming efficiency
US9030877B2 (en) 2007-08-30 2015-05-12 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Also Published As

Publication number Publication date
JPS6335111B2 (en) 1988-07-13

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