JPS5737880A - Field effect transistor - Google Patents

Field effect transistor

Info

Publication number
JPS5737880A
JPS5737880A JP11318680A JP11318680A JPS5737880A JP S5737880 A JPS5737880 A JP S5737880A JP 11318680 A JP11318680 A JP 11318680A JP 11318680 A JP11318680 A JP 11318680A JP S5737880 A JPS5737880 A JP S5737880A
Authority
JP
Japan
Prior art keywords
layer
electrode
substrate
layers
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11318680A
Other languages
Japanese (ja)
Inventor
Sukemitsu Takena
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11318680A priority Critical patent/JPS5737880A/en
Publication of JPS5737880A publication Critical patent/JPS5737880A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain an FET with a high withstand voltage eliminating increase in the area of the elements by providing one Schottky electrode on an n layer laid across two p layers on an n<-> type Si substrate. CONSTITUTION:P layers 12 are provided on an n<-> type Si substrate 11 at a given space and an n<+> layer 14 is made thereon. An n layer 14 is made on the surface of the substrate 11 adjacent to the facing surface of the layer 13 across the layer 12. A surface insulation film 15 is etched and one Schottky electrode 16 on the n layer 14 at a position cross the two p layers to make a first gate G1. A metal electrode 17 is provided and the electrode on the n<+> layer 13 is made source S and the electrode on the p layer 12 a second gate G2. A metal electrode 18 is provided on the back of the substrate to make a drain D. This enables a cascode connection of a Schottky type FET1 comprising the layer 13-G1-G2- the layer 14 and a junction type FET2 which comprises an n<-> layer between the two p layers 12 as channel and the electrode 18 as drain. The larger thickness of the substrate 11 can give a higher withstand voltage without increase in the area.
JP11318680A 1980-08-18 1980-08-18 Field effect transistor Pending JPS5737880A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11318680A JPS5737880A (en) 1980-08-18 1980-08-18 Field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11318680A JPS5737880A (en) 1980-08-18 1980-08-18 Field effect transistor

Publications (1)

Publication Number Publication Date
JPS5737880A true JPS5737880A (en) 1982-03-02

Family

ID=14605726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11318680A Pending JPS5737880A (en) 1980-08-18 1980-08-18 Field effect transistor

Country Status (1)

Country Link
JP (1) JPS5737880A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4724220A (en) * 1985-02-19 1988-02-09 Eaton Corporation Method for fabricating buried channel field-effect transistor for microwave and millimeter frequencies
US4833095A (en) * 1985-02-19 1989-05-23 Eaton Corporation Method for buried channel field effect transistor for microwave and millimeter frequencies utilizing ion implantation
US4837175A (en) * 1983-02-15 1989-06-06 Eaton Corporation Making a buried channel FET with lateral growth over amorphous region
US4935789A (en) * 1985-02-19 1990-06-19 Eaton Corporation Buried channel FET with lateral growth over amorphous region

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4837175A (en) * 1983-02-15 1989-06-06 Eaton Corporation Making a buried channel FET with lateral growth over amorphous region
US4724220A (en) * 1985-02-19 1988-02-09 Eaton Corporation Method for fabricating buried channel field-effect transistor for microwave and millimeter frequencies
US4833095A (en) * 1985-02-19 1989-05-23 Eaton Corporation Method for buried channel field effect transistor for microwave and millimeter frequencies utilizing ion implantation
US4935789A (en) * 1985-02-19 1990-06-19 Eaton Corporation Buried channel FET with lateral growth over amorphous region

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