GB1464755A - Two-phase charge coupled devices - Google Patents

Two-phase charge coupled devices

Info

Publication number
GB1464755A
GB1464755A GB3200374A GB3200374A GB1464755A GB 1464755 A GB1464755 A GB 1464755A GB 3200374 A GB3200374 A GB 3200374A GB 3200374 A GB3200374 A GB 3200374A GB 1464755 A GB1464755 A GB 1464755A
Authority
GB
United Kingdom
Prior art keywords
electrodes
zones
substrate
layer
implantation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3200374A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19732341179 external-priority patent/DE2341179C3/de
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of GB1464755A publication Critical patent/GB1464755A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D44/00Charge transfer devices
    • H10D44/40Charge-coupled devices [CCD]
    • H10D44/45Charge-coupled devices [CCD] having field effect produced by insulated gate electrodes 
    • H10D44/472Surface-channel CCD
    • H10D44/474Two-phase CCD
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213Channel regions of field-effect devices
    • H10D62/335Channel regions of field-effect devices of charge-coupled devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/025Deposition multi-step
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/106Masks, special
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/143Shadow masking

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
GB3200374A 1973-08-14 1974-07-19 Two-phase charge coupled devices Expired GB1464755A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732341179 DE2341179C3 (de) 1973-08-14 Verfahren zur Herstellung einer Zweiphasen-Ladungsverschiebeanordnung und Verwendung von Materialien bei diesem Verfahren

Publications (1)

Publication Number Publication Date
GB1464755A true GB1464755A (en) 1977-02-16

Family

ID=5889768

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3200374A Expired GB1464755A (en) 1973-08-14 1974-07-19 Two-phase charge coupled devices

Country Status (14)

Country Link
US (1) US3914857A (enExample)
JP (1) JPS5046488A (enExample)
AT (1) AT337781B (enExample)
BE (1) BE818752A (enExample)
CA (1) CA1012659A (enExample)
CH (1) CH575174A5 (enExample)
DK (1) DK139118C (enExample)
FR (1) FR2246068B1 (enExample)
GB (1) GB1464755A (enExample)
IE (1) IE39611B1 (enExample)
IT (1) IT1019907B (enExample)
LU (1) LU70713A1 (enExample)
NL (1) NL7410685A (enExample)
SE (1) SE389764B (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4167017A (en) * 1976-06-01 1979-09-04 Texas Instruments Incorporated CCD structures with surface potential asymmetry beneath the phase electrodes
US4087832A (en) * 1976-07-02 1978-05-02 International Business Machines Corporation Two-phase charge coupled device structure
US4232439A (en) * 1976-11-30 1980-11-11 Vlsi Technology Research Association Masking technique usable in manufacturing semiconductor devices
JPS52109879A (en) * 1977-01-28 1977-09-14 Agency Of Ind Science & Technol Formating method of matching domain
JPS5911988B2 (ja) * 1980-01-23 1984-03-19 株式会社日立製作所 イオン打込み方法
US4435899A (en) 1981-03-02 1984-03-13 Rockwell International Corporation Method of producing lateral transistor separated from substrate by intersecting slots filled with substrate oxide
US4437226A (en) 1981-03-02 1984-03-20 Rockwell International Corporation Process for producing NPN type lateral transistor with minimal substrate operation interference
US4542577A (en) * 1982-12-30 1985-09-24 International Business Machines Corporation Submicron conductor manufacturing
US4576884A (en) * 1984-06-14 1986-03-18 Microelectronics Center Of North Carolina Method and apparatus for exposing photoresist by using an electron beam and controlling its voltage and charge
JPH0834194B2 (ja) * 1989-06-30 1996-03-29 松下電器産業株式会社 イオン注入方法及び本方法を用いた半導体装置の製造方法
JP2970158B2 (ja) * 1991-12-20 1999-11-02 日本電気株式会社 固体撮像装置の製造方法
KR940010932B1 (ko) * 1991-12-23 1994-11-19 금성일렉트론주식회사 Ccd영상소자 제조방법
JP2842066B2 (ja) * 1992-08-03 1998-12-24 日本電気株式会社 固体撮像装置及びその製造方法
US5409848A (en) * 1994-03-31 1995-04-25 Vlsi Technology, Inc. Angled lateral pocket implants on p-type semiconductor devices
EP1408542A3 (en) * 1994-07-14 2009-01-21 STMicroelectronics S.r.l. High-speed MOS-technology power device integrated structure, and related manufacturing process
JP2965061B2 (ja) * 1996-04-19 1999-10-18 日本電気株式会社 電荷結合素子およびその製造方法
IT1289524B1 (it) 1996-12-24 1998-10-15 Sgs Thomson Microelectronics Cella di memoria per dispositivi di tipo eeprom e relativo processo di fabbricazione
IT1289525B1 (it) * 1996-12-24 1998-10-15 Sgs Thomson Microelectronics Cella di memoria per dispositivi di tipo eeprom e relativo processo di fabbricazione
US5896314A (en) * 1997-03-05 1999-04-20 Macronix International Co., Ltd. Asymmetric flash EEPROM with a pocket to focus electron injection and a manufacturing method therefor
US5943576A (en) * 1998-09-01 1999-08-24 National Semiconductor Corporation Angled implant to build MOS transistors in contact holes
US6331873B1 (en) 1998-12-03 2001-12-18 Massachusetts Institute Of Technology High-precision blooming control structure formation for an image sensor
JP2001308304A (ja) * 2000-04-19 2001-11-02 Sony Corp 固体撮像素子の製造方法
US6828202B1 (en) * 2002-10-01 2004-12-07 T-Ram, Inc. Semiconductor region self-aligned with ion implant shadowing
JP2005093866A (ja) * 2003-09-19 2005-04-07 Fuji Film Microdevices Co Ltd 固体撮像素子の製造方法
JP7192723B2 (ja) * 2019-09-12 2022-12-20 株式会社ダイフク 物品搬送設備

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2875505A (en) * 1952-12-11 1959-03-03 Bell Telephone Labor Inc Semiconductor translating device
US3387360A (en) * 1965-04-01 1968-06-11 Sony Corp Method of making a semiconductor device
FR2123592A5 (enExample) * 1971-01-14 1972-09-15 Commissariat Energie Atomique
US3851379A (en) * 1973-05-16 1974-12-03 Westinghouse Electric Corp Solid state components

Also Published As

Publication number Publication date
FR2246068A1 (enExample) 1975-04-25
DE2341179A1 (de) 1975-03-20
SE7410187L (enExample) 1975-02-17
DK139118B (da) 1978-12-18
JPS5046488A (enExample) 1975-04-25
LU70713A1 (enExample) 1974-12-10
AT337781B (de) 1977-07-25
SE389764B (sv) 1976-11-15
IT1019907B (it) 1977-11-30
DK431074A (enExample) 1975-04-14
CA1012659A (en) 1977-06-21
CH575174A5 (enExample) 1976-04-30
ATA631574A (de) 1976-11-15
DE2341179B2 (de) 1975-06-26
US3914857A (en) 1975-10-28
BE818752A (fr) 1974-12-02
NL7410685A (nl) 1975-02-18
IE39611L (en) 1975-02-14
IE39611B1 (en) 1978-11-22
DK139118C (da) 1979-05-28
FR2246068B1 (enExample) 1978-01-27

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee