IT1289525B1 - Cella di memoria per dispositivi di tipo eeprom e relativo processo di fabbricazione - Google Patents

Cella di memoria per dispositivi di tipo eeprom e relativo processo di fabbricazione

Info

Publication number
IT1289525B1
IT1289525B1 IT96MI002741A ITMI962741A IT1289525B1 IT 1289525 B1 IT1289525 B1 IT 1289525B1 IT 96MI002741 A IT96MI002741 A IT 96MI002741A IT MI962741 A ITMI962741 A IT MI962741A IT 1289525 B1 IT1289525 B1 IT 1289525B1
Authority
IT
Italy
Prior art keywords
memory cell
manufacturing process
type devices
related manufacturing
eeprom type
Prior art date
Application number
IT96MI002741A
Other languages
English (en)
Inventor
Bruno Vajana
Carlo Cremonesi
Roberta Bottini
Libera Giovanna Dalla
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT96MI002741A priority Critical patent/IT1289525B1/it
Priority to US08/996,923 priority patent/US6080626A/en
Publication of ITMI962741A1 publication Critical patent/ITMI962741A1/it
Application granted granted Critical
Publication of IT1289525B1 publication Critical patent/IT1289525B1/it
Priority to US09/576,168 priority patent/US6320219B1/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
IT96MI002741A 1996-12-24 1996-12-24 Cella di memoria per dispositivi di tipo eeprom e relativo processo di fabbricazione IT1289525B1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT96MI002741A IT1289525B1 (it) 1996-12-24 1996-12-24 Cella di memoria per dispositivi di tipo eeprom e relativo processo di fabbricazione
US08/996,923 US6080626A (en) 1996-12-24 1997-12-23 Memory cell for EEPROM devices, and corresponding fabricating process
US09/576,168 US6320219B1 (en) 1996-12-24 2000-05-22 Memory cell for EEPROM devices and corresponding fabricating process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT96MI002741A IT1289525B1 (it) 1996-12-24 1996-12-24 Cella di memoria per dispositivi di tipo eeprom e relativo processo di fabbricazione

Publications (2)

Publication Number Publication Date
ITMI962741A1 ITMI962741A1 (it) 1998-06-24
IT1289525B1 true IT1289525B1 (it) 1998-10-15

Family

ID=11375491

Family Applications (1)

Application Number Title Priority Date Filing Date
IT96MI002741A IT1289525B1 (it) 1996-12-24 1996-12-24 Cella di memoria per dispositivi di tipo eeprom e relativo processo di fabbricazione

Country Status (2)

Country Link
US (2) US6080626A (it)
IT (1) IT1289525B1 (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101751047B1 (ko) * 2011-01-18 2017-07-03 삼성전자 주식회사 반도체 소자 및 그 제조 방법

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US35094A (en) * 1862-04-29 Faucet
US3914357A (en) 1973-01-04 1975-10-21 Western Electric Co Method of monitoring the application of cellular plastic insulation to elongated conductive material
IE39611B1 (en) * 1973-08-14 1978-11-22 Siemens Ag Improvements in or relating to two-phase charge coupled devices
US5081054A (en) 1989-04-03 1992-01-14 Atmel Corporation Fabrication process for programmable and erasable MOS memory device
US5411904A (en) * 1990-11-19 1995-05-02 Sharp Kabushiki Kaisha Process for fabricating nonvolatile random access memory having a tunnel oxide film
IT1252214B (it) * 1991-12-13 1995-06-05 Sgs Thomson Microelectronics Procedimento per la definizione di porzioni di ossido sottile particolarmente per celle di memoria a sola lettura programmabili e cancellabile elettricamente.
JP2970158B2 (ja) * 1991-12-20 1999-11-02 日本電気株式会社 固体撮像装置の製造方法
JPH0745730A (ja) * 1993-02-19 1995-02-14 Sgs Thomson Microelettronica Spa ２レベルのポリシリコンｅｅｐｒｏｍメモリ・セル並びにそのプログラミング方法及び製造方法、集積されたｅｅｐｒｏｍ記憶回路、ｅｅｐｒｏｍメモリ・セル及びそのプログラミング方法
JP3093096B2 (ja) * 1993-08-27 2000-10-03 シャープ株式会社 不揮発性メモリの製造方法
EP0655778A3 (en) * 1993-11-25 1996-01-03 Matsushita Electronics Corp Method of manufacturing semiconductor memory devices.
US5501996A (en) * 1994-12-14 1996-03-26 United Microelectronics Corporation Method of manufacture of high coupling ratio single polysilicon floating gate EPROM or EEPROM cell
US5518942A (en) * 1995-02-22 1996-05-21 Alliance Semiconductor Corporation Method of making flash EPROM cell having improved erase characteristics by using a tilt angle implant
US5894146A (en) * 1995-02-28 1999-04-13 Sgs-Thomson Microelectronics, S.R.L. EEPROM memory cells matrix with double polysilicon level and relating manufacturing process
US5877054A (en) * 1995-06-29 1999-03-02 Sharp Kabushiki Kaisha Method of making nonvolatile semiconductor memory

Also Published As

Publication number Publication date
US6320219B1 (en) 2001-11-20
ITMI962741A1 (it) 1998-06-24
US6080626A (en) 2000-06-27

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Legal Events

Date Code Title Description
0001 Granted