GB1365824A - Multi layer circuit - Google Patents

Multi layer circuit

Info

Publication number
GB1365824A
GB1365824A GB2072672A GB2072672A GB1365824A GB 1365824 A GB1365824 A GB 1365824A GB 2072672 A GB2072672 A GB 2072672A GB 2072672 A GB2072672 A GB 2072672A GB 1365824 A GB1365824 A GB 1365824A
Authority
GB
United Kingdom
Prior art keywords
contact areas
conductor paths
circuit board
same height
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2072672A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of GB1365824A publication Critical patent/GB1365824A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H10W70/60—
    • H10W70/611—
    • H10W90/724—

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
GB2072672A 1971-05-06 1972-05-04 Multi layer circuit Expired GB1365824A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2122475A DE2122475B2 (de) 1971-05-06 1971-05-06 Mehrlagige in Dickfilmtechnik ausgeführte Leiterplatte zur Verdrahtung von integrierten Halbleiterbausteinen

Publications (1)

Publication Number Publication Date
GB1365824A true GB1365824A (en) 1974-09-04

Family

ID=5807084

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2072672A Expired GB1365824A (en) 1971-05-06 1972-05-04 Multi layer circuit

Country Status (7)

Country Link
BE (1) BE783109A (enExample)
DE (1) DE2122475B2 (enExample)
FR (1) FR2135256A1 (enExample)
GB (1) GB1365824A (enExample)
IT (1) IT959699B (enExample)
LU (1) LU65294A1 (enExample)
NL (1) NL7206027A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4667404A (en) * 1985-09-30 1987-05-26 Microelectronics Center Of North Carolina Method of interconnecting wiring planes
US4764644A (en) * 1985-09-30 1988-08-16 Microelectronics Center Of North Carolina Microelectronics apparatus

Also Published As

Publication number Publication date
FR2135256A1 (enExample) 1972-12-15
IT959699B (it) 1973-11-10
LU65294A1 (enExample) 1973-01-22
BE783109A (fr) 1972-11-06
DE2122475A1 (de) 1972-11-16
NL7206027A (enExample) 1972-11-08
DE2122475B2 (de) 1975-12-04

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees