FR3112421B1 - Procédé de réalisation d’une structure d’isolation - Google Patents

Procédé de réalisation d’une structure d’isolation Download PDF

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Publication number
FR3112421B1
FR3112421B1 FR2007356A FR2007356A FR3112421B1 FR 3112421 B1 FR3112421 B1 FR 3112421B1 FR 2007356 A FR2007356 A FR 2007356A FR 2007356 A FR2007356 A FR 2007356A FR 3112421 B1 FR3112421 B1 FR 3112421B1
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FR
France
Prior art keywords
substrate
trench
forming
producing
insulating structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR2007356A
Other languages
English (en)
Other versions
FR3112421A1 (fr
Inventor
Norbert Moussy
Cédric Giroud-Garampon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR2007356A priority Critical patent/FR3112421B1/fr
Priority to US17/369,162 priority patent/US11901395B2/en
Priority to CN202110783406.1A priority patent/CN113921553A/zh
Publication of FR3112421A1 publication Critical patent/FR3112421A1/fr
Application granted granted Critical
Publication of FR3112421B1 publication Critical patent/FR3112421B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685—Process for coatings or optical elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687—Wafer level processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1463—Pixel isolation structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Procédé de réalisation d’une structure d’isolation La présente description concerne un procédé de réalisation d’une structure d’isolation (605) dans et sur un premier substrat (100) semiconducteur, comprenant les étapes suivantes : a) former une tranchée (107) s’étendant verticalement dans le premier substrat (100) depuis une première face (100T) du premier substrat ; b) remplir la tranchée, depuis la première face du premier substrat, par une région en silicium polycristallin ; c) amincir le premier substrat du côté d’une deuxième face (100B) du premier substrat, opposée à la première face, jusqu’à exposer la région en silicium polycristallin au fond de la tranchée ; d) éliminer la région en silicium polycristallin depuis la deuxième face du premier substrat ; et e) remplir la tranchée, depuis la deuxième face du premier substrat, par un métal (601). Figure pour l'abrégé : Fig. 6
FR2007356A 2020-07-10 2020-07-10 Procédé de réalisation d’une structure d’isolation Active FR3112421B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR2007356A FR3112421B1 (fr) 2020-07-10 2020-07-10 Procédé de réalisation d’une structure d’isolation
US17/369,162 US11901395B2 (en) 2020-07-10 2021-07-07 Insulation structure forming method
CN202110783406.1A CN113921553A (zh) 2020-07-10 2021-07-12 绝缘结构形成方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2007356A FR3112421B1 (fr) 2020-07-10 2020-07-10 Procédé de réalisation d’une structure d’isolation
FR2007356 2020-07-10

Publications (2)

Publication Number Publication Date
FR3112421A1 FR3112421A1 (fr) 2022-01-14
FR3112421B1 true FR3112421B1 (fr) 2022-11-11

Family

ID=73038126

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2007356A Active FR3112421B1 (fr) 2020-07-10 2020-07-10 Procédé de réalisation d’une structure d’isolation

Country Status (3)

Country Link
US (1) US11901395B2 (fr)
CN (1) CN113921553A (fr)
FR (1) FR3112421B1 (fr)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5283201A (en) * 1988-05-17 1994-02-01 Advanced Power Technology, Inc. High density power device fabrication process
US8294240B2 (en) * 2009-06-08 2012-10-23 Qualcomm Incorporated Through silicon via with embedded decoupling capacitor
KR101732975B1 (ko) * 2010-12-03 2017-05-08 삼성전자주식회사 반도체 장치의 제조 방법
KR102591546B1 (ko) * 2016-09-02 2023-10-24 에스케이하이닉스 주식회사 가드 댐들을 갖는 이미지 센서
FR3056019B1 (fr) 2016-09-13 2018-10-12 Commissariat A L'energie Atomique Et Aux Energies Alternatives Photodiode de type spad
FR3059464B1 (fr) * 2016-11-29 2019-03-15 Commissariat A L'energie Atomique Et Aux Energies Alternatives Circuit electronique comprenant des tranchees d'isolation electrique
FR3103635A1 (fr) 2019-11-26 2021-05-28 Commissariat A L'energie Atomique Et Aux Energies Alternatives Capteur d'images comportant une pluralité de photodiodes SPAD

Also Published As

Publication number Publication date
US20220013574A1 (en) 2022-01-13
FR3112421A1 (fr) 2022-01-14
US11901395B2 (en) 2024-02-13
CN113921553A (zh) 2022-01-11

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