FR3069376B1 - Transistor comprenant une grille elargie - Google Patents
Transistor comprenant une grille elargie Download PDFInfo
- Publication number
- FR3069376B1 FR3069376B1 FR1756936A FR1756936A FR3069376B1 FR 3069376 B1 FR3069376 B1 FR 3069376B1 FR 1756936 A FR1756936 A FR 1756936A FR 1756936 A FR1756936 A FR 1756936A FR 3069376 B1 FR3069376 B1 FR 3069376B1
- Authority
- FR
- France
- Prior art keywords
- transistor including
- region
- enlarged grid
- grid
- active area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28114—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
- H01L21/28132—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects conducting part of electrode is difined by a sidewall spacer or a similar technique, e.g. oxidation under mask, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
- H01L29/66598—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET forming drain [D] and lightly doped drain [LDD] simultaneously, e.g. using implantation through the wings a T-shaped layer, or through a specially shaped layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7836—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a significant overlap between the lightly doped extension and the gate electrode
Abstract
Circuit intégré (CI) comprenant au moins un transistor MOS (T1) réalisé sur et dans une zone active comportant une région de source, une région de drain et ayant une largeur (W) comptée transversalement à la direction source-drain, le transistor ayant une région de grille (14) comprenant à son pied au moins une marche (17) qui s'étend au moins sur toute la largeur de la zone active.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1756936A FR3069376B1 (fr) | 2017-07-21 | 2017-07-21 | Transistor comprenant une grille elargie |
US16/036,453 US10797158B2 (en) | 2017-07-21 | 2018-07-16 | Transistor comprising a lengthened gate |
US17/009,293 US11270886B2 (en) | 2017-07-21 | 2020-09-01 | Transistor comprising a lengthened gate |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1756936 | 2017-07-21 | ||
FR1756936A FR3069376B1 (fr) | 2017-07-21 | 2017-07-21 | Transistor comprenant une grille elargie |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3069376A1 FR3069376A1 (fr) | 2019-01-25 |
FR3069376B1 true FR3069376B1 (fr) | 2020-07-03 |
Family
ID=59930569
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1756936A Expired - Fee Related FR3069376B1 (fr) | 2017-07-21 | 2017-07-21 | Transistor comprenant une grille elargie |
Country Status (2)
Country | Link |
---|---|
US (2) | US10797158B2 (fr) |
FR (1) | FR3069376B1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111293127B (zh) * | 2020-02-25 | 2022-04-26 | 深圳市华星光电半导体显示技术有限公司 | 一种显示面板及其制备方法 |
Family Cites Families (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4728617A (en) * | 1986-11-04 | 1988-03-01 | Intel Corporation | Method of fabricating a MOSFET with graded source and drain regions |
US4818715A (en) * | 1987-07-09 | 1989-04-04 | Industrial Technology Research Institute | Method of fabricating a LDDFET with self-aligned silicide |
DE19626089C2 (de) | 1996-06-28 | 2002-01-31 | Siemens Ag | Speicherzelle und Verfahren zu ihrer Herstellung |
KR100239459B1 (ko) | 1996-12-26 | 2000-01-15 | 김영환 | 반도체 메모리 소자 및 그 제조방법 |
US6004852A (en) * | 1997-02-11 | 1999-12-21 | United Microelectronics Corp. | Manufacture of MOSFET having LDD source/drain region |
US5837588A (en) * | 1998-01-26 | 1998-11-17 | Texas Instruments-Acer Incorporated | Method for forming a semiconductor device with an inverse-T gate lightly-doped drain structure |
US5986305A (en) * | 1998-03-30 | 1999-11-16 | Texas Instruments - Acer Incorporated | Semiconductor device with an inverse-T gate lightly-doped drain structure |
US6346467B1 (en) | 1999-09-02 | 2002-02-12 | Advanced Micro Devices, Inc. | Method of making tungsten gate MOS transistor and memory cell by encapsulating |
JP2001326289A (ja) | 2000-03-08 | 2001-11-22 | Semiconductor Energy Lab Co Ltd | 不揮発性メモリおよび半導体装置 |
JP3594550B2 (ja) | 2000-11-27 | 2004-12-02 | シャープ株式会社 | 半導体装置の製造方法 |
FR2826496A1 (fr) | 2001-06-25 | 2002-12-27 | St Microelectronics Sa | Memoire eeprom protegee contre les effets d'un claquage de transistor d'acces |
JP4790166B2 (ja) | 2001-07-05 | 2011-10-12 | Okiセミコンダクタ株式会社 | 保護トランジスタ |
JP5000057B2 (ja) | 2001-07-17 | 2012-08-15 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
EP1501130A1 (fr) | 2003-07-21 | 2005-01-26 | STMicroelectronics S.r.l. | Dispositif semi-conducteur du type MOS et son procédé de fabrication |
JP2007524242A (ja) * | 2004-02-19 | 2007-08-23 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 半導体装置及び半導体装置の製造方法 |
US7183153B2 (en) | 2004-03-12 | 2007-02-27 | Sandisk Corporation | Method of manufacturing self aligned non-volatile memory cells |
US7723235B2 (en) * | 2004-09-17 | 2010-05-25 | Renesas Technology Corp. | Method for smoothing a resist pattern prior to etching a layer using the resist pattern |
US7157784B2 (en) | 2005-01-31 | 2007-01-02 | Texas Instruments Incorporated | Drain extended MOS transistors with multiple capacitors and methods of fabrication |
KR100742284B1 (ko) | 2006-02-09 | 2007-07-24 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 형성방법 |
US7704883B2 (en) * | 2006-12-22 | 2010-04-27 | Texas Instruments Incorporated | Annealing to improve edge roughness in semiconductor technology |
JP5210675B2 (ja) | 2008-03-19 | 2013-06-12 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
JP2010040896A (ja) | 2008-08-07 | 2010-02-18 | Nec Electronics Corp | 半導体装置 |
JP2010062182A (ja) * | 2008-09-01 | 2010-03-18 | Renesas Technology Corp | 半導体集積回路装置 |
EP2202767B1 (fr) | 2008-12-24 | 2011-06-08 | STMicroelectronics (Rousset) SAS | Dispositif de surveillance de la température d'un élément |
FR2981503A1 (fr) | 2011-10-13 | 2013-04-19 | St Microelectronics Rousset | Transistor mos non sujet a l'effet hump |
CN103178096A (zh) | 2011-12-23 | 2013-06-26 | 亿而得微电子股份有限公司 | 非自校准的非易失性存储器结构 |
US20140103440A1 (en) | 2012-10-15 | 2014-04-17 | Texas Instruments Incorporated | I-shaped gate electrode for improved sub-threshold mosfet performance |
US9153454B2 (en) * | 2013-06-17 | 2015-10-06 | United Microelectronics Corp. | Method of fabricating high voltage device |
US10147800B2 (en) * | 2016-02-19 | 2018-12-04 | United Microelectronics Corp. | Method of fabricating a transistor with reduced hot carrier injection effects |
-
2017
- 2017-07-21 FR FR1756936A patent/FR3069376B1/fr not_active Expired - Fee Related
-
2018
- 2018-07-16 US US16/036,453 patent/US10797158B2/en active Active
-
2020
- 2020-09-01 US US17/009,293 patent/US11270886B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
FR3069376A1 (fr) | 2019-01-25 |
US20190027581A1 (en) | 2019-01-24 |
US11270886B2 (en) | 2022-03-08 |
US20200395466A1 (en) | 2020-12-17 |
US10797158B2 (en) | 2020-10-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB2571652A (en) | Vertical transistors with merged active area regions | |
SG10201805116YA (en) | Semiconductor devices and manufacturing methods thereof | |
TW200618280A (en) | MOS-gated transistor with reduced miller capacitance | |
TW200618286A (en) | Semiconductor device | |
TW200739876A (en) | Electrostatic discharge protection device | |
WO2005081323A3 (fr) | Dispositifs a semi-conducteur a tranchees-grilles et fabrication | |
ATE550785T1 (de) | Halbleitervorrichtung mit einem feldeffekttransistor | |
GB2538896A (en) | Normally-off junction field-effect transistors and complementary circuits | |
EP2793270A3 (fr) | Dispositif semi-conducteur au nitrure et son procédé de fabrication | |
TW200721433A (en) | Latch-up prevention in semiconductor circuits | |
SG10201805399SA (en) | Semiconductor device | |
MY186880A (en) | Semiconductor device and manufacturing method of the same | |
FR3069376B1 (fr) | Transistor comprenant une grille elargie | |
GB2569497A (en) | A power MOSFET with an integrated Schottky diode | |
SG10201804909VA (en) | Chip structure including heating element | |
JP6170856B2 (ja) | 半導体装置 | |
EA033523B1 (ru) | Кассета для обработки крови с пленочным клапаном и эластичной проставкой, а также устройство для обработки крови | |
FR3069374B1 (fr) | Transistor mos a effet bosse reduit | |
EP2760051A3 (fr) | Transistor à haure mobilité électronique (HEMT) | |
SG10201807506VA (en) | Semiconductor Devices With Bent Portions | |
WO2005117130A3 (fr) | Jonction de pointe a gradins, presentant une couche d'espacement | |
FR3064399B1 (fr) | Transistor quantique vertical | |
FR3069377B1 (fr) | Transistor mos a double blocs de grille a tension de claquage augmentee | |
EA202090701A1 (ru) | Впитывающее изделие | |
JP2019514206A5 (fr) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLSC | Publication of the preliminary search report |
Effective date: 20190125 |
|
PLFP | Fee payment |
Year of fee payment: 3 |
|
PLFP | Fee payment |
Year of fee payment: 4 |
|
ST | Notification of lapse |
Effective date: 20220305 |