CN111293127B - 一种显示面板及其制备方法 - Google Patents

一种显示面板及其制备方法 Download PDF

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CN111293127B
CN111293127B CN202010116241.8A CN202010116241A CN111293127B CN 111293127 B CN111293127 B CN 111293127B CN 202010116241 A CN202010116241 A CN 202010116241A CN 111293127 B CN111293127 B CN 111293127B
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layer
electrode
active layer
via hole
display panel
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CN111293127A (zh
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唐甲
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/758,533 priority patent/US11362163B2/en
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Abstract

本发明提供一种显示面板及其制备方法。所述显示面板包括衬底层、位于所述衬底层上的遮光金属层和存储电容的第一极板、位于所述衬底层上且覆盖所述遮光金属层和所述第一极板的缓冲层、位于所述缓冲层上的有源层和所述存储电容的第二极板、位于所述缓冲层和所述有源层上的栅绝缘层、以及位于所述栅绝缘层上的源极、栅极和漏极。其中，所述源极和所述漏极的宽度均小于所述有源层的宽度。本发明通过增加有源层导体化面积，使有源层与源极、漏极的边缘接触路径增加，利用有源层导体化时横向扩散现象，使源极、漏极与有源层的边缘接触良率增加，从而大大提升了薄膜晶体管器件的导通特性。

Description

一种显示面板及其制备方法
技术领域
本发明涉及显示技术领域，尤其涉及一种显示面板及其制备方法。
背景技术
目前顶栅结构的薄膜晶体管，结构复杂、膜层较多，导致时间成本和物料成本消耗较高，且良率也带来一定程度的损失，因此需开发制程减少且器件功能较好的顶栅薄膜晶体管。
现有技术采用源极、栅极和漏极同层制备的新制程制备显示面板，与原有的顶栅结构的薄膜晶体管制程数量相比，节省一次金属成膜、光刻、蚀刻以及层间绝缘层，大大节省成本，但由于与原有的顶栅结构的薄膜晶体管制程差异较大，特别是有源层。由于源极、栅极和漏极的材料为低阻抗金属，无法使用干法蚀刻；在湿法蚀刻制程时，金属蚀刻液与有源层持续接触，导致有源层的膜厚、接触阻抗等受损严重；且有源层会受到两次栅绝缘层的干法蚀刻制程处理，也会损伤有源层，会导致源极、漏极与有源层无法导通，从而导致薄膜晶体管器件的功能无法达成。故，有必要改善这一缺陷。
发明内容
本发明实施例提供一种显示面板，用于解决现有技术的显示面板，由于采用源极、栅极和漏极同层制备的技术，在湿法蚀刻制程时，金属蚀刻液与有源层持续接触，导致有源层的膜厚、接触阻抗等受损严重，导致源极、漏极与有源层无法导通，从而导致薄膜晶体管器件的功能无法达成的技术问题。
本发明实施例提供一种显示面板，包括衬底层、位于所述衬底层上的遮光金属层和存储电容的第一极板、位于所述衬底层上且覆盖所述遮光金属层和所述第一极板的缓冲层、位于所述缓冲层上的有源层和所述存储电容的第二极板、位于所述缓冲层和所述有源层上的栅绝缘层、以及位于所述栅绝缘层上的源极、栅极和漏极。其中，所述源极通过第一过孔与所述遮光金属层相连。所述栅绝缘层上设置有第二过孔和第三过孔，所述源极通过所述第二过孔与所述有源层的一侧相连，所述漏极通过所述第三过孔与所述有源层的另一侧相连。其中，所述源极和所述漏极的宽度均小于所述有源层的宽度，所述源极在所述有源层上的投影的边缘与所述第二过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米，所述漏极在所述有源层上的投影的边缘与所述第三过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米。
进一步的，所述有源层的材料为铟镓锌氧化物。
进一步的，所述显示面板还包括位于所述缓冲层上且覆盖所述第二极板、所述源极、所述栅极和所述漏极的钝化层、位于所述钝化层上且对应于所述显示面板的透光区的色阻层、位于所述钝化层上且覆盖所述色阻层的保护层、位于所述保护层上的像素电极层、以及位于所述保护层和所述像素电极层上的像素定义层，其中，所述像素电极层通过第四过孔与所述源极相连。
进一步的，所述像素定义层的材料为疏水性材料。
进一步的，所述像素定义层的材料为非疏水性材料。
本发明实施例提供一种显示面板的制备方法，包括步骤：提供一衬底层；在所述衬底层上制备遮光金属层和存储电容的第一极板；在所述衬底层上制备缓冲层，所述缓冲层覆盖所述遮光金属层和所述第一极板；在所述缓冲层上制备有源层和所述存储电容的第二极板；在所述缓冲层上制备栅绝缘层，所述栅绝缘层覆盖所述有源层和所述第二极板；将所述栅绝缘层和所述缓冲层刻蚀，分别形成第一过孔、第二过孔和第三过孔；对所述有源层对应于所述第二过孔和所述第三过孔的区域进行第一次导体化；在所述栅绝缘层上制备源极、栅极和漏极，所述源极通过所述第一过孔与所述遮光金属层相连，通过所述第二过孔与所述有源层的一侧相连，所述漏极通过所述第三过孔与所述有源层的另一侧相连，其中，所述源极和所述漏极的宽度均小于所述有源层的宽度，所述源极在所述有源层上的投影的边缘与所述第二过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米，所述漏极在所述有源层上的投影的边缘与所述第三过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米；去除未覆盖所述源极、所述栅极和所述漏极的区域的所述栅绝缘层；对所述有源层进行第二次导体化。
进一步的，所述有源层的材料为铟镓锌氧化物。
进一步的，还包括步骤：在所述缓冲层上制备钝化层，所述钝化层覆盖所述第二极板、所述源极、所述栅极和所述漏极；在所述钝化层上制备色阻层，所述色阻层对应于所述显示面板的透光区；在所述钝化层上制备保护层，所述保护层覆盖所述色阻层；将所述保护层和所述钝化层刻蚀，形成第四过孔；在所述保护层上制备像素电极层，所述像素电极层通过所述第四过孔与所述源极相连；在所述保护层和所述像素电极层上制备像素定义层。
进一步的，所述像素定义层的材料为疏水性材料。
进一步的，所述像素定义层的材料为非疏水性材料。
有益效果：本发明实施例提供的一种显示面板，其源极和漏极的宽度均小于有源层的宽度，通过增加有源层导体化面积，使有源层与源极、漏极的边缘接触路径增加，利用有源层导体化时横向扩散现象，使源极、漏极与有源层的边缘接触良率增加，从而大大提升了薄膜晶体管器件的导通特性，改善和优化了源极、栅极和漏极同层制备的薄膜晶体管中源极、漏极与有源层导通性能，能实现量产化。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例一提供的显示面板的基本结构示意图；
图2是本发明实施例一提供的显示面板的部分结构的俯视图；
图3a～3c是本发明实施例一提供的显示面板的有源层导体化过程的示意图；
图4是本发明实施例二提供的显示面板的基本结构示意图；
图5是本发明实施例一提供的显示面板的制备方法流程图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参阅图1，本发明实施例一提供的显示面板的基本结构示意图，从图中可以很直观地看到本发明的各组成部分，以及各组成部分之间的相对位置关系，所述显示面板包括衬底层101、位于所述衬底层101上的遮光金属层102和存储电容的第一极板103、位于所述衬底层101上且覆盖所述遮光金属层102和所述第一极板103的缓冲层104、位于所述缓冲层104上的有源层105和所述存储电容的第二极板106、位于所述缓冲层104和所述有源层105上的栅绝缘层107、以及位于所述栅绝缘层107上的源极108、栅极109和漏极110。其中，所述源极108通过第一过孔111与所述遮光金属层102相连。所述栅绝缘层107上设置有第二过孔112和第三过孔113，所述源极108通过所述第二过孔112与所述有源层105的一侧相连，所述漏极110通过所述第三过孔113与所述有源层105的另一侧相连。
需要说明的是，所述源极108、所述栅极109和所述漏极110的材料为低阻抗金属，无法使用干法蚀刻制备，在湿法蚀刻制程时，金属蚀刻液与所述有源层105持续接触，导致所述第二过孔112和所述第三过孔113内未覆盖所述栅绝缘层107、所述源极108、所述栅极109和所述漏极110的所述有源层105的区域114、115被蚀刻。
在一种实施例中，所述有源层105的材料为铟镓锌氧化物。
在一种实施例中，所述显示面板可以搭配透明电容，也可以不搭配透明电容。在一些实施例中，所述存储电容的电极板可以由像素电极或遮光金属层与源极、栅极或漏极的金属构成，其他根据本实施例提供的显示面板的结构调整设计的电容都在本发明实施例保护的范围内。
在一种实施例中，所述显示面板还包括第二遮光金属层116和第二栅极117，所述第二栅极117通过第五过孔118与所述第二遮光金属层116相连。
继续参阅图2，本发明实施例一提供的显示面板的部分结构的俯视图，所述显示面板包括有源层105、栅绝缘层107、源极108、栅极109和漏极110。其中，图1中的第二过孔在所述有源层105上的投影为第一区域201，图1中的第三过孔在所述有源层105上的投影为第二区域202。
在本实施例中，所述源极108和所述漏极110的宽度Ws、Wd均小于所述有源层105的宽度Wa，所述源极108在所述有源层105上的投影的边缘与所述第一区域201的边缘之间的垂直距离d1的范围为大于0且小于或者等于2微米，所述漏极110在所述有源层105上的投影的边缘与所述第二区域202的边缘之间的垂直距离d2的范围为大于0且小于或者等于2微米。
需要说明的是，本实施例提供的显示面板，其源极和漏极的宽度Ws、Wd均小于有源层的宽度Wa，当对有源层导体化时，有源层未被上方源极、漏极等遮盖的地方均能导体化，增加有源层导体化的面积，因此与源极、漏极的边缘接触路径增加，利用有源层导体化时横向扩散现象，使源极、漏极与有源层的边缘接触良率增加，从而大大提升了薄膜晶体管器件的导通特性。
具体地，请参阅图3a～3c，本发明实施例一提供的显示面板的有源层导体化过程的示意图，以漏极110与有源层105的接触面积为例，当在栅绝缘层(图中未示出)上刻蚀形成过孔后，如图3a所示，对有源层105对应于所述过孔的第二区域202进行第一次导体化。
第一次导体化结束后，在所述栅绝缘层(图中未示出)上制备源极(图中未示出)、栅极109和漏极110，其中，所述漏极110通过所述过孔与所述有源层105相接触，接触面积为图3b中阴影区域，由于所述源极(图中未示出)、所述栅极109和所述漏极110的材料为低阻抗金属，无法使用干法蚀刻，在湿法蚀刻制程时，金属蚀刻液与所述有源层105持续接触，导致第二区域202内未覆盖栅绝缘层(图中未示出)及所述漏极110的区域(即第二区域202内的非阴影区域)被蚀刻。
如图3c所示，继续对所述有源层105进行第二次导体化，由于所述漏极110的宽度比所述有源层105的宽度小，即所述漏极110有三条边与所述有源层105接触，即接触路径增加；且所述漏极110在所述有源层105上的投影的边缘与所述第二区域202的边缘之间的垂直距离的范围为大于0且小于或者等于2微米，而导体化时所述有源层105具有横向扩散现象，扩散范围一般是2微米左右，从而使得所述漏极110的上边沿与下边沿与所述有源层105相接触的位置也能导体化，降低接触阻抗，且上边沿和下边沿的重叠部分能与所述第二区域202中先前已导体化的阴影区域相导通，即增加了所述漏极110与所述有源层105接触部位的导体化面积，形成完整的导体化路径，提升了薄膜晶体管器件的导通特性。在其他实施例中，源极与有源层的接触面积增大的原理与此实施例原理相同，以下不再赘述。
请参阅图4，本发明实施例二提供的显示面板的基本结构示意图，从图中可以很直观地看到本发明的各组成部分，以及各组成部分之间的相对位置关系，所述显示面板包括衬底层101、位于所述衬底层101上的遮光金属层102和存储电容的第一极板103、位于所述衬底层101上且覆盖所述遮光金属层102和所述第一极板103的缓冲层104、位于所述缓冲层104上的有源层105和所述存储电容的第二极板106、位于所述缓冲层104和所述有源层105上的栅绝缘层107、以及位于所述栅绝缘层107上的源极108、栅极109和漏极110。其中，所述源极108通过第一过孔111与所述遮光金属层102相连。所述栅绝缘层107上设置有第二过孔112和第三过孔113，所述源极108通过所述第二过孔112与所述有源层105的一侧相连，所述漏极110通过所述第三过孔113与所述有源层105的另一侧相连。
需要说明的是，所述源极108、所述栅极109和所述漏极110的材料为低阻抗金属，无法使用干法蚀刻制备，在湿法蚀刻制程时，金属蚀刻液与所述有源层105持续接触，导致所述第二过孔112和所述第三过孔113内未覆盖所述栅绝缘层107、所述源极108、所述栅极109和所述漏极110的区域的所述有源层105被蚀刻。
其中，所述显示面板还包括位于所述缓冲层104上且覆盖所述第二极板106、所述源极108、所述栅极109和所述漏极110的钝化层119、位于所述钝化层119上且对应于所述显示面板的透光区的色阻层120、位于所述钝化层119上且覆盖所述色阻层120的保护层121、位于所述保护层121上的像素电极层122、以及位于所述保护层121和所述像素电极层122上的像素定义层124，其中，所述像素电极层122通过第四过孔123与所述源极108相连。
具体的，像素定义层124所暴露出来的像素电极层122上方还可设置有机发光层与公共电极层等，并非本案技术重点，因此不进行详述。
与图2的实施例类似，在本实施例中，所述源极108和所述漏极110的宽度均小于所述有源层105的宽度，所述源极108在所述有源层105上的投影的边缘与所述第二过孔112在所述有源层105上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米，所述漏极110在所述有源层105上的投影的边缘与所述第三过孔113在所述有源层105上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米。
在一种实施例中，所述显示面板还包括第二遮光金属层116和第二栅极117，所述第二栅极117通过第五过孔118与所述第二遮光金属层116相连。
在一种实施例中，所述像素定义层124的材料为疏水性材料。即所述显示面板可采用喷墨打印技术形成有机发光层，与其对应的有机发光材料为有机发光墨水。
在一种实施例中，所述像素定义层124的材料为非疏水性材料。即所述显示面板可应用蒸镀技术形成有机发光层，与其对应的有机发光材料为蒸镀型有机材料。
请参阅图5，本发明实施例一提供的显示面板的制备方法流程图，所述制备方法包括步骤：
S501、提供一衬底层；
S502、在所述衬底层上制备遮光金属层和存储电容的第一极板；
S503、在所述衬底层上制备缓冲层，所述缓冲层覆盖所述遮光金属层和所述第一极板；
S504、在所述缓冲层上制备有源层和所述存储电容的第二极板；
S505、在所述缓冲层上制备栅绝缘层，所述栅绝缘层覆盖所述有源层和所述第二极板；
S506、将所述栅绝缘层和所述缓冲层刻蚀，分别形成第一过孔、第二过孔和第三过孔；
S507、对所述有源层对应于所述第二过孔和所述第三过孔的区域进行第一次导体化；
S508、在所述栅绝缘层上制备源极、栅极和漏极，所述源极通过所述第一过孔与所述遮光金属层相连，通过所述第二过孔与所述有源层的一侧相连，所述漏极通过所述第三过孔与所述有源层的另一侧相连，其中，所述源极和所述漏极的宽度均小于所述有源层的宽度，所述源极在所述有源层上的投影的边缘与所述第二过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米，所述漏极在所述有源层上的投影的边缘与所述第三过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米；
S509、去除未覆盖所述源极、所述栅极和所述漏极的区域的所述栅绝缘层；
S510、对所述有源层进行第二次导体化。
具体导体化过程参见附图3a～3c的说明。
在一种实施例中，所述有源层的材料为铟镓锌氧化物。
在一种实施例中，所述显示面板的制备方法还包括步骤：在所述缓冲层上制备钝化层，所述钝化层覆盖所述第二极板、所述源极、所述栅极和所述漏极；在所述钝化层上制备色阻层，所述色阻层对应于所述显示面板的透光区；在所述钝化层上制备保护层，所述保护层覆盖所述色阻层；将所述保护层和所述钝化层刻蚀，形成第四过孔；在所述保护层上制备像素电极层，所述像素电极层通过所述第四过孔与所述源极相连；在所述保护层和所述像素电极层上制备像素定义层。
在一种实施例中，所述像素定义层的材料为疏水性材料。即所述显示面板可采用喷墨打印技术形成有机发光层，与其对应的有机发光材料为有机发光墨水。
在一种实施例中，所述像素定义层的材料为非疏水性材料。即所述显示面板可应用蒸镀技术形成有机发光层，与其对应的有机发光材料为蒸镀型有机材料。
本发明实施例还提供一种显示装置，包括驱动芯片和上述的显示面板。本发明实施例提供的显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相机、导航仪等任何具有显示功能的产品或部件。
综上所述，本发明实施例提供的一种显示面板，其源极和漏极的宽度均小于有源层的宽度，通过增加有源层导体化面积，使有源层与源极、漏极的边缘接触路径增加，利用有源层导体化时横向扩散现象，使源极、漏极与有源层的边缘接触良率增加，从而大大提升了薄膜晶体管器件的导通特性，改善和优化了源极、栅极和漏极同层制备的薄膜晶体管中源极、漏极与有源层导通性能，能实现量产化，解决了现有技术的显示面板，由于采用源极、栅极和漏极同层制备的技术，在湿法蚀刻制程时，金属蚀刻液与有源层持续接触，导致有源层的膜厚、接触阻抗等受损严重，导致源极、漏极与有源层无法导通，从而导致薄膜晶体管器件的功能无法达成的技术问题。
以上对本发明实施例所提供的一种显示面板及其制备方法进行了详细介绍。应理解，本文所述的示例性实施方式应仅被认为是描述性的，用于帮助理解本发明的方法及其核心思想，而并不用于限制本发明。

Claims (10)

1.一种显示面板，其特征在于，包括衬底层、位于所述衬底层上的遮光金属层和存储电容的第一极板、位于所述衬底层上且覆盖所述遮光金属层和所述第一极板的缓冲层、位于所述缓冲层上的有源层和所述存储电容的第二极板、位于所述缓冲层和所述有源层上的栅绝缘层、以及位于所述栅绝缘层上的源极、栅极和漏极；其中，所述源极通过第一过孔与所述遮光金属层相连；
所述栅绝缘层上设置有第二过孔和第三过孔，所述源极通过所述第二过孔与所述有源层的一侧相连，所述漏极通过所述第三过孔与所述有源层的另一侧相连；
其中，所述源极和所述漏极的宽度均小于所述有源层的宽度，所述源极在所述有源层上的投影的边缘与所述第二过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米，所述漏极在所述有源层上的投影的边缘与所述第三过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米。
2.如权利要求1所述的显示面板，其特征在于，所述有源层的材料为铟镓锌氧化物。
3.如权利要求1所述的显示面板，其特征在于，所述显示面板还包括位于所述缓冲层上且覆盖所述第二极板、所述源极、所述栅极和所述漏极的钝化层、位于所述钝化层上且对应于所述显示面板的透光区的色阻层、位于所述钝化层上且覆盖所述色阻层的保护层、位于所述保护层上的像素电极层、以及位于所述保护层和所述像素电极层上的像素定义层，其中，所述像素电极层通过第四过孔与所述源极相连。
4.如权利要求3所述的显示面板，其特征在于，所述像素定义层的材料为疏水性材料。
5.如权利要求3所述的显示面板，其特征在于，所述像素定义层的材料为非疏水性材料。
6.一种显示面板的制备方法，其特征在于，包括步骤：
提供一衬底层；
在所述衬底层上制备遮光金属层和存储电容的第一极板；
在所述衬底层上制备缓冲层，所述缓冲层覆盖所述遮光金属层和所述第一极板；
在所述缓冲层上制备有源层和所述存储电容的第二极板；
在所述缓冲层上制备栅绝缘层，所述栅绝缘层覆盖所述有源层和所述第二极板；
将所述栅绝缘层和所述缓冲层刻蚀，分别形成第一过孔、第二过孔和第三过孔；
对所述有源层对应于所述第二过孔和所述第三过孔的区域进行第一次导体化；
在所述栅绝缘层上制备源极、栅极和漏极，所述源极通过所述第一过孔与所述遮光金属层相连，通过所述第二过孔与所述有源层的一侧相连，所述漏极通过所述第三过孔与所述有源层的另一侧相连，其中，所述源极和所述漏极的宽度均小于所述有源层的宽度，所述源极在所述有源层上的投影的边缘与所述第二过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米，所述漏极在所述有源层上的投影的边缘与所述第三过孔在所述有源层上的投影的边缘之间的垂直距离的范围为大于0且小于或者等于2微米；
去除未覆盖所述源极、所述栅极和所述漏极的区域的所述栅绝缘层；
对所述有源层进行第二次导体化。
7.如权利要求6所述的显示面板的制备方法，其特征在于，所述有源层的材料为铟镓锌氧化物。
8.如权利要求6所述的显示面板的制备方法，其特征在于，还包括步骤：
在所述缓冲层上制备钝化层，所述钝化层覆盖所述第二极板、所述源极、所述栅极和所述漏极；
在所述钝化层上制备色阻层，所述色阻层对应于所述显示面板的透光区；
在所述钝化层上制备保护层，所述保护层覆盖所述色阻层；
将所述保护层和所述钝化层刻蚀，形成第四过孔；
在所述保护层上制备像素电极层，所述像素电极层通过所述第四过孔与所述源极相连；
在所述保护层和所述像素电极层上制备像素定义层。
9.如权利要求8所述的显示面板的制备方法，其特征在于，所述像素定义层的材料为疏水性材料。
10.如权利要求8所述的显示面板的制备方法，其特征在于，所述像素定义层的材料为非疏水性材料。
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CN113629151B (zh) * 2021-07-29 2023-07-25 深圳市华星光电半导体显示技术有限公司 阵列基板及其制备方法
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CN108987480B (zh) * 2017-06-02 2021-11-16 上海和辉光电股份有限公司 双栅薄膜晶体管及其制备方法、显示面板及其制备方法
FR3069376B1 (fr) * 2017-07-21 2020-07-03 Stmicroelectronics (Rousset) Sas Transistor comprenant une grille elargie
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CN109411531B (zh) * 2018-10-18 2022-04-19 京东方科技集团股份有限公司 一种薄膜晶体管及其制作方法、阵列基板、显示装置
CN110098262B (zh) * 2019-05-15 2021-10-26 云谷（固安）科技有限公司 一种薄膜晶体管、显示面板和显示装置
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