FR2959351B1 - Procede de preparation d’une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium - Google Patents

Procede de preparation d’une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium

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Publication number
FR2959351B1
FR2959351B1 FR1053154A FR1053154A FR2959351B1 FR 2959351 B1 FR2959351 B1 FR 2959351B1 FR 1053154 A FR1053154 A FR 1053154A FR 1053154 A FR1053154 A FR 1053154A FR 2959351 B1 FR2959351 B1 FR 2959351B1
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France
Prior art keywords
type
silicon wafer
layer
boron
phosphorus
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Active
Application number
FR1053154A
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English (en)
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FR2959351A1 (fr
Inventor
Barbara Bazer-Bachi
Mustapha Lemiti
Quang Nam Le
Yvon Pellegrin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Synergies Pour Equipements Micro-Electronique Fr
Centre National de la Recherche Scientifique CNRS
Institut National des Sciences Appliquees de Lyon
EDF ENR PWT SAS
Original Assignee
Centre National de la Recherche Scientifique CNRS
Photowatt International SA
Institut National des Sciences Appliquees de Lyon
SYNERGIES POUR EQUIPEMENTS MICRO ELECTRONIQUE COMMUNICATION OPTIQUE SA
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Priority to FR1053154A priority Critical patent/FR2959351B1/fr
Application filed by Centre National de la Recherche Scientifique CNRS, Photowatt International SA, Institut National des Sciences Appliquees de Lyon , SYNERGIES POUR EQUIPEMENTS MICRO ELECTRONIQUE COMMUNICATION OPTIQUE SA filed Critical Centre National de la Recherche Scientifique CNRS
Priority to PCT/FR2011/050948 priority patent/WO2011135249A1/fr
Priority to US13/643,641 priority patent/US9082924B2/en
Priority to CN201180021231.5A priority patent/CN102971867B/zh
Priority to KR1020127030885A priority patent/KR101777277B1/ko
Priority to DE112011101439T priority patent/DE112011101439T5/de
Priority to JP2013506715A priority patent/JP5940519B2/ja
Publication of FR2959351A1 publication Critical patent/FR2959351A1/fr
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Publication of FR2959351B1 publication Critical patent/FR2959351B1/fr
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
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    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
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    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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    • H01L31/02—Details
    • H01L31/0232—Optical elements or arrangements associated with the device
    • H01L31/02327—Optical elements or arrangements associated with the device the optical elements being integrated or being directly associated to the device, e.g. back reflectors
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    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02366—Special surface textures of the substrate or of a layer on the substrate, e.g. textured ITO/glass substrate or superstrate, textured polymer layer on glass substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L31/0264—Inorganic materials
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    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
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    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
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    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
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    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Electromagnetism (AREA)
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  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Sustainable Energy (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Photovoltaic Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

La présente invention concerne un procédé de préparation sur une plaque de silicium de structure de type n+pp+ ou de type p+nn+ qui comprend les étapes successives suivantes : a) Sur une plaque de silicium (1) de type p ou de type n qui comprend une face avant (8) et une face arrière (9), on forme par PECVD sur la face arrière (9) une couche d'oxyde de silicium dopée au bore (BSG) (2), puis une couche barrière à la diffusion de SiOx (3). b) On diffuse une source de phosphore de manière à ce que le phosphore et le bore co-diffusent et à former en outre : - sur la face avant (8) de la plaque obtenue à l'issue de l'étape a) : • une couche d'oxyde de silicium dopée au phosphore (PSG) (4), • une zone dopée n+ (5), - et sur la face arrière de la plaque obtenue à l'issue de l'étape a) : • une zone riche en bore (BRL) (6), ainsi qu' • une zone dopée p+ (7). c) On retire les couches d'oxydes BSG (2), PSG (4) et de SiOx (3), on oxyde la BRL (6) et on retire la couche résultante de cette oxydation. L'invention concerne aussi une plaque de silicium de structure de type n+pp+ ou de type p+nn+ susceptible d'être obtenue par ce procédé de préparation, ainsi qu'une cellule photovoltaïque fabriquée à partir d'une telle plaque de silicium.
FR1053154A 2010-04-26 2010-04-26 Procede de preparation d’une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium Active FR2959351B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR1053154A FR2959351B1 (fr) 2010-04-26 2010-04-26 Procede de preparation d’une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium
US13/643,641 US9082924B2 (en) 2010-04-26 2011-04-26 Method for preparing an N+PP+ or P+NN+ structure on silicon wafers
CN201180021231.5A CN102971867B (zh) 2010-04-26 2011-04-26 在硅晶片上制备n+pp+型或p+nn+型结构的方法
KR1020127030885A KR101777277B1 (ko) 2010-04-26 2011-04-26 실리콘 웨이퍼들 상에 ｎ+ｐｐ+ 또는 ｐ+ｎｎ+ 구조를 준비하는 방법
PCT/FR2011/050948 WO2011135249A1 (fr) 2010-04-26 2011-04-26 Procédé de préparation d'une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium
DE112011101439T DE112011101439T5 (de) 2010-04-26 2011-04-26 Verfahren zur Herstellung einer Struktur vom n+pp+-Typ oder p+nn+-Typ auf Siliciumwafern
JP2013506715A JP5940519B2 (ja) 2010-04-26 2011-04-26 シリコンウェハ上にｎ＋ｐｐ＋型又はｐ＋ｎｎ＋型の構造を作製する方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1053154A FR2959351B1 (fr) 2010-04-26 2010-04-26 Procede de preparation d’une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium

Publications (2)

Publication Number Publication Date
FR2959351A1 FR2959351A1 (fr) 2011-10-28
FR2959351B1 true FR2959351B1 (fr) 2013-11-08

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FR1053154A Active FR2959351B1 (fr) 2010-04-26 2010-04-26 Procede de preparation d’une structure de type n+pp+ ou de type p+nn+ sur plaques de silicium

Country Status (7)

Country Link
US (1) US9082924B2 (fr)
JP (1) JP5940519B2 (fr)
KR (1) KR101777277B1 (fr)
CN (1) CN102971867B (fr)
DE (1) DE112011101439T5 (fr)
FR (1) FR2959351B1 (fr)
WO (1) WO2011135249A1 (fr)

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CN103178152B (zh) * 2011-12-22 2015-09-16 茂迪股份有限公司 结晶硅太阳能电池的制造方法
JP2014045036A (ja) * 2012-08-24 2014-03-13 Amaya Corp 半導体装置の製造方法
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KR20150007394A (ko) * 2013-07-10 2015-01-21 현대중공업 주식회사 양면수광형 태양전지의 제조방법
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JP6187689B2 (ja) * 2014-06-02 2017-08-30 株式会社Sumco シリコンウェーハの製造方法
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CN104538485A (zh) * 2014-11-06 2015-04-22 浙江正泰太阳能科技有限公司 一种双面电池的制备方法
CN105261670B (zh) * 2015-08-31 2017-06-16 湖南红太阳光电科技有限公司 晶体硅电池的低压扩散工艺
WO2017109835A1 (fr) * 2015-12-21 2017-06-29 三菱電機株式会社 Procédé de fabrication de cellule solaire
CN105702809A (zh) * 2016-04-07 2016-06-22 南昌大学 一种低温气相沉积固态扩散源制备用于太阳电池的掺杂硅的方法
CN108110088B (zh) * 2017-12-21 2020-11-10 苏州阿特斯阳光电力科技有限公司 太阳能电池的低压扩散工艺及利用其制备得到的太阳能电池
CN109301031B (zh) * 2018-09-12 2021-08-31 江苏林洋光伏科技有限公司 N型双面电池的制作方法
CN111384210B (zh) * 2019-12-27 2021-10-22 横店集团东磁股份有限公司 一种perc叠加se的高开压扩散高方阻工艺
CN111755563B (zh) * 2020-05-26 2022-03-18 晶澳（扬州）太阳能科技有限公司 一种p型单晶硅硼背场双面电池及其制备方法
CN111916347B (zh) * 2020-08-13 2023-03-21 中国电子科技集团公司第四十四研究所 一种用于soi片的磷扩散掺杂方法
CN113363334A (zh) * 2021-06-01 2021-09-07 常州时创能源股份有限公司 一种硼掺杂选择性发射极的制备方法
CN113629172B (zh) * 2021-09-14 2023-03-14 常州时创能源股份有限公司 一种太阳能电池的硼扩散方法及其制造方法
CN115020539A (zh) * 2022-05-27 2022-09-06 天津爱旭太阳能科技有限公司 一种perc电池背面结构、制备工艺及perc电池

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TW201027766A (en) * 2008-08-27 2010-07-16 Applied Materials Inc Back contact solar cells using printed dielectric barrier
DE102010029741B4 (de) * 2010-06-07 2013-02-28 Solarworld Innovations Gmbh Verfahren zum Herstellen von Silizium-Wafern, Silizium Wafer und Verwendung eines Silizium-Wafer als Silizium-Solarzelle

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CN102971867A (zh) 2013-03-13
KR101777277B1 (ko) 2017-09-11
KR20130129818A (ko) 2013-11-29
FR2959351A1 (fr) 2011-10-28
DE112011101439T5 (de) 2013-04-11
CN102971867B (zh) 2015-11-25
JP5940519B2 (ja) 2016-06-29
US20130112260A1 (en) 2013-05-09
WO2011135249A1 (fr) 2011-11-03
JP2013526049A (ja) 2013-06-20
US9082924B2 (en) 2015-07-14

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