FR2840443B1 - Element memoire presentant un nombre defini de cycles d'ecriture - Google Patents
Element memoire presentant un nombre defini de cycles d'ecritureInfo
- Publication number
- FR2840443B1 FR2840443B1 FR0206863A FR0206863A FR2840443B1 FR 2840443 B1 FR2840443 B1 FR 2840443B1 FR 0206863 A FR0206863 A FR 0206863A FR 0206863 A FR0206863 A FR 0206863A FR 2840443 B1 FR2840443 B1 FR 2840443B1
- Authority
- FR
- France
- Prior art keywords
- memory element
- defined number
- writing cycles
- cycles
- writing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Logic Circuits (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0206863A FR2840443B1 (fr) | 2002-06-04 | 2002-06-04 | Element memoire presentant un nombre defini de cycles d'ecriture |
US10/453,466 US6977840B2 (en) | 2002-06-04 | 2003-06-03 | Storage element with a defined number of write cycles |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0206863A FR2840443B1 (fr) | 2002-06-04 | 2002-06-04 | Element memoire presentant un nombre defini de cycles d'ecriture |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2840443A1 FR2840443A1 (fr) | 2003-12-05 |
FR2840443B1 true FR2840443B1 (fr) | 2005-04-29 |
Family
ID=29558961
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0206863A Expired - Lifetime FR2840443B1 (fr) | 2002-06-04 | 2002-06-04 | Element memoire presentant un nombre defini de cycles d'ecriture |
Country Status (2)
Country | Link |
---|---|
US (1) | US6977840B2 (fr) |
FR (1) | FR2840443B1 (fr) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060271939A1 (en) * | 2005-05-11 | 2006-11-30 | Eric Joris | Enterprise-to-enterprise integration |
US20090119444A1 (en) * | 2007-11-01 | 2009-05-07 | Zerog Wireless, Inc., Delaware Corporation | Multiple write cycle memory using redundant addressing |
JP2011217349A (ja) | 2010-03-19 | 2011-10-27 | Panasonic Corp | 水晶発振回路 |
CN112863583A (zh) * | 2019-11-28 | 2021-05-28 | 长鑫存储技术有限公司 | 可编程存储单元、可编程存储阵列及其读写方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4310879A (en) * | 1979-03-08 | 1982-01-12 | Pandeya Arun K | Parallel processor having central processor memory extension |
JPS6374188A (ja) * | 1986-09-18 | 1988-04-04 | Canon Inc | 機能ブロツク選択装置 |
JP2654215B2 (ja) * | 1990-01-19 | 1997-09-17 | 株式会社東芝 | 半導体メモリシステム |
JP2784550B2 (ja) * | 1990-03-05 | 1998-08-06 | 三菱電機株式会社 | 半導体記憶装置 |
US5200652A (en) * | 1991-11-13 | 1993-04-06 | Micron Technology, Inc. | Programmable/reprogrammable structure combining both antifuse and fuse elements |
US6002638A (en) * | 1998-01-20 | 1999-12-14 | Microchip Technology Incorporated | Memory device having a switchable clock output and method therefor |
-
2002
- 2002-06-04 FR FR0206863A patent/FR2840443B1/fr not_active Expired - Lifetime
-
2003
- 2003-06-03 US US10/453,466 patent/US6977840B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US20040017702A1 (en) | 2004-01-29 |
US6977840B2 (en) | 2005-12-20 |
FR2840443A1 (fr) | 2003-12-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2770328B1 (fr) | Point memoire remanent | |
NO20042259L (no) | Transaksjons minnehandteringsprogram | |
DE60214496D1 (de) | Speicheranordnung | |
DE60210416D1 (de) | Speicherkarte | |
DE60202898D1 (de) | Speicherzugriffsarbitrierung mit garantierter Datentransferrate | |
FI20021283A0 (fi) | Datasiirtoyhteyden järjestäminen | |
DE60021819D1 (de) | Datenschieberegister | |
DE60307798D1 (de) | Arbitrierung von gemeinsamen Speicher | |
DE69622115D1 (de) | Verbesserungen an nichtflüchtigen Speicheranordnungen oder bezüglich derselben | |
DE60212004D1 (de) | Speicheranordnung | |
DE60233624D1 (de) | Speicheranordnung | |
DE59913627D1 (de) | Integrierter Speicher | |
DE60119111D1 (de) | Zugriffssteuerung zu einem datenverarbeitungsmittel | |
FR2840443B1 (fr) | Element memoire presentant un nombre defini de cycles d'ecriture | |
DE60038133D1 (de) | Nicht-flüchtiger Speicher | |
DE69812038D1 (de) | Nichtflüchtiger MOS-Speicher | |
FR2785406B1 (fr) | Memoire a acces vectoriel | |
FR2845178B3 (fr) | Peripherique d'ordinateur a fonction de memoire flash | |
FR2807562B1 (fr) | Dispositif de lecture d'une memoire | |
IT1318979B1 (it) | Architettura di memoria a semiconduttore | |
DE59913808D1 (de) | Integrierter Speicher | |
FR2793333B1 (fr) | Dispositif a memoire contenant des droits | |
DE59902403D1 (de) | Integrierter Speicher | |
DE60133021D1 (de) | Speicheranordnung | |
DE60315918D1 (de) | Load-linked/store conditional Mechanismus in einem cc-numa (cache-coherent nonuniform memory access) System |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 15 |
|
PLFP | Fee payment |
Year of fee payment: 16 |
|
PLFP | Fee payment |
Year of fee payment: 17 |
|
PLFP | Fee payment |
Year of fee payment: 19 |
|
PLFP | Fee payment |
Year of fee payment: 20 |