FR2828766B1 - Circuit integre comprenant des elements actifs et au moins un element passif, notamment des cellules memoire dram et procede de fabrication - Google Patents

Circuit integre comprenant des elements actifs et au moins un element passif, notamment des cellules memoire dram et procede de fabrication

Info

Publication number
FR2828766B1
FR2828766B1 FR0110866A FR0110866A FR2828766B1 FR 2828766 B1 FR2828766 B1 FR 2828766B1 FR 0110866 A FR0110866 A FR 0110866A FR 0110866 A FR0110866 A FR 0110866A FR 2828766 B1 FR2828766 B1 FR 2828766B1
Authority
FR
France
Prior art keywords
manufacturing
integrated circuit
memory cells
active elements
passive element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0110866A
Other languages
English (en)
Other versions
FR2828766A1 (fr
Inventor
Catherine Mallardeau
Pascale Mazoyer
Marc Piazza
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0110866A priority Critical patent/FR2828766B1/fr
Priority to US09/955,926 priority patent/US6958505B2/en
Priority to PCT/FR2002/002886 priority patent/WO2003017361A1/fr
Priority to JP2003522166A priority patent/JP2005500694A/ja
Priority to EP02794817A priority patent/EP1425794A1/fr
Publication of FR2828766A1 publication Critical patent/FR2828766A1/fr
Application granted granted Critical
Publication of FR2828766B1 publication Critical patent/FR2828766B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/485—Bit line contacts
FR0110866A 2001-08-16 2001-08-16 Circuit integre comprenant des elements actifs et au moins un element passif, notamment des cellules memoire dram et procede de fabrication Expired - Fee Related FR2828766B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR0110866A FR2828766B1 (fr) 2001-08-16 2001-08-16 Circuit integre comprenant des elements actifs et au moins un element passif, notamment des cellules memoire dram et procede de fabrication
US09/955,926 US6958505B2 (en) 2001-08-16 2001-09-18 Integrated circuit including active components and at least one passive component associated fabrication method
PCT/FR2002/002886 WO2003017361A1 (fr) 2001-08-16 2002-08-14 Circuit integre comprenant des cellules memoire dram et procede de fabrication
JP2003522166A JP2005500694A (ja) 2001-08-16 2002-08-14 集積回路および集積回路を製造する方法
EP02794817A EP1425794A1 (fr) 2001-08-16 2002-08-14 Circuit integre comprenant des cellules memoire dram et procede de fabrication

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0110866A FR2828766B1 (fr) 2001-08-16 2001-08-16 Circuit integre comprenant des elements actifs et au moins un element passif, notamment des cellules memoire dram et procede de fabrication

Publications (2)

Publication Number Publication Date
FR2828766A1 FR2828766A1 (fr) 2003-02-21
FR2828766B1 true FR2828766B1 (fr) 2004-01-16

Family

ID=8866567

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0110866A Expired - Fee Related FR2828766B1 (fr) 2001-08-16 2001-08-16 Circuit integre comprenant des elements actifs et au moins un element passif, notamment des cellules memoire dram et procede de fabrication

Country Status (5)

Country Link
US (1) US6958505B2 (fr)
EP (1) EP1425794A1 (fr)
JP (1) JP2005500694A (fr)
FR (1) FR2828766B1 (fr)
WO (1) WO2003017361A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7268409B2 (en) * 2004-05-21 2007-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Spiral inductor with electrically controllable resistivity of silicon substrate layer
US7602027B2 (en) * 2006-12-29 2009-10-13 Semiconductor Components Industries, L.L.C. Semiconductor component and method of manufacture
WO2008087498A1 (fr) * 2007-01-17 2008-07-24 Stmicroelectronics Crolles 2 Sas Condensateur empilé de mémoire vive dynamique et son procédé de fabrication utilisant un polissage chimico-mécanique

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2757927B2 (ja) * 1990-06-28 1998-05-25 インターナショナル・ビジネス・マシーンズ・コーポレイション 半導体基板上の隔置されたシリコン領域の相互接続方法
US5381302A (en) * 1993-04-02 1995-01-10 Micron Semiconductor, Inc. Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same
JP3623834B2 (ja) * 1995-01-31 2005-02-23 富士通株式会社 半導体記憶装置及びその製造方法
JP3532325B2 (ja) * 1995-07-21 2004-05-31 株式会社東芝 半導体記憶装置
US7701059B1 (en) * 1997-08-21 2010-04-20 Micron Technology, Inc. Low resistance metal silicide local interconnects and a method of making
US6130102A (en) * 1997-11-03 2000-10-10 Motorola Inc. Method for forming semiconductor device including a dual inlaid structure
US6133599A (en) * 1998-04-01 2000-10-17 Vanguard International Semiconductor Corporation Design and a novel process for formation of DRAM bit line and capacitor node contacts
JP2000058783A (ja) * 1998-08-06 2000-02-25 Mitsubishi Electric Corp 半導体装置およびその製造方法
KR100268424B1 (ko) * 1998-08-07 2000-10-16 윤종용 반도체 장치의 배선 형성 방법
US6037216A (en) * 1998-11-02 2000-03-14 Vanguard International Semiconductor Corporation Method for simultaneously fabricating capacitor structures, for giga-bit DRAM cells, and peripheral interconnect structures, using a dual damascene process
US6365453B1 (en) * 1999-06-16 2002-04-02 Micron Technology, Inc. Method and structure for reducing contact aspect ratios
FR2800199B1 (fr) * 1999-10-21 2002-03-01 St Microelectronics Sa Fabrication de memoire dram
US6492241B1 (en) * 2000-04-10 2002-12-10 Micron Technology, Inc. Integrated capacitors fabricated with conductive metal oxides
US6358820B1 (en) * 2000-04-17 2002-03-19 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device

Also Published As

Publication number Publication date
FR2828766A1 (fr) 2003-02-21
US20030034821A1 (en) 2003-02-20
EP1425794A1 (fr) 2004-06-09
US6958505B2 (en) 2005-10-25
WO2003017361A1 (fr) 2003-02-27
JP2005500694A (ja) 2005-01-06

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Legal Events

Date Code Title Description
ST Notification of lapse