FR2435816A1 - Procede de realisation, par epitaxie, d'un dispositif semi-conducteur a structure multicouches et application de ce procede - Google Patents

Procede de realisation, par epitaxie, d'un dispositif semi-conducteur a structure multicouches et application de ce procede

Info

Publication number
FR2435816A1
FR2435816A1 FR7825861A FR7825861A FR2435816A1 FR 2435816 A1 FR2435816 A1 FR 2435816A1 FR 7825861 A FR7825861 A FR 7825861A FR 7825861 A FR7825861 A FR 7825861A FR 2435816 A1 FR2435816 A1 FR 2435816A1
Authority
FR
France
Prior art keywords
producing
application
epitaxy
semiconductor device
layered structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7825861A
Other languages
English (en)
Other versions
FR2435816B1 (fr
Inventor
Jacques Varon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Radiotechnique Compelec RTC SA
Original Assignee
Radiotechnique Compelec RTC SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Radiotechnique Compelec RTC SA filed Critical Radiotechnique Compelec RTC SA
Priority to FR7825861A priority Critical patent/FR2435816A1/fr
Priority to CA334,763A priority patent/CA1134060A/fr
Priority to DE19792934994 priority patent/DE2934994A1/de
Priority to US06/072,257 priority patent/US4274890A/en
Priority to GB7930696A priority patent/GB2030767B/en
Priority to IT25506/79A priority patent/IT1123552B/it
Priority to JP11434679A priority patent/JPS5538096A/ja
Publication of FR2435816A1 publication Critical patent/FR2435816A1/fr
Application granted granted Critical
Publication of FR2435816B1 publication Critical patent/FR2435816B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02392—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02395—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02461—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02463—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02466—Antimonides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02543—Phosphides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02549—Antimonides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02623—Liquid deposition
    • H01L21/02625—Liquid deposition using melted materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02623—Liquid deposition
    • H01L21/02628—Liquid deposition using solutions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/22—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
    • H01L29/221—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds including two or more compounds, e.g. alloys
    • H01L29/225—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004—Devices characterised by their operation
    • H01L33/002—Devices characterised by their operation having heterojunctions or graded gap
    • H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/938—Lattice strain control or utilization

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Led Devices (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Semiconductor Lasers (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

Procédé de réalisation, sur un substrat d'un composé binaire, de couches de composés ternaires et quaternaires, des lits de composition intermédiaire séparant le substrat de la couche terminale. Procédé caractérisé en ce que les accroissements relatifs des dimensions des mailles cristallines dans les lits intermédiaires successifs sont compris entre deux chiffres limites. Application à la réalisation de dispositifs opto-électroniques, notamment de diodes électroluminescentes.
FR7825861A 1978-09-08 1978-09-08 Procede de realisation, par epitaxie, d'un dispositif semi-conducteur a structure multicouches et application de ce procede Granted FR2435816A1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR7825861A FR2435816A1 (fr) 1978-09-08 1978-09-08 Procede de realisation, par epitaxie, d'un dispositif semi-conducteur a structure multicouches et application de ce procede
CA334,763A CA1134060A (fr) 1978-09-08 1979-08-30 Fabrication d'un semiconducteur multicouche par epitaxie
DE19792934994 DE2934994A1 (de) 1978-09-08 1979-08-30 Verfahren zur epitaktischen herstellung einer halbleiteranordnung mit mehrschichtenstruktur und anwendung dieses verfahrens
US06/072,257 US4274890A (en) 1978-09-08 1979-09-04 Method for the epitaxial manufacture of a semiconductor device having a multi-layer structure
GB7930696A GB2030767B (en) 1978-09-08 1979-09-05 P-n device having an epitaxial multilayer structure
IT25506/79A IT1123552B (it) 1978-09-08 1979-09-05 Metodo per fabbricare epitassialmente un dispositivo semiconduttore presentante una struttura a piu'strati e applicazione di tale metodo
JP11434679A JPS5538096A (en) 1978-09-08 1979-09-07 Method of manufacturing epitaxial of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7825861A FR2435816A1 (fr) 1978-09-08 1978-09-08 Procede de realisation, par epitaxie, d'un dispositif semi-conducteur a structure multicouches et application de ce procede

Publications (2)

Publication Number Publication Date
FR2435816A1 true FR2435816A1 (fr) 1980-04-04
FR2435816B1 FR2435816B1 (fr) 1982-04-16

Family

ID=9212457

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7825861A Granted FR2435816A1 (fr) 1978-09-08 1978-09-08 Procede de realisation, par epitaxie, d'un dispositif semi-conducteur a structure multicouches et application de ce procede

Country Status (7)

Country Link
US (1) US4274890A (fr)
JP (1) JPS5538096A (fr)
CA (1) CA1134060A (fr)
DE (1) DE2934994A1 (fr)
FR (1) FR2435816A1 (fr)
GB (1) GB2030767B (fr)
IT (1) IT1123552B (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4319937A (en) * 1980-11-12 1982-03-16 University Of Illinois Foundation Homogeneous liquid phase epitaxial growth of heterojunction materials
US4517047A (en) * 1981-01-23 1985-05-14 The United States Of America As Represented By The Secretary Of The Army MBE growth technique for matching superlattices grown on GaAs substrates
JPH0650723B2 (ja) * 1984-10-17 1994-06-29 日本電気株式会社 エピタキシヤル成長方法
JPS61172381A (ja) * 1984-12-22 1986-08-04 Fujitsu Ltd ＩｎＰ系化合物半導体装置
US4548658A (en) * 1985-01-30 1985-10-22 Cook Melvin S Growth of lattice-graded epilayers
IL78840A0 (en) * 1985-10-17 1986-09-30 Holobeam Lattice-graded epilayer
US5326716A (en) * 1986-02-11 1994-07-05 Max Planck-Gesellschaft Zur Foerderung Der Wissenschaften E.V. Liquid phase epitaxial process for producing three-dimensional semiconductor structures by liquid phase expitaxy
FR2595509B1 (fr) * 1986-03-07 1988-05-13 Thomson Csf Composant en materiau semiconducteur epitaxie sur un substrat a parametre de maille different et application a divers composants en semiconducteurs
JPH01117728A (ja) * 1987-10-30 1989-05-10 Masatoshi Shinozaki 根無しもやしの製造方法
GB2213634B (en) * 1987-12-08 1992-03-18 Third Generation Technology Li Photocathode structures
US5264070A (en) * 1990-10-09 1993-11-23 Motorola, Inc. Method of growth-orientation of a crystal on a device using an oriented seed layer
DE19947020B4 (de) * 1999-09-30 2006-02-23 Infineon Technologies Ag Kompensationsbauelement mit variabler Ladungsbilanz und dessen Herstellungsverfahren
DE102005047152A1 (de) 2005-09-30 2007-04-12 Osram Opto Semiconductors Gmbh Epitaxiesubstrat, Verfahren zu seiner Herstellung und Verfahren zur Herstellung eines Halbleiterchips
US8159791B2 (en) 2008-02-06 2012-04-17 Hitachi Global Storage Technologies Netherlands B.V. Magnetoresistive sensor having quantum well structure and a trapping layer for preventing charge carrier migration

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4032951A (en) * 1976-04-13 1977-06-28 Bell Telephone Laboratories, Incorporated Growth of iii-v layers containing arsenic, antimony and phosphorus, and device uses
EP0000638A1 (fr) * 1977-07-14 1979-02-07 Western Electric Company, Incorporated Dispositif comprenant des couches épitaxiales en matériaux cristallins dissimilaires

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3982261A (en) * 1972-09-22 1976-09-21 Varian Associates Epitaxial indium-gallium-arsenide phosphide layer on lattice-matched indium-phosphide substrate and devices
US3958263A (en) * 1973-11-12 1976-05-18 Bell Telephone Laboratories, Incorporated Stress reduction in algaas-algaasp multilayer structures
US3962716A (en) * 1973-11-12 1976-06-08 Bell Telephone Laboratories, Incorporated Reduction of dislocations in multilayer structures of zinc-blend materials
US3963538A (en) * 1974-12-17 1976-06-15 International Business Machines Corporation Two stage heteroepitaxial deposition process for GaP/Si
US3995303A (en) * 1975-06-05 1976-11-30 Bell Telephone Laboratories, Incorporated Growth and operation of a step-graded ternary III-V heterojunction p-n diode photodetector

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4032951A (en) * 1976-04-13 1977-06-28 Bell Telephone Laboratories, Incorporated Growth of iii-v layers containing arsenic, antimony and phosphorus, and device uses
US4072544A (en) * 1976-04-13 1978-02-07 Bell Telephone Laboratories, Incorporated Growth of III-V layers containing arsenic, antimony and phosphorus
EP0000638A1 (fr) * 1977-07-14 1979-02-07 Western Electric Company, Incorporated Dispositif comprenant des couches épitaxiales en matériaux cristallins dissimilaires

Also Published As

Publication number Publication date
CA1134060A (fr) 1982-10-19
GB2030767B (en) 1983-03-02
FR2435816B1 (fr) 1982-04-16
IT1123552B (it) 1986-04-30
IT7925506A0 (it) 1979-09-05
DE2934994C2 (fr) 1989-07-20
US4274890A (en) 1981-06-23
DE2934994A1 (de) 1980-03-20
GB2030767A (en) 1980-04-10
JPS5745055B2 (fr) 1982-09-25
JPS5538096A (en) 1980-03-17

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