FR2408216A1 - Procede de fabrication de circuits integres a semi-conducteurs et circuit integre obtenu par ce procede - Google Patents
Procede de fabrication de circuits integres a semi-conducteurs et circuit integre obtenu par ce procedeInfo
- Publication number
- FR2408216A1 FR2408216A1 FR7830290A FR7830290A FR2408216A1 FR 2408216 A1 FR2408216 A1 FR 2408216A1 FR 7830290 A FR7830290 A FR 7830290A FR 7830290 A FR7830290 A FR 7830290A FR 2408216 A1 FR2408216 A1 FR 2408216A1
- Authority
- FR
- France
- Prior art keywords
- manufacturing semiconductor
- circuit obtained
- integrated circuit
- conduction
- integrated circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000000034 method Methods 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004020 conductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
- H01L27/0647—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- High Energy & Nuclear Physics (AREA)
- Manufacturing & Machinery (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
LE CIRCUIT INTEGRE A SEMI-CONDUCTEURS COMPORTE DES RESISTANCES IV DU TYPE P REALISEES A PARTIR DE LA COUCHE EPITAXIALE 3 A CONDUCTION P LIMITEE PAR LES REGIONS 2 ET 8 A CONDUCTEURS N, DES TRANSISTORS II DU TYPE NPN DONT LE COLLECTEUR L'ISOLE PAR RAPPORT AUX AUTRES ELEMENTS DU CIRCUIT, CE TRANSISTOR ETANT REALISE A PARTIR DE REGIONS 2 ET 6 DE PREMIERE ET DEUXIEME COUCHES 4, LA BASE ETANT CONSTITUEE PAR UNE PARTIE DE LA COUCHE EPITAXIALE 3 A CONDUCTION P ET LIMITEE PAR LA REGION DE COLLECTEUR. L'EMETTEUR EST CONSTITUE PAR UNE REGION 18 A CONDUCTION N DE LA TROISIEME COUCHE 10 ET FORMEE DANS LA REGION DE BASE.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU772540035A SU773793A1 (ru) | 1977-11-02 | 1977-11-02 | Способ изготовлени полупроводниковых интегральных бипол рных схем |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2408216A1 true FR2408216A1 (fr) | 1979-06-01 |
FR2408216B1 FR2408216B1 (fr) | 1983-12-02 |
Family
ID=20731526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7830290A Granted FR2408216A1 (fr) | 1977-11-02 | 1978-10-25 | Procede de fabrication de circuits integres a semi-conducteurs et circuit integre obtenu par ce procede |
Country Status (6)
Country | Link |
---|---|
US (1) | US4247343A (fr) |
JP (1) | JPS5499582A (fr) |
DE (1) | DE2846881A1 (fr) |
FR (1) | FR2408216A1 (fr) |
GB (1) | GB2009498B (fr) |
SU (1) | SU773793A1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0024896A2 (fr) * | 1979-08-27 | 1981-03-11 | Fujitsu Limited | Dispositif semiconducteur et procédé pour sa fabrication |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5685848A (en) * | 1979-12-15 | 1981-07-13 | Toshiba Corp | Manufacture of bipolar integrated circuit |
NL8104862A (nl) * | 1981-10-28 | 1983-05-16 | Philips Nv | Halfgeleiderinrichting, en werkwijze ter vervaardiging daarvan. |
US5504363A (en) * | 1992-09-02 | 1996-04-02 | Motorola Inc. | Semiconductor device |
US5661047A (en) * | 1994-10-05 | 1997-08-26 | United Microelectronics Corporation | Method for forming bipolar ROM device |
US6835634B1 (en) | 1995-08-25 | 2004-12-28 | Micron Technology, Inc. | Streamlined field isolation process |
KR100740126B1 (ko) * | 2006-02-02 | 2007-07-16 | 삼성에스디아이 주식회사 | 이차 전지 모듈용 격벽 및 이를 포함하는 이차 전지 모듈 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3735481A (en) * | 1967-08-16 | 1973-05-29 | Hitachi Ltd | Method of manufacturing an integrated circuit having a transistor isolated by the collector region |
FR2160463A1 (fr) * | 1971-11-15 | 1973-06-29 | Ibm | |
FR2209217A1 (fr) * | 1972-11-10 | 1974-06-28 | Lignes Telegraph Telephon | |
FR2285715A1 (fr) * | 1974-09-23 | 1976-04-16 | Nat Semiconductor Corp | Transistor a isolement diffuse du collecteur |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3930909A (en) * | 1966-10-21 | 1976-01-06 | U.S. Philips Corporation | Method of manufacturing a semiconductor device utilizing simultaneous outdiffusion during epitaxial growth |
US3575741A (en) * | 1968-02-05 | 1971-04-20 | Bell Telephone Labor Inc | Method for producing semiconductor integrated circuit device and product produced thereby |
US3717507A (en) * | 1969-06-19 | 1973-02-20 | Shibaura Electric Co Ltd | Method of manufacturing semiconductor devices utilizing ion-implantation and arsenic diffusion |
US4054899A (en) * | 1970-09-03 | 1977-10-18 | Texas Instruments Incorporated | Process for fabricating monolithic circuits having matched complementary transistors and product |
JPS5548704B2 (fr) * | 1973-06-01 | 1980-12-08 | ||
US3925105A (en) * | 1974-07-02 | 1975-12-09 | Texas Instruments Inc | Process for fabricating integrated circuits utilizing ion implantation |
CA1056513A (fr) * | 1975-06-19 | 1979-06-12 | Benjamin J. Sloan (Jr.) | Mode de fabrication de circuit logique integre |
US4025364A (en) * | 1975-08-11 | 1977-05-24 | Fairchild Camera And Instrument Corporation | Process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases |
US4018627A (en) * | 1975-09-22 | 1977-04-19 | Signetics Corporation | Method for fabricating semiconductor devices utilizing oxide protective layer |
US4087900A (en) * | 1976-10-18 | 1978-05-09 | Bell Telephone Laboratories, Incorporated | Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions |
-
1977
- 1977-11-02 SU SU772540035A patent/SU773793A1/ru active
-
1978
- 1978-10-25 US US05/954,574 patent/US4247343A/en not_active Expired - Lifetime
- 1978-10-25 FR FR7830290A patent/FR2408216A1/fr active Granted
- 1978-10-27 DE DE19782846881 patent/DE2846881A1/de not_active Withdrawn
- 1978-11-02 JP JP13468578A patent/JPS5499582A/ja active Pending
- 1978-11-02 GB GB7842879A patent/GB2009498B/en not_active Expired
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3735481A (en) * | 1967-08-16 | 1973-05-29 | Hitachi Ltd | Method of manufacturing an integrated circuit having a transistor isolated by the collector region |
FR2160463A1 (fr) * | 1971-11-15 | 1973-06-29 | Ibm | |
FR2209217A1 (fr) * | 1972-11-10 | 1974-06-28 | Lignes Telegraph Telephon | |
FR2285715A1 (fr) * | 1974-09-23 | 1976-04-16 | Nat Semiconductor Corp | Transistor a isolement diffuse du collecteur |
Non-Patent Citations (1)
Title |
---|
EXBK/68 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0024896A2 (fr) * | 1979-08-27 | 1981-03-11 | Fujitsu Limited | Dispositif semiconducteur et procédé pour sa fabrication |
EP0024896A3 (en) * | 1979-08-27 | 1982-11-03 | Fujitsu Limited | A semiconductor device and a method of manufacturing the device |
Also Published As
Publication number | Publication date |
---|---|
GB2009498B (en) | 1982-06-30 |
JPS5499582A (en) | 1979-08-06 |
GB2009498A (en) | 1979-06-13 |
DE2846881A1 (de) | 1979-05-03 |
US4247343A (en) | 1981-01-27 |
FR2408216B1 (fr) | 1983-12-02 |
SU773793A1 (ru) | 1980-10-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |