JPS5666068A - Semiconductor integrated circuit and its manufacture - Google Patents

Semiconductor integrated circuit and its manufacture

Info

Publication number
JPS5666068A
JPS5666068A JP14228979A JP14228979A JPS5666068A JP S5666068 A JPS5666068 A JP S5666068A JP 14228979 A JP14228979 A JP 14228979A JP 14228979 A JP14228979 A JP 14228979A JP S5666068 A JPS5666068 A JP S5666068A
Authority
JP
Japan
Prior art keywords
type
layer
region
regions
dug
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14228979A
Other languages
Japanese (ja)
Inventor
Eiichi Iwanami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP14228979A priority Critical patent/JPS5666068A/en
Publication of JPS5666068A publication Critical patent/JPS5666068A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0225Charge injection in static induction transistor logic structures [SITL]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To enable the simultaneous formation of the transistors when a static induction transistor and a vertical bipolar transistor are to be formed on the same semiconductor substrate by a method wherein the sizes of the diffusion regions and the opening parts for the electrode metal contacts are prescribed specifically. CONSTITUTION:Plural N<+> type buried regions 1 are formed by diffusion on the P<-> type Si substrate 6, and N<-> type layer 2 is made to grow epitaxially on the whole surface, and selective etching is performed to form dug parts 15, one of which is for separation reaching the substrate passing through the space between the regions 1, and other two of which are stopped in the regions 1. Then an SiO2 film is adhered on the whole surface, and small diametral opening parts are dug in the layer 2 on the one side region 1, and the P<+> type injector region 3, the gate region 4 and the N<+> type drain region 5' of the SIT are formed by diffusion in the layer 2. A large diametral opening part is dug in the layer 2 on the other side region 1, and the P<+> type base region 7 and the N<+> type emitter region in it of the NPN bipolar transistor are provided. An N<+> type source lead out layer 9' for the SIT and an N<+> type collector lead out layer 10' for the NPN element are formed.
JP14228979A 1979-11-02 1979-11-02 Semiconductor integrated circuit and its manufacture Pending JPS5666068A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14228979A JPS5666068A (en) 1979-11-02 1979-11-02 Semiconductor integrated circuit and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14228979A JPS5666068A (en) 1979-11-02 1979-11-02 Semiconductor integrated circuit and its manufacture

Publications (1)

Publication Number Publication Date
JPS5666068A true JPS5666068A (en) 1981-06-04

Family

ID=15311906

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14228979A Pending JPS5666068A (en) 1979-11-02 1979-11-02 Semiconductor integrated circuit and its manufacture

Country Status (1)

Country Link
JP (1) JPS5666068A (en)

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