JPS5666068A - Semiconductor integrated circuit and its manufacture - Google Patents
Semiconductor integrated circuit and its manufactureInfo
- Publication number
- JPS5666068A JPS5666068A JP14228979A JP14228979A JPS5666068A JP S5666068 A JPS5666068 A JP S5666068A JP 14228979 A JP14228979 A JP 14228979A JP 14228979 A JP14228979 A JP 14228979A JP S5666068 A JPS5666068 A JP S5666068A
- Authority
- JP
- Japan
- Prior art keywords
- type
- layer
- region
- regions
- dug
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000009792 diffusion process Methods 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 230000006698 induction Effects 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000000926 separation method Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 230000003068 static effect Effects 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
- H01L27/0225—Charge injection in static induction transistor logic structures [SITL]
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Bipolar Transistors (AREA)
- Junction Field-Effect Transistors (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To enable the simultaneous formation of the transistors when a static induction transistor and a vertical bipolar transistor are to be formed on the same semiconductor substrate by a method wherein the sizes of the diffusion regions and the opening parts for the electrode metal contacts are prescribed specifically. CONSTITUTION:Plural N<+> type buried regions 1 are formed by diffusion on the P<-> type Si substrate 6, and N<-> type layer 2 is made to grow epitaxially on the whole surface, and selective etching is performed to form dug parts 15, one of which is for separation reaching the substrate passing through the space between the regions 1, and other two of which are stopped in the regions 1. Then an SiO2 film is adhered on the whole surface, and small diametral opening parts are dug in the layer 2 on the one side region 1, and the P<+> type injector region 3, the gate region 4 and the N<+> type drain region 5' of the SIT are formed by diffusion in the layer 2. A large diametral opening part is dug in the layer 2 on the other side region 1, and the P<+> type base region 7 and the N<+> type emitter region in it of the NPN bipolar transistor are provided. An N<+> type source lead out layer 9' for the SIT and an N<+> type collector lead out layer 10' for the NPN element are formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14228979A JPS5666068A (en) | 1979-11-02 | 1979-11-02 | Semiconductor integrated circuit and its manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14228979A JPS5666068A (en) | 1979-11-02 | 1979-11-02 | Semiconductor integrated circuit and its manufacture |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5666068A true JPS5666068A (en) | 1981-06-04 |
Family
ID=15311906
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14228979A Pending JPS5666068A (en) | 1979-11-02 | 1979-11-02 | Semiconductor integrated circuit and its manufacture |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5666068A (en) |
-
1979
- 1979-11-02 JP JP14228979A patent/JPS5666068A/en active Pending
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