FR2310634A1 - Procede de formation d'une structure de porte pour dispositif mos - Google Patents
Procede de formation d'une structure de porte pour dispositif mosInfo
- Publication number
- FR2310634A1 FR2310634A1 FR7613357A FR7613357A FR2310634A1 FR 2310634 A1 FR2310634 A1 FR 2310634A1 FR 7613357 A FR7613357 A FR 7613357A FR 7613357 A FR7613357 A FR 7613357A FR 2310634 A1 FR2310634 A1 FR 2310634A1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- gate insulator
- effect transistors
- field effect
- automatic alignment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000012212 insulator Substances 0.000 title abstract 5
- 230000005669 field effect Effects 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 abstract 3
- 238000000034 method Methods 0.000 abstract 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract 2
- 238000012544 monitoring process Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US57503375A | 1975-05-05 | 1975-05-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2310634A1 true FR2310634A1 (fr) | 1976-12-03 |
Family
ID=24298658
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7613357A Withdrawn FR2310634A1 (fr) | 1975-05-05 | 1976-05-05 | Procede de formation d'une structure de porte pour dispositif mos |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS51142982A (fr) |
DE (1) | DE2615441A1 (fr) |
FR (1) | FR2310634A1 (fr) |
NL (1) | NL7604708A (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2382767A1 (fr) * | 1977-01-26 | 1978-09-29 | Mostek Corp | Procede de fabrication de dispositif semiconducteur |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55105373A (en) * | 1978-12-04 | 1980-08-12 | Mostek Corp | Metal oxide semiconductor transistor and method of fabricating same |
JPS55143047A (en) * | 1979-04-25 | 1980-11-08 | Nec Corp | Insulating separation method for semiconductor device |
JPS5961069A (ja) * | 1982-09-30 | 1984-04-07 | Toshiba Corp | 半導体装置の製造方法 |
JPS5976472A (ja) * | 1982-10-26 | 1984-05-01 | Toshiba Corp | 半導体装置の製造方法 |
US4508757A (en) * | 1982-12-20 | 1985-04-02 | International Business Machines Corporation | Method of manufacturing a minimum bird's beak recessed oxide isolation structure |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58190B2 (ja) * | 1972-01-27 | 1983-01-05 | 日本電気株式会社 | ゼツエンゲ−トガタデンカイコウカトランジスタ |
IT999786B (it) * | 1973-01-15 | 1976-03-10 | Fairchild Camera Instr Co | Procedimento per la fabbricazione di transistori a semiconduttore di ossido metallico e prodotto ottenuto con il procedimento |
JPS5918872B2 (ja) * | 1973-12-07 | 1984-05-01 | 日本電気株式会社 | 絶縁ゲ−ト型電界効果半導体装置の製法 |
-
1976
- 1976-04-07 JP JP3912876A patent/JPS51142982A/ja active Pending
- 1976-04-09 DE DE19762615441 patent/DE2615441A1/de active Pending
- 1976-05-04 NL NL7604708A patent/NL7604708A/xx unknown
- 1976-05-05 FR FR7613357A patent/FR2310634A1/fr not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2382767A1 (fr) * | 1977-01-26 | 1978-09-29 | Mostek Corp | Procede de fabrication de dispositif semiconducteur |
Also Published As
Publication number | Publication date |
---|---|
DE2615441A1 (de) | 1976-11-18 |
JPS51142982A (en) | 1976-12-08 |
NL7604708A (nl) | 1976-11-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |