FR2275888A1 - Structure a transistors a effet de champ complementaires a porte isolee et procede pour sa fabrication - Google Patents

Structure a transistors a effet de champ complementaires a porte isolee et procede pour sa fabrication

Info

Publication number
FR2275888A1
FR2275888A1 FR7516972A FR7516972A FR2275888A1 FR 2275888 A1 FR2275888 A1 FR 2275888A1 FR 7516972 A FR7516972 A FR 7516972A FR 7516972 A FR7516972 A FR 7516972A FR 2275888 A1 FR2275888 A1 FR 2275888A1
Authority
FR
France
Prior art keywords
manufacturing
effect transistor
transistor structure
insulated door
complementary field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7516972A
Other languages
English (en)
French (fr)
Other versions
FR2275888B1 (enrdf_load_stackoverflow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Camera and Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Camera and Instrument Corp filed Critical Fairchild Camera and Instrument Corp
Publication of FR2275888A1 publication Critical patent/FR2275888A1/fr
Application granted granted Critical
Publication of FR2275888B1 publication Critical patent/FR2275888B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • H01L21/76218Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers introducing both types of electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers, e.g. for isolation of complementary doped regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191Manufacturing their doped wells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/858Complementary IGFETs, e.g. CMOS comprising a P-type well but not an N-type well
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
FR7516972A 1974-06-03 1975-05-30 Structure a transistors a effet de champ complementaires a porte isolee et procede pour sa fabrication Granted FR2275888A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US47535874A 1974-06-03 1974-06-03

Publications (2)

Publication Number Publication Date
FR2275888A1 true FR2275888A1 (fr) 1976-01-16
FR2275888B1 FR2275888B1 (enrdf_load_stackoverflow) 1981-08-21

Family

ID=23887225

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7516972A Granted FR2275888A1 (fr) 1974-06-03 1975-05-30 Structure a transistors a effet de champ complementaires a porte isolee et procede pour sa fabrication

Country Status (8)

Country Link
JP (1) JPS5619746B2 (enrdf_load_stackoverflow)
CA (1) CA1017073A (enrdf_load_stackoverflow)
DE (1) DE2523379C2 (enrdf_load_stackoverflow)
FR (1) FR2275888A1 (enrdf_load_stackoverflow)
GB (1) GB1499548A (enrdf_load_stackoverflow)
HK (1) HK27981A (enrdf_load_stackoverflow)
IT (1) IT1032951B (enrdf_load_stackoverflow)
NL (1) NL185591C (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0028786A1 (de) * 1979-11-13 1981-05-20 Deutsche ITT Industries GmbH Ionenimplantationsverfahren
EP0063578A4 (en) * 1980-10-20 1984-07-06 Ncr Corp METHOD FOR FORMING AN INTEGRATED CIRCLE WITH POLYSILICON DOORS.

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5160466A (en) * 1974-11-22 1976-05-26 Hitachi Ltd Handotaisochino seizohoho
JPS5286083A (en) * 1976-01-12 1977-07-16 Hitachi Ltd Production of complimentary isolation gate field effect transistor
JPS5955054A (ja) * 1982-09-24 1984-03-29 Hitachi Ltd 半導体装置の製造方法
JPH0636425B2 (ja) * 1983-02-23 1994-05-11 テキサス インスツルメンツ インコ−ポレイテツド Cmos装置の製造方法
EP0123384A1 (en) * 1983-02-25 1984-10-31 Western Digital Corporation Complementary insulated gate field effect integrated circuit structure and process for fabricating the structure
JP2572653B2 (ja) * 1989-12-29 1997-01-16 セイコーエプソン株式会社 半導体装置の製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1104070B (de) * 1959-01-27 1961-04-06 Siemens Ag Verfahren zur Herstellung einer eine eigenleitende oder nahezu eigenleitende Zone aufweisenden Halbleitertriode
US3356858A (en) * 1963-06-18 1967-12-05 Fairchild Camera Instr Co Low stand-by power complementary field effect circuitry
US3648225A (en) * 1969-12-04 1972-03-07 Sperry Rand Corp Digital sonar doppler navigator
NL160988C (nl) * 1971-06-08 1979-12-17 Philips Nv Halfgeleiderinrichting met een halfgeleiderlichaam, be- vattende ten minste een eerste veldeffecttransistor met geisoleerde stuurelektrode en werkwijze voor de vervaar- diging van de halfgeleiderinrichting.
JPS49123287A (enrdf_load_stackoverflow) * 1973-03-28 1974-11-26

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0028786A1 (de) * 1979-11-13 1981-05-20 Deutsche ITT Industries GmbH Ionenimplantationsverfahren
EP0063578A4 (en) * 1980-10-20 1984-07-06 Ncr Corp METHOD FOR FORMING AN INTEGRATED CIRCLE WITH POLYSILICON DOORS.

Also Published As

Publication number Publication date
JPS515969A (enrdf_load_stackoverflow) 1976-01-19
HK27981A (en) 1981-07-03
NL185591C (nl) 1990-05-16
NL7506288A (nl) 1975-12-05
JPS5619746B2 (enrdf_load_stackoverflow) 1981-05-09
FR2275888B1 (enrdf_load_stackoverflow) 1981-08-21
CA1017073A (en) 1977-09-06
DE2523379C2 (de) 1986-10-02
GB1499548A (en) 1978-02-01
DE2523379A1 (de) 1975-12-11
IT1032951B (it) 1979-06-20

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