ES8103868A1 - Un sistema para acceder a modulos de memoria - Google Patents

Un sistema para acceder a modulos de memoria

Info

Publication number
ES8103868A1
ES8103868A1 ES490033A ES490033A ES8103868A1 ES 8103868 A1 ES8103868 A1 ES 8103868A1 ES 490033 A ES490033 A ES 490033A ES 490033 A ES490033 A ES 490033A ES 8103868 A1 ES8103868 A1 ES 8103868A1
Authority
ES
Spain
Prior art keywords
address
memory
module
memory address
modules
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES490033A
Other languages
English (en)
Other versions
ES490033A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panafacom Ltd
Original Assignee
Panafacom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panafacom Ltd filed Critical Panafacom Ltd
Publication of ES490033A0 publication Critical patent/ES490033A0/es
Publication of ES8103868A1 publication Critical patent/ES8103868A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Dram (AREA)

Abstract

SISTEMA DE ACCESO A MODULOS DE MEMORIA. LA FUENTE DE ACESO A LA MEMORIA ESTA FORMADA POR UNA UNIDAD CENTRAL DE TRATAMIENTO (1) Y UNA UNIDAD DE CONTROL DE CANAL (2). UNA UNIDAD DE CONTROL (3) DE ACCESO A LA MEMORIA SIRVE DE PUENTE. DESDE UNOS REGISTROS DE DIRECCIONES (11, 21) SE MANDAN SEÑALES A UNA UNIDAD (31) FORMADORA DE DIAGRAMAS O MAPAS Y A UNA MEMORIA INTERMEDIA (32) DE DIRECCIONES DE LA UNIDAD DE CONTROL (3). LAS SALIDAS (MA12...MA18) DE LA MEMORIA INTERMEDIA (32) SON LLEVADAS A UN REGISTRO (41-2) DE DIRECCIONES DE MEMORIA; LAS SALIDAS (MA00..MA11), QUE FORMAN EL CODIGO DE DIRECCIONES, SON LLEVADAS A UN REGISTRO (41-1). DE ESTA FORMA SE ESTABLECE EL ACCESO, AL TIEMPO QUE UN CIRCUITO DE CONTROL (33'') GENERA LAS SEÑALES DE INICIACION DE MEMORIA.
ES490033A 1979-03-30 1980-03-28 Un sistema para acceder a modulos de memoria Expired ES8103868A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54037885A JPS5943786B2 (ja) 1979-03-30 1979-03-30 記憶装置のアクセス方式

Publications (2)

Publication Number Publication Date
ES490033A0 ES490033A0 (es) 1981-03-16
ES8103868A1 true ES8103868A1 (es) 1981-03-16

Family

ID=12509989

Family Applications (1)

Application Number Title Priority Date Filing Date
ES490033A Expired ES8103868A1 (es) 1979-03-30 1980-03-28 Un sistema para acceder a modulos de memoria

Country Status (8)

Country Link
US (1) US4384342A (es)
EP (1) EP0025801B1 (es)
JP (1) JPS5943786B2 (es)
AU (1) AU515171B2 (es)
CA (1) CA1127318A (es)
DE (1) DE3063041D1 (es)
ES (1) ES8103868A1 (es)
WO (1) WO1980002206A1 (es)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459846A (en) * 1988-12-02 1995-10-17 Hyatt; Gilbert P. Computer architecture system having an imporved memory
US5526506A (en) * 1970-12-28 1996-06-11 Hyatt; Gilbert P. Computer system having an improved memory architecture
JPS57164484A (en) * 1981-03-31 1982-10-09 Fujitsu Ltd Replace system
JPS58214954A (ja) * 1982-06-09 1983-12-14 Nec Corp 大容量デ−タ記憶システム
JPS5932045A (ja) * 1982-08-16 1984-02-21 Hitachi Ltd 情報処理装置
US4649476A (en) * 1983-10-31 1987-03-10 Motorola, Inc. Microcomputer having an internal address mapper
US4652993A (en) * 1984-04-02 1987-03-24 Sperry Corporation Multiple output port memory storage module
US4742451A (en) * 1984-05-21 1988-05-03 Digital Equipment Corporation Instruction prefetch system for conditional branch instruction for central processor unit
JPS6140657A (ja) * 1984-08-01 1986-02-26 Yaskawa Electric Mfg Co Ltd 低速メモリの高速アクセス方式
US4817036A (en) * 1985-03-15 1989-03-28 Brigham Young University Computer system and method for data base indexing and information retrieval
US4761731A (en) * 1985-08-14 1988-08-02 Control Data Corporation Look-ahead instruction fetch control for a cache memory
JPS6293249U (es) * 1985-11-29 1987-06-15
JPS62149099A (ja) * 1985-12-23 1987-07-03 Toshiba Corp メモリアクセス制御回路
EP0232518A3 (de) * 1986-01-13 1989-12-13 Siemens Aktiengesellschaft Verfahren und Anordnung zum Bilden von Adressen zum Ansteuern eines Arbeitsspeichers
US4893279A (en) * 1986-03-04 1990-01-09 Advanced Micro Devices Inc. Storage arrangement having a pair of RAM memories selectively configurable for dual-access and two single-access RAMs
JPS635444A (ja) * 1986-06-25 1988-01-11 Hitachi Ltd マイクロプロセツサ
US4884198A (en) * 1986-12-18 1989-11-28 Sun Microsystems, Inc. Single cycle processor/cache interface
IT1216087B (it) * 1988-03-15 1990-02-22 Honeywell Bull Spa Sistema di memoria con selezione predittiva di modulo.
US5301278A (en) * 1988-04-29 1994-04-05 International Business Machines Corporation Flexible dynamic memory controller
GB2246001B (en) * 1990-04-11 1994-06-15 Digital Equipment Corp Array architecture for high speed cache memory
US5283875A (en) * 1990-04-13 1994-02-01 Digital Equipment Corporation Method and apparatus for optimizing prefetch caching by reverse ordering of logical blocks
US5317708A (en) * 1990-06-29 1994-05-31 Digital Equipment Corporation Apparatus and method for an improved content addressable memory
GB9023339D0 (en) * 1990-10-26 1990-12-05 Ici Plc Dispensing of fluids
US5575636A (en) * 1994-06-21 1996-11-19 Praxair Technology, Inc. Porous non-fouling nozzle
US5530836A (en) * 1994-08-12 1996-06-25 International Business Machines Corporation Method and apparatus for multiple memory bank selection
US5835932A (en) * 1997-03-13 1998-11-10 Silicon Aquarius, Inc. Methods and systems for maintaining data locality in a multiple memory bank system having DRAM with integral SRAM
US7143185B1 (en) * 2000-08-29 2006-11-28 Advanced Micro Devices, Inc. Method and apparatus for accessing external memories
US20060212658A1 (en) * 2005-03-18 2006-09-21 International Business Machines Corporation. Prefetch performance of index access by look-ahead prefetch

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3504349A (en) * 1967-09-27 1970-03-31 Ibm Address examination mechanism for use in a system operating with dynamic storage relocation
US3829840A (en) * 1972-07-24 1974-08-13 Ibm Virtual memory system
FR121860A (es) * 1973-07-19
US4156905A (en) * 1974-02-28 1979-05-29 Ncr Corporation Method and apparatus for improving access speed in a random access memory
JPS5169333A (en) * 1974-12-13 1976-06-15 Fujitsu Ltd Peeji adoresuseigyohoshiki
JPS5216137A (en) * 1975-07-29 1977-02-07 Nippon Telegr & Teleph Corp <Ntt> Main memory access control system
IT1052771B (it) * 1975-12-31 1981-07-20 Olivetti C E C S P A Dispositivo di indirizzamento di una memoria
GB2003302B (en) * 1977-08-24 1982-02-10 Ncr Co Random access memory system
US4296467A (en) * 1978-07-03 1981-10-20 Honeywell Information Systems Inc. Rotating chip selection technique and apparatus
FR2443723A1 (fr) * 1978-12-06 1980-07-04 Cii Honeywell Bull Dispositif de reduction du temps d'acces aux informations contenues dans une memoire d'un systeme de traitement de l'information
US4303993A (en) * 1979-10-10 1981-12-01 Honeywell Information Systems Inc. Memory present apparatus
US4323965A (en) * 1980-01-08 1982-04-06 Honeywell Information Systems Inc. Sequential chip select decode apparatus and method

Also Published As

Publication number Publication date
EP0025801B1 (en) 1983-05-11
JPS55129847A (en) 1980-10-08
EP0025801A1 (en) 1981-04-01
ES490033A0 (es) 1981-03-16
JPS5943786B2 (ja) 1984-10-24
DE3063041D1 (en) 1983-06-16
CA1127318A (en) 1982-07-06
AU515171B2 (en) 1981-03-19
AU5678180A (en) 1981-01-15
US4384342A (en) 1983-05-17
EP0025801A4 (en) 1981-03-09
WO1980002206A1 (en) 1980-10-16

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