JPS54148330A - Buffer memory control system - Google Patents
Buffer memory control systemInfo
- Publication number
- JPS54148330A JPS54148330A JP5650578A JP5650578A JPS54148330A JP S54148330 A JPS54148330 A JP S54148330A JP 5650578 A JP5650578 A JP 5650578A JP 5650578 A JP5650578 A JP 5650578A JP S54148330 A JPS54148330 A JP S54148330A
- Authority
- JP
- Japan
- Prior art keywords
- buffer memory
- memory
- address
- buffer
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE: To reduce the number of the control circuit, the address comparator and other peripheral circuits with use of one buffer memory by dividing the inside of the buffer memory by addresses and controlling the divided parts according to each using purpose, and thus to ensure the effective use of the memory element.
CONSTITUTION: In the information processor which possesses the buffer memory accompained to the processor to hold the partial copy of the data memorized in the main memory, address register 200 to decide the character or the type of the memory access is provided along with address comparator 203 and 204 plus directory part 206 which uses the output of circuit 204 as the input. Thus, the output of part 206 is compared through comparators 207-1W207-4 at the access of the buffer memory. According to the comparison result, the address of the buffer memory is altered at data part 209. Thus, one buffer memory is used as plural units of buffer memories for different purposes.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5650578A JPS54148330A (en) | 1978-05-15 | 1978-05-15 | Buffer memory control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5650578A JPS54148330A (en) | 1978-05-15 | 1978-05-15 | Buffer memory control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54148330A true JPS54148330A (en) | 1979-11-20 |
Family
ID=13028969
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5650578A Pending JPS54148330A (en) | 1978-05-15 | 1978-05-15 | Buffer memory control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54148330A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59101091A (en) * | 1982-12-02 | 1984-06-11 | Fujitsu Ltd | Buffer storage controlling system |
-
1978
- 1978-05-15 JP JP5650578A patent/JPS54148330A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59101091A (en) * | 1982-12-02 | 1984-06-11 | Fujitsu Ltd | Buffer storage controlling system |
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