JPS55129847A - Access system of memory unit - Google Patents

Access system of memory unit

Info

Publication number
JPS55129847A
JPS55129847A JP3788579A JP3788579A JPS55129847A JP S55129847 A JPS55129847 A JP S55129847A JP 3788579 A JP3788579 A JP 3788579A JP 3788579 A JP3788579 A JP 3788579A JP S55129847 A JPS55129847 A JP S55129847A
Authority
JP
Japan
Prior art keywords
address
given
access
rank bit
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3788579A
Other languages
Japanese (ja)
Other versions
JPS5943786B2 (en
Inventor
Takao Imura
Shigeru Koyanagi
Yoshihiro Sadata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panafacom Ltd
Original Assignee
Panafacom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panafacom Ltd filed Critical Panafacom Ltd
Priority to JP54037885A priority Critical patent/JPS5943786B2/en
Priority to CA347,613A priority patent/CA1127318A/en
Priority to AU56781/80A priority patent/AU515171B2/en
Priority to US06/201,396 priority patent/US4384342A/en
Priority to DE8080900611T priority patent/DE3063041D1/en
Priority to ES490033A priority patent/ES8103868A1/en
Priority to PCT/JP1980/000054 priority patent/WO1980002206A1/en
Publication of JPS55129847A publication Critical patent/JPS55129847A/en
Priority to EP80900611A priority patent/EP0025801B1/en
Publication of JPS5943786B2 publication Critical patent/JPS5943786B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Dram (AREA)

Abstract

PURPOSE: To perform the access of memory unit in parallel with the address conversion operation, by providing the forecast means holding the first part of address at previous access with the circuit where the first part of address is confirmed with a delay than the other second part.
CONSTITUTION: The address from CPU1 or channel unit 2 is given to the address mapper 31 and address buffer 32 of the access control unit 3, and the upper rank bit from the mapper 31 and the lower rank bit from the buffer 32 are respectively given to the address registers 51, 52 of the memory unit 5. The output of the registers 51, 52 is given to the decoder 56 and the multiplexer 57, and the upper rank bit is given to the address register 53 at the end of the memory cycle. Further, before the confirmation of the upper address, the forecast value stored in the register 53 is given to the decoder 58, the access of the memory module 59 is started with the output of the decoder 58 and the multiplexer 57, the comparison between the confirming value of the upper rank bit and the forecast value is made at the comparison circuit 55, and access is made again by using the upper and lower rank bit if in disagreement.
COPYRIGHT: (C)1980,JPO&Japio
JP54037885A 1979-03-30 1979-03-30 Storage device access method Expired JPS5943786B2 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP54037885A JPS5943786B2 (en) 1979-03-30 1979-03-30 Storage device access method
CA347,613A CA1127318A (en) 1979-03-30 1980-03-13 System for accessing memory modules
AU56781/80A AU515171B2 (en) 1979-03-30 1980-03-24 Accessing memory modules
US06/201,396 US4384342A (en) 1979-03-30 1980-03-28 System for reducing access time to plural memory modules using five present-fetch and one prefetch address registers
DE8080900611T DE3063041D1 (en) 1979-03-30 1980-03-28 Access system for memory modules
ES490033A ES8103868A1 (en) 1979-03-30 1980-03-28 Access system for memory modules.
PCT/JP1980/000054 WO1980002206A1 (en) 1979-03-30 1980-08-28 Access system for memory modules
EP80900611A EP0025801B1 (en) 1979-03-30 1980-10-23 Access system for memory modules

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54037885A JPS5943786B2 (en) 1979-03-30 1979-03-30 Storage device access method

Publications (2)

Publication Number Publication Date
JPS55129847A true JPS55129847A (en) 1980-10-08
JPS5943786B2 JPS5943786B2 (en) 1984-10-24

Family

ID=12509989

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54037885A Expired JPS5943786B2 (en) 1979-03-30 1979-03-30 Storage device access method

Country Status (8)

Country Link
US (1) US4384342A (en)
EP (1) EP0025801B1 (en)
JP (1) JPS5943786B2 (en)
AU (1) AU515171B2 (en)
CA (1) CA1127318A (en)
DE (1) DE3063041D1 (en)
ES (1) ES8103868A1 (en)
WO (1) WO1980002206A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164484A (en) * 1981-03-31 1982-10-09 Fujitsu Ltd Replace system
JPS58214954A (en) * 1982-06-09 1983-12-14 Nec Corp Storing system of large capacity data
JPS6140657A (en) * 1984-08-01 1986-02-26 Yaskawa Electric Mfg Co Ltd System for accessing low-speed memory in high speed
JPS6293249U (en) * 1985-11-29 1987-06-15

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US5526506A (en) * 1970-12-28 1996-06-11 Hyatt; Gilbert P. Computer system having an improved memory architecture
US5459846A (en) * 1988-12-02 1995-10-17 Hyatt; Gilbert P. Computer architecture system having an imporved memory
JPS5932045A (en) * 1982-08-16 1984-02-21 Hitachi Ltd Information processor
US4649476A (en) * 1983-10-31 1987-03-10 Motorola, Inc. Microcomputer having an internal address mapper
US4652993A (en) * 1984-04-02 1987-03-24 Sperry Corporation Multiple output port memory storage module
US4742451A (en) * 1984-05-21 1988-05-03 Digital Equipment Corporation Instruction prefetch system for conditional branch instruction for central processor unit
US4817036A (en) * 1985-03-15 1989-03-28 Brigham Young University Computer system and method for data base indexing and information retrieval
US4761731A (en) * 1985-08-14 1988-08-02 Control Data Corporation Look-ahead instruction fetch control for a cache memory
JPS62149099A (en) * 1985-12-23 1987-07-03 Toshiba Corp Memory access controlling circuit
EP0232518A3 (en) * 1986-01-13 1989-12-13 Siemens Aktiengesellschaft Address mapping method and system for controlling a working memory
US4893279A (en) * 1986-03-04 1990-01-09 Advanced Micro Devices Inc. Storage arrangement having a pair of RAM memories selectively configurable for dual-access and two single-access RAMs
JPS635444A (en) * 1986-06-25 1988-01-11 Hitachi Ltd Microprocessor
US4884198A (en) * 1986-12-18 1989-11-28 Sun Microsystems, Inc. Single cycle processor/cache interface
IT1216087B (en) * 1988-03-15 1990-02-22 Honeywell Bull Spa MEMORY SYSTEM WITH PREDICTIVE MODULE SELECTION.
US5301278A (en) * 1988-04-29 1994-04-05 International Business Machines Corporation Flexible dynamic memory controller
GB2246001B (en) * 1990-04-11 1994-06-15 Digital Equipment Corp Array architecture for high speed cache memory
US5283875A (en) * 1990-04-13 1994-02-01 Digital Equipment Corporation Method and apparatus for optimizing prefetch caching by reverse ordering of logical blocks
US5317708A (en) * 1990-06-29 1994-05-31 Digital Equipment Corporation Apparatus and method for an improved content addressable memory
GB9023339D0 (en) * 1990-10-26 1990-12-05 Ici Plc Dispensing of fluids
US5575636A (en) * 1994-06-21 1996-11-19 Praxair Technology, Inc. Porous non-fouling nozzle
US5530836A (en) * 1994-08-12 1996-06-25 International Business Machines Corporation Method and apparatus for multiple memory bank selection
US5835932A (en) * 1997-03-13 1998-11-10 Silicon Aquarius, Inc. Methods and systems for maintaining data locality in a multiple memory bank system having DRAM with integral SRAM
US7143185B1 (en) * 2000-08-29 2006-11-28 Advanced Micro Devices, Inc. Method and apparatus for accessing external memories
US20060212658A1 (en) * 2005-03-18 2006-09-21 International Business Machines Corporation. Prefetch performance of index access by look-ahead prefetch

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3504349A (en) * 1967-09-27 1970-03-31 Ibm Address examination mechanism for use in a system operating with dynamic storage relocation
US3829840A (en) * 1972-07-24 1974-08-13 Ibm Virtual memory system
FR121860A (en) * 1973-07-19
US4156905A (en) * 1974-02-28 1979-05-29 Ncr Corporation Method and apparatus for improving access speed in a random access memory
JPS5169333A (en) * 1974-12-13 1976-06-15 Fujitsu Ltd Peeji adoresuseigyohoshiki
JPS5216137A (en) * 1975-07-29 1977-02-07 Nippon Telegr & Teleph Corp <Ntt> Main memory access control system
IT1052771B (en) * 1975-12-31 1981-07-20 Olivetti C E C S P A MEMORY ADDRESSING DEVICE
GB2003302B (en) * 1977-08-24 1982-02-10 Ncr Co Random access memory system
US4296467A (en) * 1978-07-03 1981-10-20 Honeywell Information Systems Inc. Rotating chip selection technique and apparatus
FR2443723A1 (en) * 1978-12-06 1980-07-04 Cii Honeywell Bull DEVICE FOR REDUCING THE ACCESS TIME TO INFORMATION CONTAINED IN A MEMORY OF AN INFORMATION PROCESSING SYSTEM
US4303993A (en) * 1979-10-10 1981-12-01 Honeywell Information Systems Inc. Memory present apparatus
US4323965A (en) * 1980-01-08 1982-04-06 Honeywell Information Systems Inc. Sequential chip select decode apparatus and method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164484A (en) * 1981-03-31 1982-10-09 Fujitsu Ltd Replace system
JPS58214954A (en) * 1982-06-09 1983-12-14 Nec Corp Storing system of large capacity data
JPS6140657A (en) * 1984-08-01 1986-02-26 Yaskawa Electric Mfg Co Ltd System for accessing low-speed memory in high speed
JPS6293249U (en) * 1985-11-29 1987-06-15

Also Published As

Publication number Publication date
AU515171B2 (en) 1981-03-19
ES490033A0 (en) 1981-03-16
WO1980002206A1 (en) 1980-10-16
EP0025801A4 (en) 1981-03-09
DE3063041D1 (en) 1983-06-16
JPS5943786B2 (en) 1984-10-24
EP0025801B1 (en) 1983-05-11
CA1127318A (en) 1982-07-06
US4384342A (en) 1983-05-17
EP0025801A1 (en) 1981-04-01
ES8103868A1 (en) 1981-03-16
AU5678180A (en) 1981-01-15

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