JPS5528542A - Clock generation system - Google Patents

Clock generation system

Info

Publication number
JPS5528542A
JPS5528542A JP10094578A JP10094578A JPS5528542A JP S5528542 A JPS5528542 A JP S5528542A JP 10094578 A JP10094578 A JP 10094578A JP 10094578 A JP10094578 A JP 10094578A JP S5528542 A JPS5528542 A JP S5528542A
Authority
JP
Japan
Prior art keywords
clock
address buffer
enable signal
clock generation
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10094578A
Other languages
Japanese (ja)
Inventor
Masamichi Ishihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10094578A priority Critical patent/JPS5528542A/en
Publication of JPS5528542A publication Critical patent/JPS5528542A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To ensure driving of the address buffer with no sacrifice of the access time by producing the trigger clock newly from the enable signal through the delay circuit and without using the enable signal which produces the driving clock directly for the trigger clock. CONSTITUTION:In the clock generation circuit of the entire semiconductor memory, trigger clock delay circuit 5 is constituted by the 2-step inverter, and the delay time necessary for the address buffer can be produced freely by selecting appropriately the constant of the 2-step inverter. And the set-up time can be insured sufficiently, furthermore the actuation of the address buffer being secured with no loss of the access time.
JP10094578A 1978-08-21 1978-08-21 Clock generation system Pending JPS5528542A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10094578A JPS5528542A (en) 1978-08-21 1978-08-21 Clock generation system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10094578A JPS5528542A (en) 1978-08-21 1978-08-21 Clock generation system

Publications (1)

Publication Number Publication Date
JPS5528542A true JPS5528542A (en) 1980-02-29

Family

ID=14287481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10094578A Pending JPS5528542A (en) 1978-08-21 1978-08-21 Clock generation system

Country Status (1)

Country Link
JP (1) JPS5528542A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4337525A (en) * 1979-04-17 1982-06-29 Nippon Electric Co., Ltd. Asynchronous circuit responsive to changes in logic level
JPS5961094A (en) * 1982-09-29 1984-04-07 東京コスモス電機株式会社 Method of producing composited electronic part
EP0170781A2 (en) * 1981-03-13 1986-02-12 Fujitsu Limited MOS dynamic memory device
JPH03152314A (en) * 1989-11-07 1991-06-28 Ohbayashi Corp Heater device
JPH0514489Y2 (en) * 1987-10-23 1993-04-19
US6483770B2 (en) * 2000-11-20 2002-11-19 Samsung Electronics Co., Ltd. Synchronous semiconductor memory device and method for operating same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4337525A (en) * 1979-04-17 1982-06-29 Nippon Electric Co., Ltd. Asynchronous circuit responsive to changes in logic level
EP0170781A2 (en) * 1981-03-13 1986-02-12 Fujitsu Limited MOS dynamic memory device
JPS5961094A (en) * 1982-09-29 1984-04-07 東京コスモス電機株式会社 Method of producing composited electronic part
JPH0241190B2 (en) * 1982-09-29 1990-09-14 Tokyo Cosmos Electric
JPH0514489Y2 (en) * 1987-10-23 1993-04-19
JPH03152314A (en) * 1989-11-07 1991-06-28 Ohbayashi Corp Heater device
US6483770B2 (en) * 2000-11-20 2002-11-19 Samsung Electronics Co., Ltd. Synchronous semiconductor memory device and method for operating same

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