ES2133971T3 - Celda de memoria no volatil borrable y programable electricamente. - Google Patents

Celda de memoria no volatil borrable y programable electricamente.

Info

Publication number
ES2133971T3
ES2133971T3 ES96922752T ES96922752T ES2133971T3 ES 2133971 T3 ES2133971 T3 ES 2133971T3 ES 96922752 T ES96922752 T ES 96922752T ES 96922752 T ES96922752 T ES 96922752T ES 2133971 T3 ES2133971 T3 ES 2133971T3
Authority
ES
Spain
Prior art keywords
drain
pct
source
region
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96922752T
Other languages
English (en)
Inventor
Georg Tempel
Josef Winnerl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Application granted granted Critical
Publication of ES2133971T3 publication Critical patent/ES2133971T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Micro-Organisms Or Cultivation Processes Thereof (AREA)

Abstract

CELDA DE MEMORIA NO VOLATIL QUE PUEDE BORRARSE Y PROGRAMARSE ELECTRICAMENTE, QUE ESTA FORMADA SOLO POR UN TRANSISTOR MOS FORMADO POR UN PASO FUENTE-CANAL-DRENAJE, EN LA QUE EN UN SUSTRATO SEMICONDUCTOR (1) DE UN PRIMER TIPO DE CONDUCTIBILIDAD SE HAN CONFORMADO UNA ZONA DE DRENAJE (2) Y UNA ZONA DE FUENTE (3) DE UN SEGUNDO TIPO DE CONDUCTIBILIDAD CON POLARIDAD OPUESTA, CON UN ELECTRODO DE PUERTA (4) QUE SE ENCUENTRA A UN POTENCIAL FLOTANTE Y QUE SE HA AISLADO ELECTRICAMENTE DE LA ZONA DE DRENAJE (2) MEDIANTE UN OXIDO DE TUNEL (5) Y DE UNA ZONA DE CANAL (9), QUE SE ENCUENTRA ENTRE LA ZONA DE DRENAJE Y LA DE FUENTE (2, 3), MEDIANTE UN OXIDO DE PUERTA (5 ; 10), EXTENDIENDOSE EN LA DIRECCION FUENTE-CANAL-DRENAJE AL MENOS POR UNA PARTE DE LA ZONA DE CANAL (9) Y UNA PARTE DE LA ZONA DE DRENAJE (2) Y ESTANDO AISLADO ELECTRICAMENTE DEL ELECTRODO DE PUERTA (4) MEDIANTE UN OXIDO DE ACOPLAMIENTO (8).
ES96922752T 1995-07-17 1996-07-08 Celda de memoria no volatil borrable y programable electricamente. Expired - Lifetime ES2133971T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19526012A DE19526012C2 (de) 1995-07-17 1995-07-17 Elektrisch lösch- und programmierbare nicht-flüchtige Speicherzelle

Publications (1)

Publication Number Publication Date
ES2133971T3 true ES2133971T3 (es) 1999-09-16

Family

ID=7767041

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96922752T Expired - Lifetime ES2133971T3 (es) 1995-07-17 1996-07-08 Celda de memoria no volatil borrable y programable electricamente.

Country Status (9)

Country Link
US (1) US5883832A (es)
EP (1) EP0839390B1 (es)
JP (1) JPH10510681A (es)
KR (1) KR19990029002A (es)
AT (1) ATE179550T1 (es)
DE (2) DE19526012C2 (es)
ES (1) ES2133971T3 (es)
RU (1) RU2168242C2 (es)
WO (1) WO1997004490A1 (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6005809A (en) * 1998-06-19 1999-12-21 Taiwan Semiconductor Manufacturing Company, Ltd. Program and erase method for a split gate flash EEPROM
JP4809545B2 (ja) * 2001-05-31 2011-11-09 株式会社半導体エネルギー研究所 半導体不揮発性メモリ及び電子機器
TW578321B (en) * 2002-10-02 2004-03-01 Topro Technology Inc Complementary metal-oxide semiconductor structure for a battery protection circuit and battery protection circuit therewith
KR100620218B1 (ko) * 2003-12-31 2006-09-11 동부일렉트로닉스 주식회사 반도체 소자

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4399523A (en) * 1979-08-24 1983-08-16 Centre Electronique Horloger Sa Non-volatile, electrically erasable and reprogrammable memory element
US4613885A (en) * 1982-02-01 1986-09-23 Texas Instruments Incorporated High-voltage CMOS process
DE3701649A1 (de) * 1987-01-21 1988-08-04 Siemens Ag Verfahren zur herstellung von eeprom-speicherzellen mit tunnelstromprogrammierung in zweifacher poly-silizium-nmos-technologie
JP3069358B2 (ja) * 1989-08-15 2000-07-24 株式会社日立製作所 半導体集積回路装置
US5077691A (en) * 1989-10-23 1991-12-31 Advanced Micro Devices, Inc. Flash EEPROM array with negative gate voltage erase operation
US5086325A (en) * 1990-11-21 1992-02-04 Atmel Corporation Narrow width EEPROM with single diffusion electrode formation
JP3060680B2 (ja) * 1990-11-30 2000-07-10 日本電気株式会社 不揮発性半導体記憶装置
US5293328A (en) * 1992-01-15 1994-03-08 National Semiconductor Corporation Electrically reprogrammable EPROM cell with merged transistor and optiumum area
US5396459A (en) * 1992-02-24 1995-03-07 Sony Corporation Single transistor flash electrically programmable memory cell in which a negative voltage is applied to the nonselected word line
US5294819A (en) * 1992-11-25 1994-03-15 Information Storage Devices Single-transistor cell EEPROM array for analog or digital storage
JP3342730B2 (ja) * 1993-03-17 2002-11-11 富士通株式会社 不揮発性半導体記憶装置
JPH07147095A (ja) * 1993-03-31 1995-06-06 Sony Corp 半導体不揮発性記憶装置およびデコーダ回路
EP0690452A3 (en) * 1994-06-28 1999-01-07 Advanced Micro Devices, Inc. Electrically erasable memory and method of erasure

Also Published As

Publication number Publication date
DE19526012A1 (de) 1997-01-23
JPH10510681A (ja) 1998-10-13
ATE179550T1 (de) 1999-05-15
EP0839390B1 (de) 1999-04-28
EP0839390A1 (de) 1998-05-06
US5883832A (en) 1999-03-16
DE19526012C2 (de) 1997-09-11
WO1997004490A1 (de) 1997-02-06
DE59601782D1 (de) 1999-06-02
KR19990029002A (ko) 1999-04-15
RU2168242C2 (ru) 2001-05-27

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