ATE168215T1 - Elektrisch aenderbare einzel-transistor- halbleiterfestwertspeicheranordnung - Google Patents

Elektrisch aenderbare einzel-transistor- halbleiterfestwertspeicheranordnung

Info

Publication number
ATE168215T1
ATE168215T1 AT92917322T AT92917322T ATE168215T1 AT E168215 T1 ATE168215 T1 AT E168215T1 AT 92917322 T AT92917322 T AT 92917322T AT 92917322 T AT92917322 T AT 92917322T AT E168215 T1 ATE168215 T1 AT E168215T1
Authority
AT
Austria
Prior art keywords
insulating layer
over
floating gate
value memory
memory arrangement
Prior art date
Application number
AT92917322T
Other languages
English (en)
Inventor
Ping Wang
Bing Yeh
Original Assignee
Silicon Storage Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=24739804&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ATE168215(T1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Silicon Storage Tech Inc filed Critical Silicon Storage Tech Inc
Application granted granted Critical
Publication of ATE168215T1 publication Critical patent/ATE168215T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401Multistep manufacturing processes
    • H01L29/4011Multistep manufacturing processes for data storage electrodes
    • H01L29/40114Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885Hot carrier injection from the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Electronic Switches (AREA)
  • Amplifiers (AREA)
  • Bipolar Transistors (AREA)
AT92917322T 1991-04-09 1992-03-13 Elektrisch aenderbare einzel-transistor- halbleiterfestwertspeicheranordnung ATE168215T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US68245991A 1991-04-09 1991-04-09

Publications (1)

Publication Number Publication Date
ATE168215T1 true ATE168215T1 (de) 1998-07-15

Family

ID=24739804

Family Applications (1)

Application Number Title Priority Date Filing Date
AT92917322T ATE168215T1 (de) 1991-04-09 1992-03-13 Elektrisch aenderbare einzel-transistor- halbleiterfestwertspeicheranordnung

Country Status (6)

Country Link
EP (1) EP0579779B1 (de)
JP (1) JP3854629B2 (de)
AT (1) ATE168215T1 (de)
CA (1) CA2107676C (de)
DE (1) DE69226176T2 (de)
WO (1) WO1992018980A1 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5369609A (en) * 1992-03-13 1994-11-29 Silicon Storage Technology, Inc. Floating gate memory array with latches having improved immunity to write disturbance, and with storage latches
US5479368A (en) * 1993-09-30 1995-12-26 Cirrus Logic, Inc. Spacer flash cell device with vertically oriented floating gate
JP3133667B2 (ja) * 1995-02-23 2001-02-13 三洋電機株式会社 スプリットゲート型トランジスタ、スプリットゲート型トランジスタの製造方法、不揮発性半導体メモリ
TW334566B (en) * 1996-02-26 1998-06-21 Sanyo Electric Co Non-volatile semiconductor memory device
TW338158B (en) * 1996-02-29 1998-08-11 Sanyo Electric Co Non volatile semiconductor memory device
TW378321B (en) * 1996-02-29 2000-01-01 Sanyo Electric Co Semiconductor memory device
US5936883A (en) 1996-03-29 1999-08-10 Sanyo Electric Co., Ltd. Split gate type transistor memory device
JP3081543B2 (ja) * 1996-03-29 2000-08-28 三洋電機株式会社 スプリットゲート型トランジスタ、スプリットゲート型トランジスタの製造方法、不揮発性半導体メモリ
JPH10134579A (ja) * 1996-10-31 1998-05-22 Sanyo Electric Co Ltd 不揮発性半導体メモリ
US6097059A (en) * 1996-12-27 2000-08-01 Sanyo Electric Co., Ltd. Transistor, transistor array, method for manufacturing transistor array, and nonvolatile semiconductor memory
JPH10302482A (ja) * 1997-02-27 1998-11-13 Sanyo Electric Co Ltd 半導体メモリ
JPH118324A (ja) 1997-04-23 1999-01-12 Sanyo Electric Co Ltd トランジスタ、トランジスタアレイおよび不揮発性半導体メモリ
US6317362B1 (en) 1999-07-13 2001-11-13 Sanyo Electric Co., Ltd. Semiconductor memory device
US6727545B2 (en) * 2000-09-20 2004-04-27 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with low resistance source regions and high source coupling
JP2003046002A (ja) * 2001-07-26 2003-02-14 Sony Corp 不揮発性半導体メモリ装置およびその動作方法
KR100511032B1 (ko) * 2003-02-28 2005-08-30 삼성전자주식회사 플로팅 게이트의 형성 방법 및 이를 이용한 불휘발성메모리 장치의 제조 방법
US8138524B2 (en) 2006-11-01 2012-03-20 Silicon Storage Technology, Inc. Self-aligned method of forming a semiconductor memory array of floating memory cells with source side erase, and a memory array made thereby
US20090039410A1 (en) * 2007-08-06 2009-02-12 Xian Liu Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of Manufacturing
JP7164271B2 (ja) * 2017-10-10 2022-11-01 ラピスセミコンダクタ株式会社 半導体装置の製造方法および半導体装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4729115A (en) * 1984-09-27 1988-03-01 International Business Machines Corporation Non-volatile dynamic random access memory cell
US4825271A (en) * 1986-05-20 1989-04-25 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory
US4794565A (en) * 1986-09-15 1988-12-27 The Regents Of The University Of California Electrically programmable memory device employing source side injection
GB2200795B (en) * 1987-02-02 1990-10-03 Intel Corp Eprom cell with integral select transistor
US4812885A (en) * 1987-08-04 1989-03-14 Texas Instruments Incorporated Capacitive coupling
US5045489A (en) * 1989-06-30 1991-09-03 Texas Instruments Incorporated Method of making a high-speed 2-transistor cell for programmable/EEPROM devices with separate read and write transistors
US5029130A (en) * 1990-01-22 1991-07-02 Silicon Storage Technology, Inc. Single transistor non-valatile electrically alterable semiconductor memory device
DE69133003T2 (de) * 1990-01-22 2002-12-12 Silicon Storage Tech Inc Nichtflüchtige elektrisch veränderbare eintransistor-halbleiterspeicheranordnung mit rekristallisiertem schwebendem gate

Also Published As

Publication number Publication date
CA2107676A1 (en) 1992-10-10
EP0579779A4 (en) 1994-07-27
WO1992018980A1 (en) 1992-10-29
EP0579779A1 (de) 1994-01-26
DE69226176T2 (de) 1999-12-23
DE69226176D1 (de) 1998-08-13
EP0579779B1 (de) 1998-07-08
CA2107676C (en) 2000-10-31
JP3854629B2 (ja) 2006-12-06
JPH06506798A (ja) 1994-07-28

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