ES2079367T3 - Metodo y aparato para la recuperacion de fallos en un sistema de ordenadores digitales. - Google Patents

Metodo y aparato para la recuperacion de fallos en un sistema de ordenadores digitales.

Info

Publication number
ES2079367T3
ES2079367T3 ES89118684T ES89118684T ES2079367T3 ES 2079367 T3 ES2079367 T3 ES 2079367T3 ES 89118684 T ES89118684 T ES 89118684T ES 89118684 T ES89118684 T ES 89118684T ES 2079367 T3 ES2079367 T3 ES 2079367T3
Authority
ES
Spain
Prior art keywords
memory
cpu
series
bits
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES89118684T
Other languages
English (en)
Inventor
Richard F Hess
Kurt A Liebel
Larry J Yount
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell Inc
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inc filed Critical Honeywell Inc
Application granted granted Critical
Publication of ES2079367T3 publication Critical patent/ES2079367T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Retry When Errors Occur (AREA)
  • Hardware Redundancy (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

UN METODO Y UN APARATO PARA RECUPERAR FALLOS EN UN SISTEMA DE CONTROL QUE TIENE POR BASE UN COMPUTADOR DIGITAL POR EL CUAL PUEDEN RECUPERARSE LAS ALTERACIONES DEL SISTEMA PRODUCIDAS POR CONDICIONES DE RUIDOS TRANSITORIOS EXTERIORES. SE ACOPLA UNA CPU (10) A SU MEMEORIA PRINCIPAL (20) Y A SU INTERFACE DE E/S (ENTRADA / SALIDA) MEDIANTE UN COLECTOR DE DIRECCIONAMIENTO/DATOS (22) COMUN, PUDIENDOSE ALTERAR LOS DATOS CONTENIDOS SOBRE O EN ESTOS TRES ELEMENTOS POR EL EFECTO DE RUIDOS TRANSITORIOS. TAMBIEN ACOPLADOS AL COLECTOR, PERO EN UN MEDIO DE HARDWARE, EXISTEN PRIMERAS Y SEGUNDAS MEMORIAS SUPLEMENTARIAS (34, 36) QUE, POR CONTROL DE LA MEMORIA (38), OPERAN PARA ALTERNAR LAS SERIES DE BITS DE CALCULO PARES E IMPARES DEFINIDAS POR EL RELOJ DE TIEMPO REAL DE LA CPU PARA ALMACENAR LAS MISMAS PALABRAS QUE SE INCORPOREN EN ESE MOMENTO EN LA MEMORIA PRINCIPAL (20) DE LA CPU. A MEDIDA QUE ESTAS SERIES DE BITS DE CALCULO ENTRAN EN UNA U OTRA DE ESTAS DOS MEMORIAS (34, 36) POR INTRODUCCION NO AUTORIZADA EN EL COLECTOR COMUN (22), LA OTRA MEMORIA SUPLEMENTARIA TRANSFIERE SUS CONTENIDOS A UNA MEMORIA AUXILIAR (30) QUE TAMBIEN SE UBICA EN EL MEDIO INMUNE AL RUIDO. SE CONECTA LA MEMORIA AUXILIAR EN UNA MODALIDAD DE SOLO LECTURA AL COLECTOR DE DIRECCIONAMIENTO/DATOS Y, DEBIDO A SU FORMA DE OPERACION, SIEMPRE CONTIENE LA SERIE DE BITS RETRASADA EN UN CICLO DEL RELOJ DE TIEMPO REAL DE LA CPU CON RESPECTO A LA SERIE DE BITS EN PROCESO. SI SE ALTERARA UN TRANSITORIO, PODRIA CONTINUAR UNA TRANSFERENCIA DE INFORMACION DESDE LA MEMORIA AUXILIAR (30) A LA MEMORIA PRINCIPAL (20) DEL ORDENADOR, DE MANERA QUE LOS CALCULOS PUEDAN CONTINUAR CON LOS DATOS NO ALTERADOS.
ES89118684T 1988-10-11 1989-10-07 Metodo y aparato para la recuperacion de fallos en un sistema de ordenadores digitales. Expired - Lifetime ES2079367T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/256,060 US4996687A (en) 1988-10-11 1988-10-11 Fault recovery mechanism, transparent to digital system function

Publications (1)

Publication Number Publication Date
ES2079367T3 true ES2079367T3 (es) 1996-01-16

Family

ID=22970958

Family Applications (1)

Application Number Title Priority Date Filing Date
ES89118684T Expired - Lifetime ES2079367T3 (es) 1988-10-11 1989-10-07 Metodo y aparato para la recuperacion de fallos en un sistema de ordenadores digitales.

Country Status (6)

Country Link
US (1) US4996687A (es)
EP (1) EP0363863B1 (es)
JP (1) JP2791697B2 (es)
CA (1) CA1322606C (es)
DE (1) DE68924119T2 (es)
ES (1) ES2079367T3 (es)

Families Citing this family (67)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0235551A (ja) * 1988-07-26 1990-02-06 Toshiba Corp チャネル装置におけるアドレス変換方式
JP3222125B2 (ja) * 1990-01-29 2001-10-22 株式会社日立製作所 システム間データベース共用方式
US5335234A (en) * 1990-06-19 1994-08-02 Dell Usa, L.P. Error correction code pipeline for interleaved memory system
US5584044A (en) * 1990-09-28 1996-12-10 Fuji Photo Film Co., Ltd. Integrated circuit memory card for write in/read out capability having plurality of latching means for expandable addressing using counting means for enabling latches thereof
US5381538A (en) * 1991-10-15 1995-01-10 International Business Machines Corp. DMA controller including a FIFO register and a residual register for data buffering and having different operating modes
US5325519A (en) * 1991-10-18 1994-06-28 Texas Microsystems, Inc. Fault tolerant computer with archival rollback capabilities
US5550736A (en) * 1993-04-27 1996-08-27 Honeywell Inc. Fail-operational fault tolerant flight critical computer architecture and monitoring method
US5600786A (en) * 1993-07-30 1997-02-04 Honeywell Inc. FIFO fail-safe bus
US5568380A (en) * 1993-08-30 1996-10-22 International Business Machines Corporation Shadow register file for instruction rollback
JPH07319747A (ja) * 1994-05-24 1995-12-08 Nec Telecom Syst Ltd データ更新システム
WO1995034860A1 (en) * 1994-06-10 1995-12-21 Sequoia Systems, Inc. Main memory system and checkpointing protocol for fault-tolerant computer system
JP3281211B2 (ja) * 1995-01-31 2002-05-13 富士通株式会社 同期式メモリを有する情報処理装置および同期式メモリ
JPH0950405A (ja) * 1995-08-04 1997-02-18 Fujitsu Ltd バックアップ機能付き記憶装置および同記憶装置を有する情報処理システム
US5864657A (en) * 1995-11-29 1999-01-26 Texas Micro, Inc. Main memory system and checkpointing protocol for fault-tolerant computer system
US5829047A (en) * 1996-08-29 1998-10-27 Lucent Technologies Inc. Backup memory for reliable operation
US6163480A (en) * 1997-12-29 2000-12-19 Honeywell International Inc. Memory with high integrity memory cells
US6977927B1 (en) 2000-09-18 2005-12-20 Hewlett-Packard Development Company, L.P. Method and system of allocating storage resources in a storage area network
US6804819B1 (en) 2000-09-18 2004-10-12 Hewlett-Packard Development Company, L.P. Method, system, and computer program product for a data propagation platform and applications of same
US7386610B1 (en) 2000-09-18 2008-06-10 Hewlett-Packard Development Company, L.P. Internet protocol data mirroring
US6606690B2 (en) 2001-02-20 2003-08-12 Hewlett-Packard Development Company, L.P. System and method for accessing a storage area network as network attached storage
US6813527B2 (en) 2002-11-20 2004-11-02 Honeywell International Inc. High integrity control system architecture using digital computing platforms with rapid recovery
KR100532413B1 (ko) * 2002-12-02 2005-12-02 삼성전자주식회사 플래시 메모리 보호 장치 및 방법
US7971095B2 (en) * 2005-02-16 2011-06-28 Honeywell International Inc. Fault recovery for real-time, multi-tasking computer system
US7698511B2 (en) * 2005-05-19 2010-04-13 Honeywell International Inc. Interface for writing to memories having different write times
WO2007018652A1 (en) * 2005-08-05 2007-02-15 Honeywell International, Inc. Distributed and recoverable digital control system
WO2007018651A1 (en) * 2005-08-05 2007-02-15 Honeywell International, Inc. Method for redunancy management of distributed and recoverable digital control system
US7765427B2 (en) * 2005-08-05 2010-07-27 Honeywell International Inc. Monitoring system and methods for a distributed and recoverable digital control system
US7793147B2 (en) * 2006-07-18 2010-09-07 Honeywell International Inc. Methods and systems for providing reconfigurable and recoverable computing resources
US7979420B2 (en) * 2007-10-16 2011-07-12 Oracle International Corporation Handling silent relations in a data stream management system
US8296316B2 (en) * 2007-10-17 2012-10-23 Oracle International Corporation Dynamically sharing a subtree of operators in a data stream management system operating on existing queries
US7996388B2 (en) * 2007-10-17 2011-08-09 Oracle International Corporation Adding new continuous queries to a data stream management system operating on existing queries
US8589436B2 (en) 2008-08-29 2013-11-19 Oracle International Corporation Techniques for performing regular expression-based pattern matching in data streams
US8352517B2 (en) * 2009-03-02 2013-01-08 Oracle International Corporation Infrastructure for spilling pages to a persistent store
US8935293B2 (en) * 2009-03-02 2015-01-13 Oracle International Corporation Framework for dynamically generating tuple and page classes
US8145859B2 (en) 2009-03-02 2012-03-27 Oracle International Corporation Method and system for spilling from a queue to a persistent store
US8321450B2 (en) * 2009-07-21 2012-11-27 Oracle International Corporation Standardized database connectivity support for an event processing server in an embedded context
US8387076B2 (en) * 2009-07-21 2013-02-26 Oracle International Corporation Standardized database connectivity support for an event processing server
US8527458B2 (en) * 2009-08-03 2013-09-03 Oracle International Corporation Logging framework for a data stream processing server
US8386466B2 (en) * 2009-08-03 2013-02-26 Oracle International Corporation Log visualization tool for a data stream processing server
US9305057B2 (en) * 2009-12-28 2016-04-05 Oracle International Corporation Extensible indexing framework using data cartridges
US9430494B2 (en) * 2009-12-28 2016-08-30 Oracle International Corporation Spatial data cartridge for event processing systems
US8959106B2 (en) 2009-12-28 2015-02-17 Oracle International Corporation Class loading using java data cartridges
US8631271B2 (en) 2010-06-24 2014-01-14 International Business Machines Corporation Heterogeneous recovery in a redundant memory system
US8898511B2 (en) 2010-06-24 2014-11-25 International Business Machines Corporation Homogeneous recovery in a redundant memory system
US8549378B2 (en) 2010-06-24 2013-10-01 International Business Machines Corporation RAIM system using decoding of virtual ECC
US8713049B2 (en) 2010-09-17 2014-04-29 Oracle International Corporation Support for a parameterized query/view in complex event processing
US9189280B2 (en) 2010-11-18 2015-11-17 Oracle International Corporation Tracking large numbers of moving objects in an event processing system
US8990416B2 (en) 2011-05-06 2015-03-24 Oracle International Corporation Support for a new insert stream (ISTREAM) operation in complex event processing (CEP)
US9329975B2 (en) 2011-07-07 2016-05-03 Oracle International Corporation Continuous query language (CQL) debugger in complex event processing (CEP)
US9953059B2 (en) 2012-09-28 2018-04-24 Oracle International Corporation Generation of archiver queries for continuous queries over archived relations
US9563663B2 (en) 2012-09-28 2017-02-07 Oracle International Corporation Fast path evaluation of Boolean predicates
US10956422B2 (en) 2012-12-05 2021-03-23 Oracle International Corporation Integrating event processing with map-reduce
US10298444B2 (en) 2013-01-15 2019-05-21 Oracle International Corporation Variable duration windows on continuous data streams
US9098587B2 (en) 2013-01-15 2015-08-04 Oracle International Corporation Variable duration non-event pattern matching
US9047249B2 (en) 2013-02-19 2015-06-02 Oracle International Corporation Handling faults in a continuous event processing (CEP) system
US9390135B2 (en) 2013-02-19 2016-07-12 Oracle International Corporation Executing continuous event processing (CEP) queries in parallel
US9418113B2 (en) 2013-05-30 2016-08-16 Oracle International Corporation Value based windows on relations in continuous data streams
US9934279B2 (en) 2013-12-05 2018-04-03 Oracle International Corporation Pattern matching across multiple input data streams
US9244978B2 (en) 2014-06-11 2016-01-26 Oracle International Corporation Custom partitioning of a data stream
US9712645B2 (en) 2014-06-26 2017-07-18 Oracle International Corporation Embedded event processing
US9886486B2 (en) 2014-09-24 2018-02-06 Oracle International Corporation Enriching events with dynamically typed big data for event processing
US10120907B2 (en) 2014-09-24 2018-11-06 Oracle International Corporation Scaling event processing using distributed flows and map-reduce operations
WO2017018901A1 (en) 2015-07-24 2017-02-02 Oracle International Corporation Visually exploring and analyzing event streams
US20180032457A1 (en) * 2016-07-26 2018-02-01 Qualcomm Incorporated Slave initiated interrupts for a communication bus
US10922203B1 (en) * 2018-09-21 2021-02-16 Nvidia Corporation Fault injection architecture for resilient GPU computing
DE102020103280A1 (de) 2020-02-10 2021-08-12 Olympus Winter & Ibe Gmbh Elektrochirurgisches System, elektrochirurgisches Instrument, Verfahren zum Auslesen von Konfigurationsdaten, und elektrochirurgisches Versorgungsgerät
DE102020103278A1 (de) * 2020-02-10 2021-08-12 Olympus Winter & Ibe Gmbh Elektrochirurgisches System, elektrochirurgisches Instrument, Verfahren zum Schreiben von Betriebsdarten, und elektrochirurgisches Versorgungsgerät

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4413327A (en) * 1970-06-09 1983-11-01 The United States Of America As Represented By The Secretary Of The Navy Radiation circumvention technique
US3736566A (en) * 1971-08-18 1973-05-29 Ibm Central processing unit with hardware controlled checkpoint and retry facilities
US4199810A (en) * 1977-01-07 1980-04-22 Rockwell International Corporation Radiation hardened register file
US4442501A (en) * 1981-02-26 1984-04-10 Pitney Bowes Inc. Electronic postage meter with weak memory indication

Also Published As

Publication number Publication date
EP0363863A3 (en) 1991-07-03
DE68924119D1 (de) 1995-10-12
JPH02253344A (ja) 1990-10-12
US4996687A (en) 1991-02-26
CA1322606C (en) 1993-09-28
DE68924119T2 (de) 1996-07-04
EP0363863A2 (en) 1990-04-18
JP2791697B2 (ja) 1998-08-27
EP0363863B1 (en) 1995-09-06

Similar Documents

Publication Publication Date Title
ES2079367T3 (es) Metodo y aparato para la recuperacion de fallos en un sistema de ordenadores digitales.
KR890012323A (ko) 에러정정회로를 갖는 반도체 메모리
KR900008526A (ko) 반도체 기억장치
NO870415D0 (no) Datamaskinsystem.
KR930020472A (ko) 틀림정정회로를 가지는 이이피롬
KR910010506A (ko) 반도체 장치
KR920001552A (ko) 반도체 메모리 장치의 다중 비트 병렬 테스트방법
KR880000862A (ko) 데이터 전송회로
KR930001229A (ko) 반도체 메모리 장치
KR950015061A (ko) 동기식 이진 카운터
KR100617999B1 (ko) 메모리 장치 내의 데이터 캡처를 위한 방법 및 장치
DE59801409D1 (de) Vorrichtung zum hierarchischen verbinden einer mehrzahl von funktionseinheiten in einem prozessor
KR0165207B1 (ko) 마이크로 콘트롤러의 전력소비를 감소시키는 모듈별 슬립모드 제어회로
JPS6362083A (ja) 射影デ−タ生成方式
SU1640739A1 (ru) Устройство дл считывани информации из ассоциативной пам ти
KR910010319A (ko) 3중 메모리 방법 및 회로
SU441559A1 (ru) Устройство дл сравнени двоичных чисел
KR880008541A (ko) 동기패턴 검출회로
KR930001217A (ko) 반도체 기억장치
KR970051154A (ko) 반도체 메모리 소자의 데이터 라인 배선방법
KR840006090A (ko) 제 산 회 로
SU799010A2 (ru) Ячейка пам ти дл буферногоРЕгиСТРА
JPS55150062A (en) Array processor controller
KR910010716A (ko) 반도체집적회로
JPS5775347A (en) Interface circuit of printer

Legal Events

Date Code Title Description
FG2A Definitive protection

Ref document number: 363863

Country of ref document: ES