ES2057113T3 - Procedimiento para fabricar una capa sobre un substrato. - Google Patents

Procedimiento para fabricar una capa sobre un substrato.

Info

Publication number
ES2057113T3
ES2057113T3 ES89303822T ES89303822T ES2057113T3 ES 2057113 T3 ES2057113 T3 ES 2057113T3 ES 89303822 T ES89303822 T ES 89303822T ES 89303822 T ES89303822 T ES 89303822T ES 2057113 T3 ES2057113 T3 ES 2057113T3
Authority
ES
Spain
Prior art keywords
oxidation
stage
temperature
carried out
oxide layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES89303822T
Other languages
English (en)
Inventor
Effiong E Ibok
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ES2057113T3 publication Critical patent/ES2057113T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
    • H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Read Only Memory (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)

Abstract

UN METODO PARA FABRICAR UNA CAPA DE OXIDO TUNEL DE GRAN CALIDAD INCLUYE UN PROCESO DE OXIDACION EN DOS ETAPAS. LA PRIMERA ETAPA DE OXIDACION CONSISTE EN OXIDAR UN SUBSTRATO EN UNA ATMOSFERA QUE CONTIENE OXIGENO Y NITROGENO A UNA TEMPERATURA DE 900 (GRADOS) C APROXIMADAMENTE, Y ASI ES UNA OXIDACION SIN HCL. LA SEGUNDA ETAPA DE OXIDACION SE LLEVA A CABO EN UNA ATMOSFERA QUE CONTIENE HCL Y ARGON A UNA TEMPERATURA DE 1050 (GRADOS) C APROXIMADAMENTE. LA PRIMERA ETAPA DE OXIDACION SE LLEVA A CABO A UNA TEMPERATURA EN EL INTERVALO DE TEMPERATURAS DEL FLUJO VISCOSO DEL OXIDO PARA EVITAR CUALQUIER DEFECTO FISICO DE LA FORMA DE LA CAPA DE OXIDO. LA SEGUNDA ETAPA DE OXIDACION SE LLEVA A CABO A UNA TEMPERATURA SUFICIENTE PARA PASIVAR CUALQUIER ION MOVIL EN LA CAPA DE OXIDO EN UNA ATMOSFERA QUE CONTIENE UN AGENTE ENGENDRADOR, POR EJEMPLO HCL. MEDIANTE ESTE PROCESO DE OXIDACION EN DOS ETAPAS SE FABRICA UNA CAPA DE OXIDO TUNEL QUE ES DE GRAN CALIDAD Y NO SE DETERIORA DURANTE LAS ETAPAS DE PROCESADO SUBSIGUIENTES LLEVADAS A CABO A TEMPERATURAS DE HASTA 1100 (GRADOS) C Y SUPERIORES.
ES89303822T 1988-04-29 1989-04-18 Procedimiento para fabricar una capa sobre un substrato. Expired - Lifetime ES2057113T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/187,738 US4894353A (en) 1988-04-29 1988-04-29 Method of fabricating passivated tunnel oxide

Publications (1)

Publication Number Publication Date
ES2057113T3 true ES2057113T3 (es) 1994-10-16

Family

ID=22690255

Family Applications (1)

Application Number Title Priority Date Filing Date
ES89303822T Expired - Lifetime ES2057113T3 (es) 1988-04-29 1989-04-18 Procedimiento para fabricar una capa sobre un substrato.

Country Status (6)

Country Link
US (1) US4894353A (es)
EP (1) EP0339852B1 (es)
JP (1) JP2911476B2 (es)
AT (1) ATE109307T1 (es)
DE (1) DE68917006T2 (es)
ES (1) ES2057113T3 (es)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0375232B1 (en) * 1988-12-21 1996-03-06 AT&T Corp. Growth-modified thermal oxidation process for thin oxides
JP2504558B2 (ja) * 1989-03-31 1996-06-05 日産自動車株式会社 熱酸化膜の形成方法
US6373093B2 (en) 1989-04-28 2002-04-16 Nippondenso Corporation Semiconductor memory device and method of manufacturing the same
US5017979A (en) * 1989-04-28 1991-05-21 Nippondenso Co., Ltd. EEPROM semiconductor memory device
US5057463A (en) * 1990-02-28 1991-10-15 Sgs-Thomson Microelectronics, Inc. Thin oxide structure and method
US6146135A (en) * 1991-08-19 2000-11-14 Tadahiro Ohmi Oxide film forming method
US5316981A (en) * 1992-10-09 1994-05-31 Advanced Micro Devices, Inc. Method for achieving a high quality thin oxide using a sacrificial oxide anneal
US5296411A (en) * 1993-04-28 1994-03-22 Advanced Micro Devices, Inc. Method for achieving an ultra-reliable thin oxide using a nitrogen anneal
US5498577A (en) * 1994-07-26 1996-03-12 Advanced Micro Devices, Inc. Method for fabricating thin oxides for a semiconductor technology
JP4001960B2 (ja) * 1995-11-03 2007-10-31 フリースケール セミコンダクター インコーポレイテッド 窒化酸化物誘電体層を有する半導体素子の製造方法
US5753311A (en) * 1996-10-01 1998-05-19 National Science Council Method for forming oxide layer
US6204124B1 (en) * 1998-03-23 2001-03-20 Texas Instruments - Acer Incorporated Method for forming high density nonvolatile memories with high capacitive-coupling ratio
US6235651B1 (en) 1999-09-14 2001-05-22 Infineon Technologies North America Process for improving the thickness uniformity of a thin layer in semiconductor wafer fabrication
US7595967B1 (en) 2004-09-07 2009-09-29 Western Digital (Fremont), Llp Method for fabricating a spacer layer for a magnetoresistive element
US20080299780A1 (en) * 2007-06-01 2008-12-04 Uv Tech Systems, Inc. Method and apparatus for laser oxidation and reduction

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4911069A (es) * 1972-05-26 1974-01-31
US4139658A (en) * 1976-06-23 1979-02-13 Rca Corp. Process for manufacturing a radiation hardened oxide
JPS54125966A (en) * 1978-03-24 1979-09-29 Hitachi Ltd Defect elimination method for semiconductor wafer
JPS5662328A (en) * 1979-10-26 1981-05-28 Agency Of Ind Science & Technol Manufacturing of insulation membrane and insulation membrane-semiconductor interface
JPS56131935A (en) * 1980-03-19 1981-10-15 Sony Corp Heat treatment of semiconductor substrate
JPS56161646A (en) * 1980-05-19 1981-12-12 Fujitsu Ltd Manufacture of semiconductor device
DE3206376A1 (de) * 1982-02-22 1983-09-01 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung von siliziumoxidschichten
US4551910A (en) * 1984-11-27 1985-11-12 Intel Corporation MOS Isolation processing
US4784975A (en) * 1986-10-23 1988-11-15 International Business Machines Corporation Post-oxidation anneal of silicon dioxide
US4775642A (en) * 1987-02-02 1988-10-04 Motorola, Inc. Modified source/drain implants in a double-poly non-volatile memory process

Also Published As

Publication number Publication date
DE68917006D1 (de) 1994-09-01
EP0339852A2 (en) 1989-11-02
JPH0212971A (ja) 1990-01-17
EP0339852B1 (en) 1994-07-27
JP2911476B2 (ja) 1999-06-23
EP0339852A3 (en) 1991-01-09
DE68917006T2 (de) 1995-01-19
US4894353A (en) 1990-01-16
ATE109307T1 (de) 1994-08-15

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