EP3963629A4 - THREE-DIMENSIONAL STORAGE DEVICES WITH CRITICAL DIMENSION OF AN EXTENDED CONNECTION AND METHOD OF PRODUCTION THEREOF - Google Patents
THREE-DIMENSIONAL STORAGE DEVICES WITH CRITICAL DIMENSION OF AN EXTENDED CONNECTION AND METHOD OF PRODUCTION THEREOF Download PDFInfo
- Publication number
- EP3963629A4 EP3963629A4 EP20915063.0A EP20915063A EP3963629A4 EP 3963629 A4 EP3963629 A4 EP 3963629A4 EP 20915063 A EP20915063 A EP 20915063A EP 3963629 A4 EP3963629 A4 EP 3963629A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- methods
- forming
- same
- memory devices
- critical dimension
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
- H01L21/02323—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen
- H01L21/02326—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen into a nitride layer, e.g. changing SiN to SiON
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02343—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a liquid
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2020/073359 WO2021146878A1 (en) | 2020-01-21 | 2020-01-21 | Three-dimensional memory devices with enlarged joint critical dimension and methods for forming the same |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3963629A1 EP3963629A1 (en) | 2022-03-09 |
EP3963629A4 true EP3963629A4 (en) | 2022-12-21 |
Family
ID=70953415
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP20915063.0A Pending EP3963629A4 (en) | 2020-01-21 | 2020-01-21 | THREE-DIMENSIONAL STORAGE DEVICES WITH CRITICAL DIMENSION OF AN EXTENDED CONNECTION AND METHOD OF PRODUCTION THEREOF |
Country Status (7)
Country | Link |
---|---|
US (1) | US11205661B2 (ja) |
EP (1) | EP3963629A4 (ja) |
JP (1) | JP7328369B2 (ja) |
KR (1) | KR102673608B1 (ja) |
CN (2) | CN111263980B (ja) |
TW (1) | TWI751509B (ja) |
WO (1) | WO2021146878A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112567518B (zh) | 2020-11-10 | 2024-04-09 | 长江存储科技有限责任公司 | 具有在三维存储器器件中的突出部分的沟道结构和用于形成其的方法 |
WO2022099463A1 (en) | 2020-11-10 | 2022-05-19 | Yangtze Memory Technologies Co., Ltd. | Channel structures having protruding portions in three-dimensional memory device and method for forming the same |
Citations (5)
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US9570463B1 (en) * | 2015-10-15 | 2017-02-14 | Sandisk Technologies Llc | Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same |
US9881929B1 (en) * | 2016-10-27 | 2018-01-30 | Sandisk Technologies Llc | Multi-tier memory stack structure containing non-overlapping support pillar structures and method of making thereof |
US20180331117A1 (en) * | 2017-05-12 | 2018-11-15 | Sandisk Technologies Llc | Multilevel memory stack structure with tapered inter-tier joint region and methods of making thereof |
WO2019055073A1 (en) * | 2017-09-14 | 2019-03-21 | Sandisk Technologies Llc | THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ANNULAR ENGRAVING STOP SPACER AND METHOD FOR MANUFACTURING THE SAME |
US20190139973A1 (en) * | 2017-11-06 | 2019-05-09 | Sandisk Technologies Llc | Three-dimensional memory device with annular blocking dielectrics and method of making thereof |
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KR101551901B1 (ko) * | 2008-12-31 | 2015-09-09 | 삼성전자주식회사 | 반도체 기억 소자 및 그 형성 방법 |
US20100314678A1 (en) * | 2009-06-12 | 2010-12-16 | Se-Yun Lim | Non-volatile memory device and method for fabricating the same |
JP2013543266A (ja) * | 2010-10-18 | 2013-11-28 | アイメック | 縦型半導体メモリデバイス及びその製造方法 |
US8946808B2 (en) * | 2012-02-09 | 2015-02-03 | SK Hynix Inc. | Semiconductor device and method of manufacturing the same |
KR102018614B1 (ko) * | 2012-09-26 | 2019-09-05 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
WO2014089795A1 (zh) * | 2012-12-13 | 2014-06-19 | 中国科学院微电子研究所 | 一种垂直沟道型三维半导体存储器件及其制备方法 |
US9786678B2 (en) * | 2014-09-11 | 2017-10-10 | Toshiba Memory Corporation | Nonvolatile semiconductor memory device and method of manufacturing the same |
US9666590B2 (en) * | 2014-09-24 | 2017-05-30 | Sandisk Technologies Llc | High stack 3D memory and method of making |
US9236396B1 (en) * | 2014-11-12 | 2016-01-12 | Sandisk Technologies Inc. | Three dimensional NAND device and method of making thereof |
CN107548520B (zh) * | 2015-02-24 | 2021-05-25 | 东芝存储器株式会社 | 半导体存储装置及其制造方法 |
KR20170002080A (ko) * | 2015-06-29 | 2017-01-06 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조방법 |
US9991280B2 (en) * | 2016-02-17 | 2018-06-05 | Sandisk Technologies Llc | Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same |
US10115732B2 (en) * | 2016-02-22 | 2018-10-30 | Sandisk Technologies Llc | Three dimensional memory device containing discrete silicon nitride charge storage regions |
US10090318B2 (en) * | 2016-08-05 | 2018-10-02 | Micron Technology, Inc. | Vertical string of memory cells individually comprising a programmable charge storage transistor comprising a control gate and a charge storage structure and method of forming a vertical string of memory cells individually comprising a programmable charge storage transistor comprising a control gate and a charge storage structure |
US10141328B2 (en) * | 2016-12-15 | 2018-11-27 | Macronix International Co., Ltd. | Three dimensional memory device and method for fabricating the same |
CN109935593B (zh) * | 2017-03-08 | 2021-09-28 | 长江存储科技有限责任公司 | 一种3d nand存储器件及其制造方法 |
CN106910746B (zh) * | 2017-03-08 | 2018-06-19 | 长江存储科技有限责任公司 | 一种3d nand存储器件及其制造方法、封装方法 |
US10319635B2 (en) * | 2017-05-25 | 2019-06-11 | Sandisk Technologies Llc | Interconnect structure containing a metal slilicide hydrogen diffusion barrier and method of making thereof |
CN107946306A (zh) * | 2017-11-23 | 2018-04-20 | 长江存储科技有限责任公司 | 三维存储结构制作方法、存储结构、存储器及电子设备 |
US10580782B2 (en) * | 2017-12-28 | 2020-03-03 | Micron Technology, Inc. | Methods of forming an array of elevationally-extending strings of memory cells individually comprising a programmable charge-storage transistor |
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JP2019169554A (ja) * | 2018-03-22 | 2019-10-03 | 東芝メモリ株式会社 | 記憶装置 |
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CN109196643B (zh) * | 2018-06-12 | 2019-11-05 | 长江存储科技有限责任公司 | 存储器件及其形成方法 |
KR20190140773A (ko) * | 2018-06-12 | 2019-12-20 | 삼성전자주식회사 | 반도체 장치 및 반도체 장치의 제조방법 |
WO2020000306A1 (en) * | 2018-06-28 | 2020-01-02 | Yangtze Memory Technologies Co., Ltd. | Staircase structures for three-dimensional memory device double-sided routing |
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CN111244100B (zh) * | 2018-08-16 | 2022-06-14 | 长江存储科技有限责任公司 | 用于形成三维存储器器件中的结构增强型半导体插塞的方法 |
CN109314118B (zh) * | 2018-08-21 | 2019-11-08 | 长江存储科技有限责任公司 | 具有贯穿阵列触点的三维存储器件及其形成方法 |
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CN109496360A (zh) * | 2018-10-09 | 2019-03-19 | 长江存储科技有限责任公司 | 用于减少三维存储器件中的半导体插塞中的缺陷的方法 |
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-
2020
- 2020-01-21 JP JP2021576669A patent/JP7328369B2/ja active Active
- 2020-01-21 KR KR1020217042227A patent/KR102673608B1/ko active IP Right Grant
- 2020-01-21 CN CN202080000169.0A patent/CN111263980B/zh active Active
- 2020-01-21 EP EP20915063.0A patent/EP3963629A4/en active Pending
- 2020-01-21 WO PCT/CN2020/073359 patent/WO2021146878A1/en unknown
- 2020-01-21 CN CN202110879743.0A patent/CN113594173B/zh active Active
- 2020-03-17 TW TW109108717A patent/TWI751509B/zh active
- 2020-04-28 US US16/860,890 patent/US11205661B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9570463B1 (en) * | 2015-10-15 | 2017-02-14 | Sandisk Technologies Llc | Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same |
US9881929B1 (en) * | 2016-10-27 | 2018-01-30 | Sandisk Technologies Llc | Multi-tier memory stack structure containing non-overlapping support pillar structures and method of making thereof |
US20180331117A1 (en) * | 2017-05-12 | 2018-11-15 | Sandisk Technologies Llc | Multilevel memory stack structure with tapered inter-tier joint region and methods of making thereof |
WO2019055073A1 (en) * | 2017-09-14 | 2019-03-21 | Sandisk Technologies Llc | THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ANNULAR ENGRAVING STOP SPACER AND METHOD FOR MANUFACTURING THE SAME |
US20190139973A1 (en) * | 2017-11-06 | 2019-05-09 | Sandisk Technologies Llc | Three-dimensional memory device with annular blocking dielectrics and method of making thereof |
Also Published As
Publication number | Publication date |
---|---|
EP3963629A1 (en) | 2022-03-09 |
WO2021146878A1 (en) | 2021-07-29 |
CN111263980A (zh) | 2020-06-09 |
JP2022539339A (ja) | 2022-09-08 |
US11205661B2 (en) | 2021-12-21 |
KR102673608B1 (ko) | 2024-06-07 |
CN113594173B (zh) | 2023-12-12 |
JP7328369B2 (ja) | 2023-08-16 |
US20210225861A1 (en) | 2021-07-22 |
CN111263980B (zh) | 2021-08-03 |
TWI751509B (zh) | 2022-01-01 |
CN113594173A (zh) | 2021-11-02 |
KR20220012330A (ko) | 2022-02-03 |
TW202129931A (zh) | 2021-08-01 |
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