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Definitions

• the invention relates to a method for producing a semiconductor material heterostructure having a wurtzite crystal structure, such a heterostructure and the manufacture of electronic or optoelectronic devices from such a heterostructure.
• the electronic and optoelectronic devices based on these materials generally comprise a heterostructure formed by so-called "active" layers deposited by epitaxy techniques on a monocrystalline substrate.
• Sapphire is currently the most commonly used material for the production of substrates on which layers of materials III-N will be deposited, in particular because of its high availability, its window of transparency in the visible and its stability at high temperature. (> 1500 ° C).
• the sapphire makes it possible to obtain active layers without deformation or in compressive stress, which can thus reach significant thicknesses (several tens of micrometers) without cracking.
• this material also has very harmful disadvantages: it is insulating, which prevents the manufacture of devices with a vertical structure, and its low thermal conductivity limits the permissible power density of the devices obtained.
• the sapphire has a crystalline structure (rhombohedral) different from that of materials III-N (wurtzite) and a high mesh size mismatch.
• This generates crystalline defects in the structures (stacking faults, dislocations, inversions of domains of different polarity %), which makes it impossible to obtain active layers of good structural quality according to certain orientations (non and semi polar) without resorting to complex technological processes, ie with several steps in the process (masking, surface preparation, resumption of growth, ).
• Silicon carbide has, itself, a mesh parameter close to that of many materials III-N, can be intentionally doped to allow the realization of vertical structures and its thermal conductivity is high.
• SiC Silicon carbide
• its industrial development is constrained by its very high cost compared to sapphire.
• Si Silicon
• Si is favored by its compatibility with the production lines of the microelectronics industry.
• its crystalline structure is of the "diamond” type, and not “wurtzite", which prevents obtaining active layers of good structural quality with certain orientations.
• the thermal expansion coefficient disagreement with the active layers is very important and can cause extensive stress in the latter and lead to the appearance of cracks. Growth on Si then requires the use of complex and expensive manufacturing processes to compensate for the extensive constraint by compressive stress.
• ZnO zinc oxide
• Wurtzite the wideband forbidden semiconductor materials that we want to deposit, close mesh parameters
• a small difference in the coefficients of thermal expansion with these materials a relatively high thermal conductivity and can be intentionally doped.
• a crystal structure of wurtzite type comprises two types of atoms; each of these two types of atoms forms a sub-network of the type hep (of the English “hexagonal close-packed", for “compact hexagonal stacking").
• the wurtzite structure is non-centrosymmetric, and therefore often associated with piezoelectric and / or pyroelectric properties.
• Figures 1A, 1B and 1C schematically illustrate Wurtzite structure and some of its growth plans.
• Planars "c”, (0001) and (000-1) are called polar; planes “a” (1 1 -20) and “m” (1 -100) are called non-polar; other planes having an angle with the plane c different from 0 ° and 90 ° are called semi-polar (for example the planes (1 1 -22) and (10-12)).
• F in t can reach several hundred or even thousands of kV / cm.
• the optoelectronic properties of the heterostructures are strongly dependent on this field which has harmful consequences on the functioning of the components: for example, in the case of LEDs and laser diodes (LDs), it leads to a reduction of the electron-hole pair recombinations and thus of the radiative efficiency in the quantum wells as well as an offset of the radiative transitions towards the long wavelengths.
• this field strongly modifies the band structure and the position of the energy levels in the heterostructures and therefore requires complex band engineering during device realization.
• LEDs and LDs emitting in the visible at long wavelengths (> 500 nm) and in the ultraviolet at short wavelengths ( ⁇ 350 nm) as well as for inter-subband devices (tunneling diodes, electro-optical modulators, photodetectors, quantum cascade components, etc.), it is desirable to suppress this polarization.
• orientations different from the orientation (0001) for example the non-polar or semi-polar orientations described above with reference to FIGS.
• active layers of polar or semi-polar orientation deposited on a sapphire, SiC or Si substrate generally have very high defect densities, unless complex and therefore expensive manufacturing processes are used. .
• the document WO 2015/177220 proposes to reduce the crystalline defects appearing during the epitaxy of the nitride of element III, by producing this epitaxy on the inclined flanks of the grooves which structure the surface of the zinc oxide substrate. However, this does not allow to maintain the same plane of orientation between the substrate and the element III nitride.
• FR 3031834 propose to reduce these crystalline defects by using a buffer layer comprising aluminum nitride between the substrate and gallium nitride. Nevertheless, the mesh parameters of aluminum nitride and zinc oxide are different, which degrades the crystalline quality of the whole. It is therefore necessary to deposit a sufficiently thick layer of gallium nitride to compensate for this degradation.
• US 2010/01 17070 discloses a light emitting device comprising semiconductor materials. This device is produced on a zinc oxide substrate on which a structured reflective layer is deposited. This structured layer is intended to improve the extraction of light inside the device. The characteristic dimensions of the structuring are therefore dependent on the desired refractive indices and the emission wavelengths of the device.
• the aim of the invention is to improve the structural, electronic and optoelectronic properties of heterostructures in semiconductor materials, in particular with a wide band gap, having a structure crystalline wurtzite type made on ZnO substrate, with a polar orientation, non-polar or semi-polar.
• the inventors have realized that this constraint induces a mechanism of plastic relaxation of the stressed epitaxial layer, which can occur according to various processes such as cracking, the generation of interface dislocations, .... This results in defects that degrade the electrical and / or optoelectronic properties of the heterostructure.
• the invention makes it possible to avoid this degradation.
• this object is achieved by a three-dimensional structuration in "mesas" of the surface of the ZnO substrate, having a flat surface, which allows the elastic relaxation of the stress in the active layers, thanks to the presence of edges free.
• the mesas have lateral dimensions - or at least one lateral dimension - that can reach a few hundred micrometers, or even a millimeter, and each mesa can correspond to an electronic or optoelectronic device made from the heterostructure. They also have a flat upper surface parallel to the surface of the substrate, and vertical side surfaces or inclined relative thereto.
• An object of the invention is therefore a method of manufacturing a heterostructure of semiconductor materials having a wurtzite crystal structure, comprising the following steps:
• Said mesas may have a smaller lateral dimension of between 10 and 1000 ⁇ and a height greater than or equal to 100 nm.
• Said structuring step can be implemented by chemical etching.
• the method may also comprise a step of thermal treatment of the structured surface of said substrate by annealing under an oxygen stream at a temperature greater than or equal to 600 ° C., implemented before said epitaxial deposition step of at least one layer semiconductor material having a crystal structure wurtzite type.
• Said epitaxial deposition step of at least one layer of semiconductor material having a wurtzite crystal structure can be implemented by molecular beam epitaxy.
• the method may also comprise a step of depositing a protective thin layer on at least one surface of said substrate other than the structured surface, implemented before said step of epitaxially deposition of at least one layer of semiconductor material having a crystal structure of wurtzite type.
• the structured surface may have a non-polar or semi-polar orientation.
• Said or each said semiconductor material layer having a wurtzite crystal structure may comprise at least one material chosen from a binary nitride, a binary oxide, a Zn (Mg, Cd) O alloy and an Al (Ga, In) N alloy. .
• Another object of the invention is a method of manufacturing at least one electronic or optoelectronic device comprising:
• Yet another object of the invention is a heterostructure comprising at least one layer of semiconductor material having a wurtzite crystal structure deposited over a surface of a zinc oxide monocrystalline substrate, characterized in that that said surface is structured in mesas.
• Said mesas may have a smaller lateral dimension of between 10 and 1000 ⁇ and a height greater than or equal to 100 nm.
• the structured surface of said substrate may have a non-polar or semi-polar orientation.
• Said or each said semiconductor material layer having a wurtzite crystal structure may comprise at least one material chosen from a binary nitride, a binary oxide, a Zn (Mg, Cd) O alloy and an Al (Ga, In) N alloy. .
• Figures 1A, 1B and 1C already described, represent the wurtzite type structure and some of its crystalline planes;
• FIGS. 2A and 2B illustrate the formation of cracks during the epitaxial growth of GaN layers on a ZnO substrate
• FIGS. 3A-3E represent different steps of a method according to one embodiment of the invention.
• Figure 4 shows electron microscopy images of a surface of a ZnO substrate structured in accordance with one embodiment of the invention
• FIGS. 5A and 5B show the effect of a heat treatment step of a method according to one embodiment of the invention
• FIGS. 6A and 6B show electron microscopy images of a GaN layer epitaxially grown on a surface of a structured ZnO substrate according to one embodiment of the invention.
• FIG. 2A is an image of a layer 1, 1 ⁇ thick of GaN epitaxially grown on a plane ZnO substrate c (orientation (0001), polar). Cracks oriented mainly along ⁇ 1 1 -20> directions can be observed. As explained above, these cracks are caused by the voltage stresses induced by the positive parametric mismatch between the ZnO substrate and the epitaxial layer. in GaN. More generally, this effect is observed in alloys (AI, Ga) N and (Zn, Mg) 0.
• FIG. 2B is a graph of crack density versus layer thickness. It can be seen that the critical thickness is of the order of 300 nm for the GaN / ZnO system, and that the crack density increases with the thickness of GaN, beyond this value. The consequence of these mechanisms of relaxation of the stress is that, in the case of LED structures for example, whose thickness is typically between 2 and 5 ⁇ , very high crack densities are observed.
• FIGS. 3A-3E illustrate the various steps of a method according to one embodiment of the invention, making it possible to prevent the appearance of these cracks.
• FIG. 3A shows a planar S substrate made of ZnO having an SD surface on which layers of wurtzite-type semiconductor materials must be epitaxially grown.
• the orientation of this SD surface may be polar, semi-polar or non-polar.
• the first step of the process consists of a structuring of the surface SD by three-dimensional patterns M in the form of mesas. These patterns will generate an elastic relaxation of the epitaxial layers which avoids the plastic relaxation of the stress in the active layers. This elastic relaxation is made possible thanks to the possibility of relaxation of the layers on the edge of the mesas M.
• the structuring of the ZnO can be carried out by wet etching or by dry process or by a combination of the two methods.
• An advantage of ZnO is the possibility of being able to use simple wet etching processes, usually with a strongly diluted acidic solution.
• ZnO can be efficiently etched in solutions such as highly diluted HNO 3 / HCl, HF / HNO 3 and also in non-acidic solutions such as acetyl acetone. See for example the article by J. Pearton, JJ Chen, WT Lim, F. Ren and DP Norton, "Wet Chemical Etching of Wide-Bandgap Semiconductors-GaN, ZnO and SiC", ECS Transactions, 6 (2) 501-512. (2007).
• Patterns are defined by a mask, typically a photoresist or metal, which is removed after the etching step. They can be square, circular, rectangular or diamond-shaped or elongated strips in one of the plane directions. Their lateral dimensions can vary from 100 nanometers to a few centimeters in the case of elongated strips; however, for stress relaxation to be effective it is necessary that the smallest lateral dimension does not exceed a few hundred micrometers, even a few millimeters. The use of patterns smaller than a few micrometers is possible, but hardly compatible with the manufacture of electronic or optoelectronic components. Thus, preferably, the patterns will have a smaller lateral dimension of between 10 and 1000 ⁇ .
• the engraving depth (and therefore the height of the mesas) must be greater than the thickness of the active layers. Typically, it can vary from 100 nm to several tens of micrometers.
• FIG. 4 shows optical microscope images of the surface of a ZnO substrate (plane c) structured by square mesas of a few hundred ⁇ of side (460 ⁇ for the left image and 315 ⁇ for the left image). right image) and a few micrometers high, obtained by wet etching using a solution of H 3 PO 4 strongly diluted in water, with a ratio 2 (H 3 PO 4 ) / 100 (H 2 O), in order to limit lateral etching.
• the surface of the substrate is subjected to a preparation operation by heat treatment at a temperature at least equal to 600 ° C. (or even 800 ° C.) and under an oxygen flow FO (FIG. 3C).
• This heat treatment can be preceded by a cleaning of the surface by the use of an oxygen-based plasma.
• atomic steps are obtained on the surface of the patterns.
• FIGS. 5A and 5B are images obtained by atomic force microscopy of the surface of a ZnO substrate (plane c) before (5A) and after (5B) a heat treatment by annealing at a temperature of 1000 ° C. for 2 minutes under a flow of oxygen.
• the surface Before the treatment, the surface is not smooth at the atomic scale, is scratched and retains polishing residues (silica particles, one of which has been highlighted by surrounding it with a circle). After the treatment, these scratches and contaminations disappear and we can clearly observe atomic steps.
• a deposition of a thin layer CP (FIG. 3D). These surfaces comprise the rear face and the lateral faces of the ZnO substrate.
• This thin layer may be an oxide (for example SiO 2 ) or a refractory nitride (for example Si 3 N 4 ).
• This deposition is carried out, for example by sputtering, before the growth of the active layers. It allows the use of epitaxial growth techniques such as organometallic vapor phase epitaxy (EPVOM, also known by the acronym MOCVD, for "Metalorganic Chemical Vapor Deposition") and hydride vapor phase epitaxy ( EPVH).
• EPVOM organometallic vapor phase epitaxy
• MOCVD Metalorganic Chemical Vapor Deposition
• EPVH hydride vapor phase epitaxy
• FIG. 3E illustrates, very schematically, the structure obtained after epitaxial deposition, directly on the structured surface of the substrate, of one or more active layers CA. More precisely, these layers are deposited directly - without the interposition of a buffer layer of a different material - on the flat upper surfaces of the mesas (unlike the document FR3031834 where it is necessary to insert a buffer layer of AlN before the epitaxy of active layers CA); they therefore have the same crystalline orientation as the ZnO substrate.
• discontinuous layers have free edges, in correspondence of the edges of the mesas M of the substrate, which allows the relaxation of the stresses.
• the active layers are also deposited in the grooves separating the mesas; these portions of the active layers are however not used.
• the deposition of the active layers can be carried out by techniques such as EPVOM or EPVH. According to a preferred embodiment of the invention, however, it is rather used molecular beam epitaxy (MBE, or MBE of the English "Molecular Beam Epitaxy").
• MBE molecular beam epitaxy
• This growth technique is advantageous because it allows the growth of nitride materials at much lower temperatures (300 to 400 ° C lower) than those used by EPVOM, which reduces the risk of thermal decomposition of ZnO.
• N 2 instead of ammonia (NH 3 ) as a nitrogen source using an RF plasma cell, which is not possible with the use of EPVOM as a technique. growth.
• ZnO is very reactive with respect to ammonia.
• this growth technique also allows the growth of ZnO / (Zn, Mg) O structures with the lowest residual dopings.
• FIGS. 6A and 6B show optical microscopy images of the structures obtained for two different crystallographic orientations: plane c (0001) - 6A - and plane m (1 -100) - 6B.
• the thickness of the active layer is 0.7 ⁇ and 0.6 ⁇ , respectively. In both cases, the absence of cracks is confirmed, although the deposited thickness is much greater than the critical cracking thickness (see Figure 2B).
• FIG. 7A shows an electroluminescence spectrum obtained at ambient temperature for such a polar LED with active layers - oriented (0001) or (000-1) - based on GaN - more precisely, it is a question of a quantum well LED (In, Ga) N / GaN - 400 ⁇ side and an injection current of 20 mA.
• the spectrum of Figure 7A is dominated by a peak emitting in the blue around 455 nm. This blue emission originates from the recombination of the carriers in the quantum wells (In, Ga) N / GaN, confirming that the fabrication of monolithic structures of GaN-based LEDs on structured ZnO substrates has been successfully carried out.
• Fig. 7B is a graph of LED output optical power as a function of injection current; the gray curve corresponds to the devices according to the invention, the black curve to those made on unstructured substrate.
• the invention makes it possible to obtain a strong improvement in the optical power, by at least a factor of 2 at 20 mA (from 40 to 80 ⁇ ⁇ ⁇ ) and 80 mA (from 105 to 220 ⁇ ⁇ ⁇ ) .
• the applications of the invention mainly concern the manufacture of micro- and optoelectronic components, and more particularly LEDs, lasers, high electron mobility or power transistors, quantum well photodetectors in the near and far infrared. (called QWIP), but also quantum cascading components (lasers and detectors) that require very large active layer thicknesses.
• QWIP quantum well photodetectors in the near and far infrared.
• the invention makes it possible to take advantage of the very high etching selectivity of ZnO with respect to the active layers to enable the production of microstructures (membranes, micro-disks, etc.) suitable for the manufacture of microcomponents for electronics. and photonics.
• microstructures membranes, micro-disks, etc.
• photonics For example, it is possible to manufacture a suspended structure formed by a GaN layer previously epitaxially grown on a ZnO substrate, and then chemically etched with an acidic solution (for example H 3 PO 4 ) strongly diluted in water.
• an acidic solution for example H 3 PO 4
• photonic crystals or metal / metal guides by selectively removing the substrate followed by a transfer to another substrate.

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