EP3241245A1 - Dispositif optoélectronique a diodes électroluminescentes - Google Patents

Dispositif optoélectronique a diodes électroluminescentes

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Publication number
EP3241245A1
EP3241245A1 EP15823720.6A EP15823720A EP3241245A1 EP 3241245 A1 EP3241245 A1 EP 3241245A1 EP 15823720 A EP15823720 A EP 15823720A EP 3241245 A1 EP3241245 A1 EP 3241245A1
Authority
EP
European Patent Office
Prior art keywords
optoelectronic device
face
light
substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP15823720.6A
Other languages
German (de)
English (en)
French (fr)
Inventor
Xavier Hugon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Aledia
Original Assignee
Aledia
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aledia filed Critical Aledia
Publication of EP3241245A1 publication Critical patent/EP3241245A1/fr
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336Illuminating devices
    • G02F1/133602Direct backlight
    • G02F1/133603Direct backlight with LEDs
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
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Definitions

  • the present application relates to an opto ⁇ electronic device emitting diodes, in particular LEDs in inorganic materials, for example a display screen or an image projection device.
  • optoelectronic devices in particular display screens or projection devices, comprising light-emitting diodes based on semiconductor materials, comprising a stack of semiconductor layers predominantly comprising at least one group III element and a group V element.
  • III-V compound in particular gallium nitride (GaN), gallium indium nitride (GalnN) and gallium aluminum nitride (GaAIN).
  • a pixel of an image corresponds to the unitary element of the image displayed by a display screen or projected by a projection device.
  • the optoelectronic device is a monochrome image display screen or a monochrome image projection device, it generally comprises only one light source for displaying each pixel of the image.
  • the optoelectronic device is a color image display screen or a color image projection device, it generally comprises for the display of each image pixel at least three emission and / or regulation components luminous intensity, also called sub-display pixels, which each emit light radiation substantially in a single color (for example, red, green and blue). The superposition of the radiation emitted by these three sub-display pixels provides the observer with the color sensation corresponding to the pixel of the displayed image.
  • the display pixel of the display screen or the projection device the assembly formed by the three display sub-pixels used for the display of an image pixel.
  • FIG. 1 represents an example of an optoelectronic device 10 with inorganic light-emitting diodes, such as a display screen or a projection device.
  • the optoelectronic device 10 successively comprises from bottom to top in FIG. 1:
  • lower electrodes 14 corresponding for example to parallel conductive strips
  • inorganic light-emitting diodes 16 resting on the lower electrodes 14 and separated from each other by insulating portions 18;
  • a transparent protective layer 22 covering the entire structure.
  • Phosphor layers and / or color filters may be provided on the protective layer 22.
  • Each inorganic light-emitting diode 16 comprises a stack of semiconductor portions comprising successively from bottom to top in FIG. a semiconductor portion 24 doped with a first type of conductivity, for example N type, in contact with one of the electrodes 14;
  • an active zone 26 that is to say the zone of the light-emitting diode emitting the majority of the light radiation provided by the light-emitting diode in operation, corresponding to a monolayer or multilayer structure comprising, for example, an undoped semiconductor portion, a single quantum well or multiple quantum wells; and a doped semiconductor portion 28 of a second conductivity type, opposite the first type of conductivity, for example of the P type, in contact with one of the electrodes 20.
  • Each display subpixel P of the optoelectronic device 10 comprises a light-emitting diode 16, an insulating portion 18 surrounding the light-emitting diode 16 and portions of one of the electrodes 14 and one of the electrodes 20 in contact with the diode
  • the area occupied by each display subpixel P may correspond to a square whose side is between 100 p and 1 mm.
  • FIGS. 2A to 2C show the structures obtained at successive stages of an exemplary method of manufacturing the optoelectronic device 10.
  • FIG. 2A shows the structure obtained after having formed the lower electrodes 14 on the support 12 and after having deposited on the whole of the structure a stack 30 of successive semiconductor layers 32, 34, 36.
  • FIG. 2B shows the structure obtained after etching apertures 38 in stack 30 to delimit the semiconductor portions 24, 26, 28 for each light-emitting diode 16.
  • FIG. 2C represents the structure obtained after having formed the insulating portions 18 in the openings 38 between the 16. This can be achieved by depositing an insulating layer on the entire structure shown in FIG. 2B, this insulating layer covering the light-emitting diodes 16 and filling the openings 38 and etching the insulating layer until reaching the portions 28. electroluminescent diodes 16.
  • the maximum light intensity that can be emitted by each display subpixel P depends on the area occupied by the light-emitting diode 16 relative to the surface of the display subpixel P and can not be greater than the total area subpixel display.
  • the minimum distance between two adjacent LEDs 16 is imposed by the method of etching the layers 32, 34, 36 and the method of forming the insulating portions 18 and is generally greater than 3 ⁇ m, or even 5 ⁇ m. This reduces the maximum area that can be occupied by each light-emitting diode 16.
  • the lower electrodes 14 may be made by a continuous electrode layer.
  • the electrode layer 14 has the drawbacks of being resistive and of conducting light.
  • the resistivity of the lower electrode layer 14 strongly limits the maximum size of the optoelectronic device because the voltage drop between the edge and the center can quickly exceed the correction capabilities of the electronic control system.
  • the conduction of the light has the effect of reinjecting a portion of the light emitted by a sub-pixel in the neighboring sub-pixels strongly limiting the contrast and color saturation of the optoelectronic device.
  • the lower electrodes 14 are made by separate bands, the necessary distance between sub-pixels is even greater.
  • Another disadvantage of the manufacturing method described above is that the etching steps of the layers 32, 34, 36 can cause a deterioration of the lateral flanks of the active zone 26 of each light-emitting diode 16 and disturb the light radiation emitted by the active zone 26 so that he It is difficult to produce sub-pixels smaller than 15 ⁇ m by 15 ⁇ m and of good quality.
  • An object of an embodiment is to overcome all or part of the disadvantages of inorganic light emitting diode optoelectronic devices described above, including display screens or projection devices.
  • Another object of an embodiment is to increase the maximum light intensity that can be provided by each display subpixel.
  • Another object of an embodiment is that the manufacturing method of the light-emitting diodes does not include a step of etching the active layers of the light-emitting diodes.
  • an embodiment provides an optoelectronic device comprising a substrate comprising opposite first and second faces, lateral electrical insulation elements extending from the first face to the second face and delimiting in the support of the first semiconductor or conductive portions. electrically insulated from each other, the optoelectronic device further comprising, for each first portion, a first conductive pad on the second face in contact with the first portion and a light emitting diode or a set of light-emitting diodes resting on the first face and electrically connected to the first portion, the optoelectronic device further comprising a conductive and at least partially transparent electrode layer covering all the light emitting diodes, an insulative and at least partially transparent encapsulating layer covering the layer. electrode, and at least one second conductive pad electrically connected to the electrode layer.
  • each diode electro ⁇ phosphor comprises at least one wire semiconductor element, conical or frustoconical, incorporating or coated at the top and / or at least over a part of its side faces by a cover, comprising at least one active layer adapted to provide the majority of the radiation of the light-emitting diode.
  • the opto electronic ⁇ further comprises a conductive layer overlying the electrode layer around the light emitting diodes of each set.
  • the lateral electrical insulation elements comprise at least one insulating wall extending in the substrate from the first face to the second face.
  • the lateral electrical insulation elements delimit, in addition, in the support, a second semiconductor or conductive portion electrically insulated from the first semiconductor or conductive portions and electrically connected to the electrode layer.
  • the second conductive pad is in electrical contact with the second semiconductive or conductive portion on the side of the second face.
  • the second conductive pad is located on the side of the first face.
  • the substrate is silicon, germanium, silicon carbide, a compound III-V, such as GaN or GaAs, or ZnO.
  • the substrate is made of monocrystalline silicon and comprises a dopant concentration of between 5 10 atoms / cm 2 and 2 10 10 atoms / cm 2.
  • each semiconductor element is orally in a compound III-V, in particular gallium nitride, or in a compound II-VI.
  • the optoelectronic device comprises lenses on the encapsulation layer.
  • the optoelectronic device is a display screen or a projection device.
  • One embodiment also relates to a method of manufacturing an optoelectronic device comprising the following steps:
  • step a) comprises the following steps:
  • step b) before step b), forming, in the substrate, lateral electrical insulation elements extending from the first face over a portion of the depth of the substrate; and after step c), thinning the substrate to form the second face and exposing the lateral electrical insulators on the second face.
  • the method further comprises the deposition of phosphor on at least some light-emitting diodes, in particular by techniques of photolithography or printing ⁇ graphy.
  • each light emitting diode comprises at least one semiconductor element wire, conical or frustoconical, incorporating or covered at the top and / or at least on a portion of its lateral faces by a shell comprising at least one active layer adapted to provide the majority of the radiation of the light emitting diode.
  • FIG. 1, previously described, is a sectional, partial and diagrammatic view of an example of an optoelectronic device with inorganic light-emitting diodes;
  • FIGS. 2A to 2C previously described, are sectional, partial and schematic views of structures obtained at successive stages of an exemplary method of manufacturing the optoelectronic device of FIG. 1;
  • FIGS. 3A, 3B and 3C are respectively a top view, a front view with section and a view from below, partial and schematic, of an embodiment of an optoelectronic device with light-emitting diodes;
  • FIGS. 4A to 4C are respectively a top view, a front view with section and a bottom view, partial and schematic, of another embodiment of an optoelectronic device with light-emitting diodes; and FIGS. 5A and 5B are respectively a top view and a sectional front view, partial and schematic, of another embodiment of an optoelectronic light-emitting diode device.
  • the embodiments described hereinafter relate to optoelectronic devices, in particular of affi ⁇ drying screens or projection devices, including light emitting diodes formed from three dimensional semiconductor elements, for example micro-wires, nanowires, elements conical or frustoconical elements.
  • three dimensional semiconductor elements for example micro-wires, nanowires, elements conical or frustoconical elements.
  • embodiments are described for light-emitting diodes formed from microfilts or nanowires.
  • these embodiments can be implemented for three-dimensional elements other than microwires or nanowires, for example three-dimensional pyramid-shaped elements.
  • embodiments are described for light emitting diodes each comprising a shell which at least partially surrounds the microfil or nanowire. However, these embodiments may be implemented for light-emitting diodes for which the active area is located in the height or at the top of the microfilament or nanowire.
  • microfil or "nanowire” denotes a three-dimensional structure of elongated shape in a preferred direction, of which at least two dimensions, called minor dimensions, are between 5 nm and 2.5 ⁇ m, preferably between 50 nm and 2.5 ⁇ m. um, the third dimension, called major dimension, being at least equal to 1 time, preferably at least 5 times and even more preferably at least 10 times, the largest of the minor dimensions.
  • the minor dimensions may be less than or equal to about 1 ⁇ m, preferably between 100 nm and 1 ⁇ m, more preferably between 100 nm and 300 nm.
  • the height of each microfil or nanowire may be greater than or equal to 500 nm, preferably between 1 ⁇ m and 50 ⁇ m.
  • the term “wire” is used to mean “microfil or nanowire”.
  • the average line of the wire which passes through the barycenters of the straight sections, in planes perpendicular to the preferred direction of the wire is substantially rectilinear and is hereinafter called “axis" of the wire.
  • an optoelectronic device in particular a display screen or a projection device, comprising an integrated circuit comprising a substrate, for example a conductive or semiconductor substrate, divided into electrically isolated portions of the substrate. others and comprising, for each display subpixel, sets of light-emitting diodes formed on the front face of the substrate.
  • Each set of light-emitting diodes comprises a light-emitting diode or a plurality of light-emitting diodes connected in parallel.
  • By connecting light-emitting diodes in parallel it is meant that the anodes of the light-emitting diodes are connected together and that the cathodes of the light-emitting diodes are connected together.
  • Each set of elementary light-emitting diodes is equivalent to a global light-emitting diode comprising an anode and a cathode.
  • FIGS. 3A to 3C show an embodiment of an optoelectronic device 40, in particular a display screen or a projection device, comprising:
  • a conductive or semiconductor substrate 42 comprising a lower face 44 and an opposite upper face 46, the upper face 46 preferably being flat at least at the level of the light-emitting diode assemblies;
  • electrical isolation elements 48 which extend in the substrate 42 between the faces 44 and 46 and which divide the substrate 42 into conductive or semiconducting portions 50; conductive pads 52 in contact with the lower face 44, each portion 50 being in contact with one of the conductive pads 52;
  • each germination stud 54 being in contact with the face
  • each wire 56 being in contact with one of the seed pads 54, each wire 56 comprising a lower portion 58 in contact with the seed pad 54 and an upper portion 60, extending the lower portion 58;
  • an insulating layer 62 extending on the face 46 of the substrate 42 and extending on the lateral flanks of the lower portion 58 of each wire 56;
  • a shell 64 comprising a stack of semiconductor layers covering the upper portion 60 of each wire 56;
  • a conductive and at least partially transparent layer 66 forming an electrode covering each shell 64, and extending on the insulating layer 62 between the wires 56;
  • a conductive layer 68 covering the electrode layer 66 between the wires 56 but not extending on the wires 56, the conductive layer 68 being, in addition, in contact with one of the semiconductor portions 50 through an opening
  • a transparent encapsulation layer 70 covering the entire structure.
  • the optoelectronic device 40 may, in addition, comprise a phosphor layer, not shown, and / or colored filters, not shown, in the encapsulation layer.
  • luminophores are distributed among the wires 56.
  • Each wire 56 and the shell 64 associated constitute an elementary light emitting diode.
  • Diodes electro ⁇ elementary luminescent located on the same semiconductor portion 50 form a set D of light emitting diodes.
  • Each set D thus comprises several elementary light-emitting diodes connected in parallel.
  • the number of elementary light-emitting diodes per set D can vary from 1 to several thousand, typically from 25 to 100.
  • the number of elementary light-emitting diodes per set D can vary from one set to another.
  • Each pixel display pixel Pix of the optoelectronic device 40 comprises one of the conductive or semiconducting portions 50 and the set D of light-emitting diodes resting on this portion 50.
  • Figure 3A there is shown schematically the separation between the Pixel subpixels with dashed lines 72.
  • the area occupied by each pixel Pix in a view from above can vary from 3 ⁇ m by 3 ⁇ m to several nm and typically from 10 ⁇ m to 10 ⁇ m. at 100 ⁇ m.
  • Each elemental light-emitting diode is formed of a shell at least partially covering a wire.
  • the developed surface of the active layers of the elementary light-emitting diodes of a set D is greater than the surface of the sub-display pixel comprising this set D.
  • the maximum light intensity that can be provided by the sub-display pixel can therefore be to be greater than that of a display subpixel made with a two-dimensional inorganic light emitting diode technology.
  • the substrate 42 corresponds to a monolithic semiconductor substrate.
  • the semiconductor substrate 42 is, for example, a substrate made of silicon, germanium, or a III-V compound such as GaAs.
  • the substrate 42 is a monocrystalline silicon substrate.
  • the semiconductor substrate 42 is doped so as to lower the electrical resistivity to a resistivity close to that of metals, preferably less than a few mohm.cm.
  • the substrate 42 is preferably a highly doped semiconductor substrate with a dopant concentration of between 5 * 10 ⁇ atoms / cm ⁇ and 2 * 10 ⁇ 0 atoms / cm ⁇ , preferably between 1 * 10 ⁇ atoms / and 2 * 10 ⁇ 0 atoms / cm 2, for example 5 * 10 -3 atoms / cm 2.
  • the substrate 42 has a thickness of between 275 ⁇ m and 1500 ⁇ m, preferably 725 ⁇ m.
  • the substrate 42 has a thickness of between 1 ⁇ m and 100 ⁇ m.
  • examples of P type dopants are boron (B) or indium (In) and examples of N type dopants are phosphorus (P), arsenic ( As), or antimony (Sb).
  • the substrate 42 is N-doped with phosphorus.
  • the face 44 of the silicon substrate 42 may be a face (100).
  • the germination pads 54 are made of a material that promotes the growth of the yarns 56.
  • a treatment can be provided to protect the lateral flanks of the seedlings and the surface of the parts of the substrate that are not covered by the bumps. germination to prevent growth of the yarns on the lateral flanks of the seed pads and on the surface of the parts of the substrate not covered by the seed pads.
  • the treatment may comprise forming a dielectric region on the lateral flanks of the seed pads and extending on and / or in the substrate and connecting, for each pair of pads, one of the pads of the pair to the other stud of the pair, the wires not growing on the dielectric region. Said dielectric region can overflow over the seed pads 54.
  • the seed pads 54 can be replaced by a seed layer covering the face 46 of the substrate 42. A dielectric region can then be formed above of the seed layer to prevent growth of threads in unwanted locations.
  • the material constituting the seed pads 54 may be a transition metal of column IV, V or VI of the periodic table of the elements or a nitride, a carbide or a boride of a transition metal of the column IV, V or VI of the periodic table of elements or a combination of these compounds.
  • the seed pads 54 may be made of aluminum nitride (AIN), boron (B), boron nitride (BN), titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), hafnium (Hf), hafnium nitride (HfN), niobium (Nb), niobium nitride (NbN), zirconium (Zr), zirconium borate (ZrB 2), of zirconium nitride (ZrN), silicon carbide (SiC), nitride and tantalum carbide (TaCN), magnesium nitride in the form Mg x Ny, where x is approximately equal to 3 and y is approximately equal to 2, for example magnesium nitride according to the form 3 ⁇ 4 ⁇ 2 or gallium and magnesium nitride (MgGaN), tungsten (W), tungsten nitride (WN)
  • the insulating layer 62 may be a dielectric material, such as silicon oxide (S1O2) f silicon nitride (Si x N y, where x is approximately equal to 3 and y is equal to about 4, e.g., S13N4) , in silicon oxynitride (SiO x Ny where x may be about 1/2 and y may be about 1, eg S12ON2), aluminum oxide (Al2O3), hafnium oxide (HfC > 2) or diamond.
  • the thickness of the insulating layer 62 is between 5 nm and 800 nm, for example equal to about 30 nm.
  • the wires 56 are at least partly formed from at least one semiconductor material.
  • the semiconductor material may be silicon, germanium, silicon carbide, a III-V compound, a II-VI compound or a combination thereof.
  • the wires 56 may be, at least in part, formed from semiconducting materials, typically having a III-V compound, for example III-N compounds.
  • III-V compounds include gallium (Ga), indium (In) or aluminum (Al).
  • III-N compounds are GaN, AlN, InN, InGaN, AlGaN or AlInGaN.
  • Other group V elements may also be used, for example, phosphorus or arsenic. In general, the elements in compound III-V can be combined with different mole fractions.
  • the wires 56 may be, at least in part, formed from semiconductor materials having a compound II-VI.
  • Group II elements include Group IIA elements, including beryllium (Be) and magnesium (Mg) and Group IIB elements, including zinc (Zn) and cadmium (Cd).
  • Group VI elements include elements of the VIA group, including oxygen (O) and tellurium (Te).
  • compounds II-VI are ZnO, ZnMgO, CdZnO or CdZnMgO. In general, the elements in II-VI can be combined with different mole fractions.
  • the wires 56 may comprise a dopant.
  • the dopant may be chosen from the group comprising a group II P dopant, for example magnesium (Mg), zinc (Zn), cadmium (Cd ) or mercury (Hg), a group IV P-type dopant, for example carbon (C) or a group IV N-type dopant, for example silicon (Si), germanium (Ge), selenium (Se), sulfur (S), terbium (Tb) or tin (Sn).
  • a group II P dopant for example magnesium (Mg), zinc (Zn), cadmium (Cd ) or mercury (Hg)
  • a group IV P-type dopant for example carbon (C) or a group IV N-type dopant, for example silicon (Si), germanium (Ge), selenium (Se), sulfur (S), terbium (Tb) or tin (Sn).
  • the cross section of the yarns 56 may have different shapes, such as, for example, an oval, circular or polygonal shape, in particular triangular, rectangular, square or hexagonal.
  • the wires are represented with a hexagonal cross-section.
  • cross section corresponding, for example, to the diameter of the disk having the same surface as the cross section of the wire.
  • the diameter average of each wire 56 may be between 50 nm and 5 um.
  • the height of each wire 56 may be between 250 nm and 50 ⁇ m.
  • Each wire 56 may have an elongate semiconductor structure along an axis substantially perpendicular to the face 46.
  • Each wire 56 may have a generally cylindrical shape.
  • the axes of two adjacent yarns 56 may be spaced from 0.5 ⁇ m to 10 ⁇ m and preferably from 1.5 ⁇ m to 5 ⁇ m.
  • the wires 56 may be regularly distributed, in particular along a hexagonal network.
  • each wire 56 is preferably composed of the compound III-N, for example doped gallium nitride of the same type as the substrate 42, for example N-type, for example silicon .
  • the lower portion 58 extends over a height which may be between 100 nm and 25 ⁇ m.
  • the upper portion 60 of each wire 56 is at least partially made of a III-N compound, for example GaN.
  • the upper portion 60 may be N-type doped, possibly less strongly doped than the lower portion 58 or not be intentionally doped.
  • the upper portion 60 extends over a height that can be between
  • the shell 64 may comprise a stack of several layers including:
  • the active layer is the layer from which the majority of the radiation provided by the elementary light emitting diode is emitted.
  • the active layer may include means for confining electric charge carriers, such as multiple quantum wells. She is, for example, consisting of an alternation of GaN and InGaN layers having respective thicknesses of 5 to 20 nm (for example 8 nm) and 1 to 15 nm (for example 2.5 nm).
  • the GaN layers may be doped, for example of the N or P type.
  • the active layer may comprise a single layer of InGaN, for example with a thickness greater than 10 nm.
  • the intermediate layer for example doped P-type, may correspond to a semiconductor layer or a stack of semiconductor layers and allows the formation of a PN or PIN junction, the active layer being between the intermediate layer of type P and the N-type upper portion 60 of the PN or PIN junction.
  • the bonding layer may correspond to a semiconductor layer or a stack of semiconductor layers and allows the formation of an ohmic contact between the intermediate layer and the electrode 66.
  • the bonding layer may be doped very thinly. strongly of the type opposite to the lower portion 58 of each wire 56, until degenerate the semiconductor layer or layers, for example doped P type at a concentration greater than or equal to 10 ⁇ 0 atoms / cm- ⁇ .
  • the semiconductor layer stack may comprise an electron blocking layer formed of a ternary alloy, for example gallium aluminum nitride (AlGaN) or indium aluminum nitride (AlInN) in contact with each other. with the active layer and the intermediate layer, to ensure a good distribution of the electric carriers in the active layer.
  • a ternary alloy for example gallium aluminum nitride (AlGaN) or indium aluminum nitride (AlInN) in contact with each other. with the active layer and the intermediate layer, to ensure a good distribution of the electric carriers in the active layer.
  • the electrode 66 is adapted to polarize the active layer of each wire 56 and to let the electromagnetic radiation emitted by the light-emitting diodes.
  • the material forming the electrode 66 may be a transparent and conductive material such as indium tin oxide (ITO), zinc oxide doped with aluminum, gallium or indium, or graphene.
  • ITO indium tin oxide
  • the electrode layer 66 has a thickness of between 5 nm and 200 nm, preferably between 20 nm and 50 nm.
  • the conductive layer 68 preferably corresponds to a metal layer, for example aluminum, copper, gold, ruthenium or silver, or to a stack of metal layers, for example titanium-aluminum, silicon-aluminum, titanium-nickel-silver, copper or zinc.
  • the conductive layer 68 has a thickness of between 20 nm and 1500 nm, preferably between 400 nm and 800 nm.
  • the conductive layer 68 is present only between the son and does not cover the emissive surface thereof.
  • the conductive layer 68 makes it possible to reduce the resistive losses during the flow of the current. It also has a reflector role to send out the rays emitted by the light-emitting diodes in the direction of the substrate.
  • the encapsulation layer 70 is made of at least partially transparent insulating material.
  • the minimum thickness of the encapsulation layer 70 is between 250 nm and 50 ⁇ m so that the encapsulation layer 70 completely covers the electrode layer 66 at the top of the sets D of light emitting diodes.
  • the encapsulation layer 70 may be made of at least partially transparent inorganic material.
  • the inorganic material is chosen from the group comprising silicon oxides of the SiO x type where x is a real number between 1 and 2 or SiOyN z where y and z are real numbers between 0 and 1 and aluminum oxides, for example Al2O3.
  • the encapsulation layer 70 may be made of at least partially transparent organic material.
  • the encapsulation layer 70 is a silicone polymer, an epoxy polymer, an acrylic polymer or a polycarbonate.
  • the electrical insulation elements 48 may comprise trenches extending over the entire thickness of the substrate 42 and filled with an insulating material, for example an oxide, in particular silicon oxide, or an insulating polymer. Alternatively, the walls of each trench 48 are covered with an insulating layer, the remainder of the trench being filled with a semiconductor or conductive material, for example polycrystalline silicon. According to another variant, the electrical insulation elements 48 comprise doped regions of a type of polarity opposite to the substrate 42 and extending over the entire depth of the substrate 42. For example, each trench 48 has a width greater than 1 ⁇ m, which varies in particular from 1 ⁇ m to 10 ⁇ m, for example about 2 ⁇ m.
  • an insulating material for example an oxide, in particular silicon oxide, or an insulating polymer.
  • the walls of each trench 48 are covered with an insulating layer, the remainder of the trench being filled with a semiconductor or conductive material, for example polycrystalline silicon.
  • the electrical insulation elements 48 comprise doped regions of a type of polarity opposite to the substrate
  • the electrical insulation elements 48 comprise pairs of adjacent trenches 48 which delimit the portions 50 of the substrate 42.
  • a single trench 48 may be provided to electrically isolate each portion 50.
  • trenches so fine can be made with a limited depth, between ten micrometers and a hundred micrometers according to the chosen etching and insulation technique. It is therefore advisable to thin the substrate 42 until the electrical insulation elements 48 are flush.
  • a handle made of a rigid material can be fixed temporarily or permanently to the encapsulation layer 70.
  • the handle is made of a material at least partially transparent. It may be glass, especially a borosilicate glass, for example glass known under the name pyrex, or sapphire. After thinning the rear face 44 of the substrate can be treated, and if the gluing is temporary, the handle can be peeled off.
  • Each conductive pad 52 may correspond to a layer or a stack of layers covering the face 44.
  • an insulating layer may partially cover the face 44, each conductive pad 52 being in contact with the associated semiconducting portion 50 openings etched in this insulating layer.
  • the optoelectronic device 40 is fixed to another circuit by fusible conductive elements, not shown, for example solder balls or indium balls fixed to the conductive pads 52.
  • the assembly of the optoelectronic device 40 on another circuit, in particular on a control circuit is done by means of conventional techniques of matrix hybridization, by means of fusible balls, for example indium, or SnAg, or copper columns or studs.
  • conductive pads 52 are chosen to be compatible with the chosen assembly technology.
  • conductive pads 52 may be Cu or Ti-Ni-Au, Sn-Ag or Ni-Pd-Au.
  • the active layer of the shell 64 of the elementary light-emitting diodes of at least one of the sets of light-emitting diodes D may be manufactured differently from the active layer of the shell of the elementary light-emitting diodes of at least one other set of diodes. emitting.
  • the active layer of the shell 64 of a first set may be adapted to emit light at a first wavelength, for example a blue light
  • the active layer of the shell 64 of a second set may be adapted to emit light at a second wavelength different from the first wavelength, for example a green light. This can be achieved, for example, by adapting in each set the pitch and size of the son, which has the effect of modifying the thickness and the composition of the quantum wells composing these active layers.
  • a third set may be adapted to emit light at a third wavelength different from the first and second wavelengths, for example a red light.
  • a third wavelength different from the first and second wavelengths, for example a red light.
  • the composition of the blue, green, and red lights can be chosen so that an observer perceives a white light by composition of the colors, each diode, or together of diodes, emitting at a first, second and third wavelength that can be addressed independently of others to adjust the color.
  • a phosphor is deposited between and on electroluminescent diodes of a sub-pixel.
  • the phosphor can absorb the deep blue light emitted by the light-emitting diodes and transform it into green or red, or even blue.
  • the advantage of using a blue phosphor and not the natural emission of the light-emitting diodes is an insensitivity of the quality of the blue to the color variations of the spontaneous emission of the wires, from one batch to another or within the same substrate.
  • a selective phosphor deposition method consists of mixing the phosphor grains of a first color with photosensitive silicone resin, then after spreading over the entire substrate and light-emitting diodes, to fix luminophores on the desired sub-pixels. by photolithography. The operation is repeated with a second phosphor and as many times as there are subpixels of different colors.
  • Another method is to use inkjet type printing equipment with an "ink” composed of the silicone-phosphor mixture and specific additives. By printing, from mapping and orientation and referencing the sub-pixels, phosphors are deposited at the required locations.
  • Lenses may be provided on the encapsulation layer 70.
  • a lens may be provided for each subpixel or sets of subpixels.
  • the insulating layer 62 covers the entire periphery of the lower portion 58 of each wire 56.
  • a portion of the lower portion 58, or even the entire lower portion 58, may not to be covered by the insulating layer 62.
  • the shell 64 may cover each wire 56 on a height greater than the height of the upper portion 60, or over the entire height of the wire 56.
  • the insulating layer 62 does not cover the perimeter of the upper portion 60 of each wire 56.
  • the insulating layer 62 may cover part of the upper portion 60 of each wire 56.
  • the insulating layer 62 may, for each wire 56, partially cover the lower portion of the wire. the shell 64.
  • the layer 62 may not be present, especially in the case where the seed pads 54 are replaced by a seed layer covered with a dielectric layer and that the son are formed on the seed layer in openings provided in the dielectric layer.
  • the optoelectronic device 40 may be attached to another integrated circuit, in particular a control circuit, comprising electronic components, in particular transistors, used for controlling the light-emitting diode assemblies of the optoelectronic device 40.
  • a control circuit comprising electronic components, in particular transistors, used for controlling the light-emitting diode assemblies of the optoelectronic device 40.
  • the conductive pads 52 electrically connected to the conductive layer 68 may be connected to a source of a first reference potential.
  • the conductive pad 52 in contact with the portion 50 of the substrate 42 on which the elementary light-emitting diodes of a set D of light-emitting diodes to be activated can be connected to a source of a second reference potential so as to circulate a current through the elementary light-emitting diodes of the set D considered. Since each conductive pad 52 can extend over a large part of the associated portion 50, a homogeneous distribution of the current can be obtained.
  • the conductive layer 68 is shown in contact with portions 50 along one side of the optoelectronic device 40.
  • the conductive layer 68 may be in contact with portions 50 over the entire around the optoelectronic device 40.
  • the optoelectronic device 40 is at least partly made according to the method described in the patent application FR13 / 59413 which is considered to be an integral part of the present description.
  • An embodiment of a method of manufacturing the optoelectronic device 40 may comprise the following steps:
  • the opening may be formed by a reactive ion etching type etching, for example a DRIE engraving.
  • the depth of the opening is strictly greater than the target thickness of the substrate 42 after a thinning step described below.
  • the depth of the opening is between 10 ⁇ m and 200 ⁇ m, for example about 35 ⁇ m or 60 ⁇ m.
  • an insulating layer for example silicon oxide
  • the thickness of the insulating layer may be between 100 nm and 3000 nm, for example about 200 nm.
  • a filling material for example polycrystalline silicon, tungsten or a refractory metal material compatible with the steps of the manufacturing process carried out at high temperatures, deposited for example by chemical vapor deposition at low pressure (LPCVD) for low pressure chemical vapor deposition.
  • LPCVD chemical vapor deposition at low pressure
  • the polycrystalline silicon advantageously has a coefficient of thermal expansion close to silicon and thus makes it possible to reduce the mechanical stresses during the steps of the manufacturing process carried out at high temperatures.
  • CMP Mechano-chemical polishing
  • CVD chemical vapor deposition
  • ALD atomic layer deposition
  • Atomic Layer Deposition Atomic Layer Deposition
  • PVD Physical Vapor Deposition
  • each elemental light-emitting diode is formed by epitaxial growth steps on a portion of the wire 56.
  • the manufacturing process of the optoelectronic device 40 therefore does not include etching steps liable to deteriorate the active zones of the light-emitting diodes. .
  • the delimitation of the pixels Pix display subpixels is performed only by the electrical insulation elements 48 and does not lead to changes in the manufacturing steps of the elementary light emitting diodes.
  • the diodes The elementary electroluminescent electrodes may be uniformly distributed on the face 46 of the substrate 42. Even though elementary light-emitting diodes may be in line with electrical insulation elements 48 and not be functional, this has the advantage that the steps of FIG. Elemental light emitting diodes are identical irrespective of the shape of the sub-display pixels.
  • the optoelectronic device 40 is electrically connected to an external circuit by solder balls provided on the side of the lower face 44 of the substrate 42.
  • solder balls provided on the side of the lower face 44 of the substrate 42.
  • other modes of electrical connection can be considered.
  • the substrate 42 is a substrate made of a semiconductor or conductive material.
  • the substrate 42 is wholly or partly made of an insulating material, for example silicon dioxide (SiO 2) or sapphire.
  • the electrical connection between the conductive pads 52 and the conductive layer 68 or the seed pads 54 can be achieved by using conductive elements passing through the substrate 42 over its entire thickness, for example vias through or TSV (acronym for Through Silicon Via).
  • FIGS. 4A, 4B and 4C are figures similar respectively to FIGS. 3A, 3B and 3C of another embodiment of an optoelectronic device 80, in particular a display screen or a projection device, in which at least one conductive pad 82 is provided in contact with the conductive layer 68 on the side of the front face 46.
  • the encapsulation layer 70 then comprises an opening 84 which exposes the conductive pad 82.
  • the opening 69 described above is not present.
  • Neither the conductive layer 68 nor the electrode layer 66 are in electrical contact with the semiconductor substrate 42.
  • the conductive pad 82 is electrically connected to an external circuit, not shown, by a not shown wire.
  • a single conductive pad 82 is shown in FIG. 4A.
  • several conductive pads 82 may be distributed over the conductive layer 68, for example at the periphery of the optoelectronic device 80.
  • FIGS. 5A and 5B are figures similar to FIGS. 3A and 3B, respectively, of another embodiment of an optoelectronic device 90, in particular a display screen or a projection device.
  • the optoelectronic device 90 comprises all the elements of the optoelectronic device 40 and furthermore comprises opaque portions 92 resting on the conductive layer 68 between adjacent display sub-pixels, that is to say substantially in the extension of the electrical insulation elements 48.
  • each opaque portion 92 may be greater than or equal to the height of the wires 56.
  • the width of each opaque portion 92 is less than or equal to the smallest gap between two elementary light-emitting diodes of adjacent D-sets.
  • each opaque portion 82 may be in a resin colored in black. This resin is preferably adapted to absorb electromagnetic radiation over the entire visible spectrum. The presence of the opaque portions 92 advantageously makes it possible to increase the contrast of the optoelectronic device 90.
  • the structure of the optoelectronic device 90 shown in FIGS. 5A and 5B can be implemented with the structure of the optoelectronic device 80 shown in FIGS. 4A, 4B and 4C.

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EP15823720.6A 2014-12-30 2015-12-24 Dispositif optoélectronique a diodes électroluminescentes Pending EP3241245A1 (fr)

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FR1463420A FR3031238B1 (fr) 2014-12-30 2014-12-30 Dispositif optoelectronique a diodes electroluminescentes
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Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10535709B2 (en) 2014-12-30 2020-01-14 Aledia Optoelectronic device with light-emitting diodes
EP3127747A1 (fr) * 2015-08-07 2017-02-08 Valeo Vision Dispositif d'éclairage et/ou de signalisation pour véhicule automobile
US10170455B2 (en) * 2015-09-04 2019-01-01 PlayNitride Inc. Light emitting device with buffer pads
FR3053530B1 (fr) * 2016-06-30 2018-07-27 Aledia Dispositif optoelectronique a pixels a contraste et luminance ameliores
FR3053757B1 (fr) * 2016-07-05 2020-07-17 Valeo Vision Dispositif d'eclairage et/ou de signalisation pour vehicule automobile
KR102592276B1 (ko) * 2016-07-15 2023-10-24 삼성디스플레이 주식회사 발광장치 및 그의 제조방법
FR3055948B1 (fr) * 2016-09-15 2018-09-07 Valeo Vision Procede de montage d'un composant electroluminescent matriciel sur un support
FR3061357B1 (fr) * 2016-12-27 2019-05-24 Aledia Procede de realisation d’un dispositif optoelectronique comportant une etape de gravure de la face arriere du substrat de croissance
FR3061358B1 (fr) * 2016-12-27 2021-06-11 Aledia Procede de fabrication d’un dispositif optoelectronique comportant des plots photoluminescents de photoresine
FR3061608B1 (fr) * 2016-12-29 2019-05-31 Aledia Dispositif optoelectronique a diodes electroluminescentes
DE102017113745A1 (de) 2017-06-21 2018-12-27 Osram Opto Semiconductors Gmbh Halbleiterdisplay, optoelektronisches Halbleiterbauteil und Verfahren zur Herstellung solcher
KR102459144B1 (ko) 2017-11-20 2022-10-27 서울반도체 주식회사 전구형 광원
US10818816B2 (en) * 2017-11-22 2020-10-27 Advanced Semiconductor Engineering, Inc. Optical device with decreased interference
DE102017129326B4 (de) * 2017-12-08 2022-04-28 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Verfahren zur Herstellung von Halbleiterlichtquellen
FR3077653A1 (fr) * 2018-02-06 2019-08-09 Aledia Dispositif optoelectronique avec des composants electroniques au niveau de la face arriere du substrat et procede de fabrication
KR102502223B1 (ko) * 2018-04-10 2023-02-21 삼성전자주식회사 발광 다이오드 및 그의 제조 방법
FR3082663B1 (fr) * 2018-06-14 2022-01-07 Aledia Dispositif optoelectronique
FR3082657B1 (fr) * 2018-06-19 2021-01-29 Aledia Procede de fabrication d’un dispositif optoelectronique a parois de confinement lumineux auto alignes
FR3083045B1 (fr) * 2018-06-26 2020-07-31 Aledia Dispositif optoelectronique a diodes electroluminescentes
FR3083370B1 (fr) * 2018-06-28 2021-10-15 Aledia Dispositif émetteur, écran d'affichage associé et procédé de fabrication d'un dispositif émetteur
FR3083371B1 (fr) 2018-06-28 2022-01-14 Aledia Dispositifs émetteurs, écran d'affichage associé et procédés de fabrication d'un dispositif émetteur
FR3087581B1 (fr) * 2018-10-22 2021-01-15 Aledia Dispositif optoelectronique, ecran d'affichage associe et procede de fabrication d'un tel dispositif optoelectronique
FR3087580B1 (fr) * 2018-10-23 2020-12-18 Aledia Procede de realisation d’un dispositif optoelectronique comprenant des diodes electroluminescentes homogenes en dimensions
FR3087936B1 (fr) * 2018-10-24 2022-07-15 Aledia Dispositif electronique
FR3091027B1 (fr) * 2018-12-21 2022-11-18 Aledia Dispositif optoélectronique
JP2020166191A (ja) * 2019-03-29 2020-10-08 株式会社ジャパンディスプレイ 表示装置
CN109935614B (zh) * 2019-04-09 2021-10-26 南京大学 基于深硅刻蚀模板量子点转移工艺的微米全色qled阵列器件及其制备方法
CN111816729B (zh) * 2019-04-11 2021-08-31 中国科学院半导体研究所 LED/ZnO纳米线阵列集成的光电晶体管芯片及制备方法
KR20210003991A (ko) 2019-07-02 2021-01-13 삼성디스플레이 주식회사 발광 소자, 이의 제조 방법 및 표시 장치
FR3098987B1 (fr) * 2019-07-15 2021-07-16 Aledia Dispositif optoelectronique dont les pixels contiennent des diodes electroluminescentes emettant plusieurs couleurs et procede de fabrication
CN112242412B (zh) * 2019-07-17 2024-03-12 錼创显示科技股份有限公司 半导体结构与微型半导体显示设备
FR3111236A1 (fr) * 2020-06-03 2021-12-10 Aledia Dispositif électronique pour capture ou émission d’une grandeur physique et procédé de fabrication
KR102561848B1 (ko) * 2021-06-07 2023-08-01 넥센타이어 주식회사 밀착형 벨트가 적용된 그린타이어
FR3147421A1 (fr) * 2023-03-30 2024-10-04 Aledia Ecran d’affichage à transitions réduites entre sous-pixels

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110254034A1 (en) * 2008-07-07 2011-10-20 Glo Ab Nanostructured led

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1359413A (fr) 1963-04-04 1964-04-24 Shell Int Research Procédé de préparation de composés organiques oxygénés
GB1060051A (en) 1965-01-11 1967-02-22 Rolls Royce Improvements in or relating to gas turbine engines
US20070080360A1 (en) * 2005-10-06 2007-04-12 Url Mirsky Microelectronic interconnect substrate and packaging techniques
US8624968B1 (en) * 2007-04-25 2014-01-07 Stc.Unm Lens-less digital microscope
TW200937574A (en) * 2007-09-28 2009-09-01 Toshiba Kk Semiconductor device and method for manufacturing same
DE102008011848A1 (de) * 2008-02-29 2009-09-03 Osram Opto Semiconductors Gmbh Optoelektronischer Halbleiterkörper und Verfahren zur Herstellung eines solchen
KR100982986B1 (ko) * 2008-04-17 2010-09-17 삼성엘이디 주식회사 서브마운트, 발광다이오드 패키지 및 그 제조방법
WO2010022064A1 (en) * 2008-08-21 2010-02-25 Nanocrystal Corporation Defect-free group iii - nitride nanostructures and devices using pulsed and non-pulsed growth techniques
US8889455B2 (en) 2009-12-08 2014-11-18 Zena Technologies, Inc. Manufacturing nanowire photo-detector grown on a back-side illuminated image sensor
JP4930548B2 (ja) * 2009-06-08 2012-05-16 サンケン電気株式会社 発光装置及びその製造方法
KR20110008550A (ko) * 2009-07-20 2011-01-27 삼성전자주식회사 발광 소자 및 그 제조 방법
KR101192181B1 (ko) * 2010-03-31 2012-10-17 (주)포인트엔지니어링 광 소자 디바이스 및 그 제조 방법
SG186261A1 (en) * 2010-06-18 2013-01-30 Glo Ab Nanowire led structure and method for manufacturing the same
DE102010034665B4 (de) * 2010-08-18 2024-10-10 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronischer Halbleiterchip und Verfahren zur Herstellung von optoelektronischen Halbleiterchips
US9070851B2 (en) * 2010-09-24 2015-06-30 Seoul Semiconductor Co., Ltd. Wafer-level light emitting diode package and method of fabricating the same
KR101766298B1 (ko) * 2011-03-30 2017-08-08 삼성전자 주식회사 발광소자 및 그 제조방법
FR2995729B1 (fr) * 2012-09-18 2016-01-01 Aledia Dispositif opto-electrique a microfils ou nanofils semiconducteurs et son procede de fabrication
FR3003403B1 (fr) * 2013-03-14 2016-11-04 Commissariat Energie Atomique Procede de formation de diodes electroluminescentes
FR3005785B1 (fr) * 2013-05-14 2016-11-25 Aledia Dispositif optoelectronique et son procede de fabrication

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110254034A1 (en) * 2008-07-07 2011-10-20 Glo Ab Nanostructured led

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CN107112344B (zh) 2021-02-09
FR3031238B1 (fr) 2016-12-30
CN107112344A (zh) 2017-08-29
WO2016108021A1 (fr) 2016-07-07
BR112017012829A2 (pt) 2018-01-02
JP6701205B2 (ja) 2020-05-27
KR20170101923A (ko) 2017-09-06
FR3031238A1 (fr) 2016-07-01
BR112017012829B1 (pt) 2022-12-06
US20170373118A1 (en) 2017-12-28
US10084012B2 (en) 2018-09-25

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