EP1966786B1 - Procédé de commande d'afficheurs matriciels - Google Patents

Procédé de commande d'afficheurs matriciels Download PDF

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Publication number
EP1966786B1
EP1966786B1 EP06841084.4A EP06841084A EP1966786B1 EP 1966786 B1 EP1966786 B1 EP 1966786B1 EP 06841084 A EP06841084 A EP 06841084A EP 1966786 B1 EP1966786 B1 EP 1966786B1
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Prior art keywords
matrix
line
lines
matrices
brightness
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German (de)
English (en)
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EP1966786A1 (fr
Inventor
Chihao Xu
Jürgen Wahl
Friedrich Eisenbrand
Andreas Karrenbauer
Kian Min Soh
Christoph Hitzelberger
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Max Planck Gesellschaft zur Foerderung der Wissenschaften eV
Universitaet des Saarlandes
Kyocera Automotive and Industrial Solutions GmbH
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Max Planck Gesellschaft zur Foerderung der Wissenschaften eV
Kyocera Display Europe GmbH
Universitaet des Saarlandes
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3216—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using a passive matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
    • G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/18—Timing circuits for raster scan displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0205—Simultaneous scanning of several lines in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes

Definitions

  • the invention relates to a method for driving matrix displays according to the preamble of claim 1, which are made up of a plurality of lines formed as rows and columns with individual pixels, wherein individual rows are selectively driven by activating lines for a particular Zeilenadressierzeit and the columns correlated to the activated line corresponding to the desired brightness in the pixels with an operating current or a corresponding voltage, ie an electrical signal for driving, be acted upon.
  • the horizontal rows are called rows
  • the orthogonal vertical rows are columns. This is for easier understanding.
  • the invention is not limited to this exact arrangement. In particular, it is possible to interchange the rows and columns in their function or to choose a non-orthogonal relationship between the rows and columns.
  • D D 11 D 12 ... D 1 ⁇ m D 21 D 22 ... D 2 ⁇ m , , ... , D n ⁇ 1 D n ⁇ 2 ... D n ⁇ m ,
  • the indices correspond to the positions of the pixels on the display, which is given by the matrix or matrix display D.
  • Each row i of the matrix D and each column j on the matrix D correspond to the geometric line, respectively and column on the display.
  • Each controllable pixel ij of the matrix display D is assigned a pixel diode or the like element for generating a pixel of a display.
  • the time-averaged luminous intensity (corresponding to the brightness D ij ) in each pixel corresponds to the corresponding element in the matrix D. All entries of the matrix D together form the image to be displayed.
  • the pixels ij on the matrix display D are activated so far line by line.
  • the OLEDs are activated on a selected line i by a switch, for example by connecting them to ground.
  • an operating current I is impressed in the columns j, which causes the pixels ij to light up at the intersection of this row i and the columns j.
  • the luminous intensity L is in the first approximation proportional to charge, which is impressed during the active phase (Zeilenadressierzeit) and radiant recombined in the OLED pixel.
  • T frame is the total time required to build a complete image when all n lines of matrix display D are activated once.
  • the operating current I OLED or I or I 0 is impressed in each pixel.
  • the operating current over the time period T frame / n is active, which corresponds to the row addressing time.
  • the duration of the operating current is smaller, namely d * T frame / n.
  • d is the pulse width modulation duty cycle and lies between zero and one: L light ⁇ d ⁇ I 0 n
  • the current I 0 is now constant regardless of the luminous intensity of the pixel.
  • the intensity L is set by means of the duty cycle d.
  • Such brightness control is simpler and more accurate compared to amplitude modulation because the units of time in the electronics can be set very accurately, and consequently d.
  • Only one reference current I 0 is sufficient to drive all pixels ij.
  • the amplitude must be adjusted according to the desired brightness D ij .
  • each diode or each pixel ij can be active only a maximum of one nth of the total time T frame .
  • the corresponding operating current thus has to be multiplied by the number n of lines in comparison with the case in which a pixel is supplied with operating current over the total time T frame . That is, the higher the number of lines, the higher must be the pulsed operating current I or I 0 .
  • the operating current in a pulse width modulation for brightness adjustment is always high, even if the pixel to be controlled ij is very dark. In this case, only the turn-on time of the operating current is very short.
  • the high operating current can lead to a significant reduction in the OLED life.
  • the voltage at the OLEDs must also be increased, whereby the power consumption increases and the efficiency decreases. This increased power dissipation not only discharges the battery or the battery faster, but also makes the display warmer, which also reduces the service life.
  • a so-called "active matrix” could be used, whereby the operating current is no longer supplied pulsed, but is present as a constant current.
  • an active-matrix drive (TFT backplane) for an OLED display requires significant additional costs.
  • a driver for an initially discussed OLED display is in the WO 03/091983 A1 described, which serves to drive passive matrix displays with higher efficiency.
  • an identifier for empty, ie not or not significantly lit, rows of pixels is provided in the driver circuit. Such lines are completely omitted in the control. This increases the brightness of the remaining, driven lines. This effect can also be used to reduce the power to the display in proportion to the number of missed lines.
  • the time with which a line is addressed is always the same.
  • Clare Micronix's MXED301 data sheet identifies a controller for an OLED display that selectively drives specific lines in a partial scan mode of operation and in a screen saver operating mode and does not take into account other lines of the display during control. However, a driven line is scanned at the designated line address time.
  • the EP 1 437 704 A2 discloses a drive for a matrix display in which the drive time for one or more driven line (s) is variably set based on the respective pixel data to increase the peak luminance of the display and reduce black level luminance and thus improve the contrast , To achieve the luminance desired in a pixel, a pulse width and / or amplitude modulation is proposed.
  • the image data defines an image matrix which is factored into a product of at least a first and a second factor matrix.
  • the first factor matrix defines row drive signals and the second factor matrix defines column drive signals for the display to be driven.
  • the non-negative matrix factorization (NMF) described leads to data compression. The errors for the different color channels can be weighted differently and minimized in this calculation method.
  • nachverö Gette WO 2006/035246 A1 describes a similar method for multi-line addressing, according to which groups of first and second column electrodes are driven with different column drive signals to which first and second groups of row electrodes are assigned, each driven simultaneously with the first and second groups of column electrodes.
  • the determination of the matrices takes place with the above-described factorization.
  • Object of the present invention is to propose a method for driving matrix displays according to the type mentioned, with which increases the life of OLED display or the performance of any matrix display can be improved.
  • the row addressing time is set t i for each row i as a function of the maximum brightness D i max of all columns j of row i.
  • the row addressing time t i can be chosen to be less than or equal to a constant row addressing time t L , which results if each row of the matrix display is addressed so long that a maximum pixel brightness D max could be achieved with the impressed operating current.
  • the inventive row addressing time t i thus corresponds to the constant row addressing time t L multiplied by the ratio of the maximum brightness D i max of the pixels in all columns j of the row i to the maximum possible pixel brightness D max in the entire matrix display.
  • the maximum pixel brightness D max is defined as the luminous intensity (brightness) in a pixel ij which is reached when the operating current I 0 is applied to the pixel during the constant row addressing time t L. It follows that the time sum T Sum of the times addressing times t i over the number n of all lines is less than or equal to the total time T frame for activating all n lines, which is given by n times the constant Zeilenadressierzeit t L. At constant operating current I 0 , therefore, the total time for driving the matrix display according to the invention on the time sum T Sum ⁇ T frame of Line addressing times are reduced. This allows, for example, a higher refresh rate and thus increases the achievable performance of a matrix display.
  • the dependence of the row addressing time t i on the maximum brightness across the columns a line can also be used to reduce the operating current.
  • the total time T frame for activating all lines i can be kept constant, so that the sum of the line addressing times t ' i over all lines n corresponds to the total time T frame .
  • the Zeilenadressier instruments t ' i are thus extended accordingly according to this variant of the method according to the invention, so that their sum is equal to the total time T frame .
  • the operating current I 0 to the ratio of the time sum T Sum of (necessarily required) row addressing times t i of all the lines n to the total time (T frame) for the activation of all the lines with constant row addressing time t L are lowered to the operating current I. 1
  • the quantum efficiency ⁇ in the region of a lower operating current is generally greater than at a higher operating current.
  • the operating current I 1 can be additionally reduced by the ratio of the quantum efficiencies ⁇ (I 1 ) / ⁇ (I 0 ).
  • the line addressing time t ' i (normalized to T frame ) is also referred to as t i for the sake of simplicity.
  • the inventive adaptation of the row i t for addressing the diode pixels so can the selective phase (row addressing) of the individual diode pixels ij of the display D, that is the time during which the diode pixels ij is supplied with the operating current 1, are markedly prolonged.
  • the active operating current I 1 can be inversely proportional to the duration of selected phase can be reduced.
  • the efficiency of the matrix display D can be increased overall and in particular in OLED displays, the lifetime can be extended.
  • a basic idea of this invention is therefore to extend the duration of the operating current by a line-dependent shortening or adaptation of the Zeilenadressier profession. Since the charge is primarily decisive for a specific luminous intensity, more time for imprinting the operating current thus means a lower current in the amplitude.
  • the matrix display D is divided into a plurality of matrices S, M, which are controlled separately.
  • the superimposition of all matrices then generates the image of the matrix display D in the desired brightness D ij of the respective pixels ij. It should match the sum of the individual brightnesses S ij, M jj overall brightness formed a plurality of arrays D ij of the total desired brightness D ij of the matrix display D in the pixel ij.
  • the matrices can be successively nested or interleaved, preferably in each case using the method described above, in rows and columns.
  • a matrix S provides the control of a row i and a matrix M2 a simultaneous control of two rows i
  • the rows of the matrices S, M2 can be addressed alternately.
  • a source image which is described in the matrix display D
  • a source image can thus be decomposed into a plurality of image matrices.
  • Each of these matrices obtained for the display type for example, by the multi-line addressing described below to implement well, so that the sum of the images is better implemented than in a direct control of the display based on the original matrix D.
  • a plurality of lines i are controlled simultaneously.
  • the pixels ij in each column have j of the driven lines i in each case the same signal and the same light intensity.
  • the operating current I 0 , I 1 is increased by a multiple corresponding to the number of simultaneously driven lines, thus doubling with simultaneous control of two lines.
  • the simultaneous control of several lines is also called “multi-line addressing" (MLA), in contrast to the control of only one line, which is also referred to as “single-line addressing" (SLA).
  • a simultaneous control of multiple lines preferably adjacent lines can be controlled.
  • rows i which are preferably separated by a few rows, to be controlled simultaneously, for example, every row after the second.
  • a close proximity of simultaneously driven lines is therefore particularly useful because in an image adjacent lines of the matrix display D often have a similar brightness distribution.
  • a matrix (S) in which one row (i) is driven and one or more matrices (M2, M3, M4 ), in which several lines (i) are controlled combined.
  • M2, M3, M4 matrices
  • the desired brightness D ij can be individually adapted for each pixel ij.
  • This matrix S is also called residual single-line matrix.
  • a pulse width modulation can be used for the brightness control, that is, for example, the application of the operating current I during a Zeilenadressierzeit t i only for a portion of the Zeilenadressierzeit t i and the operating current I in the remaining time of the Zeilenadressierzeit t i is turned off. follows and the operating current I is switched off in the remaining time of the row addressing time t i .
  • an amplitude modulation can also be used for the brightness control, ie the amplitude of the operating current I can be adjusted in accordance with the desired brightness D ij .
  • the pulse width modulation and the amplitude modulation for brightness control can also be combined with each other. Then it is particularly advantageous if the brightness D ij is given in quantized steps, because the amplitude of the operating current can then be reduced in quantized steps, while the pulse width duty cycle is correspondingly increased.
  • This control is also device technology particularly easy to implement.
  • This combined method can be used flexibly, in particular, if the time for switching on the operating current I in a column j after an increase in the pulse width duty cycle does not exceed the row addressing time t i .
  • the decision of a combination of the amplitude modulation with the pulse width modulation depending on the required operating current Aufschaltzeit and the intended Zeilenadressierzeit for each row i and column j of the matrix display D done individually.
  • the amplitude can thus be reduced with quantized steps, while the pulse width modulation duty cycle is increased accordingly.
  • the implementation of the quantization can be done with multiple transistor cells, with which the multi-line addressing can be implemented.
  • the matrix display In order to generate the matrices used to drive the matrix pixels, it is proposed according to a preferred embodiment to convert the matrix display into a flow matrix having as entries nodes which correspond to the demand for brightness or brightness differences of individual pixels in the respective columns.
  • a suitable control in which the method described above is implemented and which has suitable computing means to carry out the individual method steps.
  • Such a control is also the subject of the present invention.
  • This transformation allows the matrix decomposition to be carried out using a combinatorial method based on the well-known MaxFlow / Min-Cut principle.
  • the hardware implementation effort for such combinatorial algorithms is known to be low.
  • combinatorial algorithms can be processed quickly, so that these algorithms are particularly suitable for controlling a matrix display.
  • the flux matrix is mapped from the difference between two matrices, the first matrix consisting of the matrix display and a row with zero entries appended to the end of the matrix display and the second matrix of the matrix display and a row preceding the matrix display consist of zero entries.
  • the flux matrix proposed according to the invention describes the differences between the pixels in the column and provides the basis or an optimal starting point for the optimization with a combinatorial method.
  • the nodes are preferably connected by arrows designated as edges, to which an assignment is assigned, which preferably corresponds to the entries of the several, separately controlled matrices (for example S, M2, M3, M4) according to their length. correspond, in which the matrix display can be decomposed as described above.
  • the result of the flux optimization, ie the edge assignments, are then directly the corresponding matrix elements of the single and multi-line matrices S, M2, M3, M4 etc.
  • the capacity While in known min-cut methods or max-flow methods, the capacity is kept constant and the flow is maximized, the flow in this method is derived from the source matrix (matrix display D) and thus predetermined.
  • the goal of optimization is to minimize the sum of all capacities. Therefore, the capacity is inventively made variable. Capacities are increased according to a strategy described later until all rivers are balanced. Then a valid assignment of the edges is achieved and the matrix decomposition is completed. It can be assumed that the sum of the capacitance values is minimal or very small.
  • the quality of the optimization is the ratio between the theoretical minimum and the sum of the capacitance values. In order to reduce the number of necessary iterations when increasing the capacitance values, an initialization can be used to generate an assignment of the edges as start value.
  • the information of preceding min-cuts can be used as a selection criterion, whereby a weighting of the min-cuts of the last iterations can take place. This allows a fast or efficient solution.
  • the step size with which the capacity value is increased can be adapted dynamically. This ensures that fewer iterations need to be performed without losing much optimization quality over the smallest increment of "one".
  • the matrix display can be divided into a plurality of smaller sub-matrices and the sub-matrices separated into sub-flow matrices.
  • Such optimization is considered to be local optimization, while matrix decomposition in a single optimization is considered to be global optimization. Since smaller iterations require much fewer iterations, it is also possible to pass the results of S, M2, M3, M4, etc., line by line to the registers for the output driver, without requiring any cache for these matrices. Thus, the storage cost is significantly lower.
  • a mixed local and global optimization can be carried out according to the invention, one or a few rows of multi-line matrices (M2, M3, M4) and / or residual single-line matrices (S) being selected from a sub-flow matrix. be won.
  • M2, M3, M4 and S multi-line matrices
  • S residual single-line matrices
  • Preferred applications of the method result for the control of self-illuminating displays, for example OLED displays, or non-self-illuminating displays, for example LCDs.
  • Another, inventive application of the method which is not directed to the control of matrix displays, but refers generally to the reading of matrices, for example sensor matrices in CCD cameras.
  • Fig. 1 schematically illustrates a matrix display D, which is composed of four rows i and four columns j. Accordingly, the matrix display D has a total of sixteen pixels ij, which should have the brightness D ij .
  • Each pixel ij is represented by a rectangle in which the digital brightness value D ij is entered as a number.
  • the brightness value "0" stands for a dark pixel ij
  • the brightness value "1" stands for a weak luminous pixel ij
  • the brightness value "2" stands for a bright luminous pixel.
  • the matrix display D is activated in such a way that lines one to four are activated in succession for a constant line addressing time t L , which are given in units of any value "1".
  • t L 13
  • This conventional method for driving a matrix display D by means of a single-line addressing is inventively as in Fig. 1b is modified in such a way that the row addressing time t i for each row i is determined as a function of the maximum brightness D i max of all pixels on the crossing points of all columns j with the row i.
  • This method is also referred to below as "Improved Single-Line Addressing" (ISLA).
  • ISLA Improved Single-Line Addressing
  • the procedure may be as follows.
  • the maximum brightness D i max of all columns is "2" for the first three lines, so that the row addressing time t i must be the same for each of these first three lines.
  • Fig. 2a shows the third column Fig. 1 over all lines one to four acted upon operating current or the proportional operating voltage. Plotted are the applied current (or the corresponding applied voltage) during the Zeilenadressierzeit.
  • Fig. 2a The width of a displayed box corresponds to the constant row addressing time t L , which has been used as the normalization quantity in the example described above. A box thus corresponds to the activation time of a line.
  • the total width consisting of four boxes corresponds to the total time T frame , within which an image of the matrix display can be completely built up.
  • Fig. 2a the current profile in the known single-line addressing is described.
  • the current corresponding to the desired brightness value "2" is maximum.
  • the current is halved.
  • the current is maximum again to reach the brightness value "2".
  • the power is off. This type of control corresponds to an amplitude modulation.
  • Fig. 2b the current profile for the improved single-line addressing according to the invention is shown.
  • the Zeilenadressier profession t i have been extended accordingly by one third. This is shown by the dashed lines.
  • the fourth line is not activated at all.
  • the brightness of a pixel ij is proportional to the impressed amount of charge which is determined by the time-integrated current (operating current).
  • Fig. 2b it can be seen that the area under the current curve is in Fig. 2b equal to the area under the current curve in Fig. 2a although the current (respectively the applied voltage) could each be reduced by a quarter. This is advantageous for the life of OLEDs.
  • Fig. 1c Another embodiment of the present invention will be described.
  • this method of control several lines are controlled simultaneously (multi-line addressing).
  • these are lines one and three, in each of which a pixel with the brightness "2" must be generated in the third column (cf. Fig. 1 a) , Since two lines have been combined, the line address time can be doubled. Accordingly, the operating current (or the corresponding voltage) per pixel is halved (cf. Fig. 2c for one pixel).
  • Fig. 1d it is particularly advantageous in relation to Fig. 1c described method of multi-line addressing with the Improved single-line addressing corresponding Fig. 1b to combine.
  • This makes it possible to generate any images in a multi-line addressing, since all activated lines are controlled identically in the multi-line addressing. Remaining differences and / or remaining lines can then be compensated by the Improved Single-Line-Addressing (MISLA).
  • MISLA Improved Single-Line-Addressing
  • Fig. 1d the second line according to Fig. 1a generated by a separate control of a second matrix.
  • This corresponds to a decomposition of the matrix display D into a plurality of matrices, which are controlled separately and produce the desired image of the matrix display D in the sum.
  • the control takes place in such a fast time clock that the human eye can not separate the sequential controls of the respective rows and / or matrices and composed to form a complete picture. Therefore, even when driven by multiple matrices, the total time T frame required to fully construct an image should not be extended. It is an advantageous procedure to keep the total time T frame for activating all the lines to be controlled constant in all matrices and to adapt the respective line addressing times t i accordingly.
  • the row addressing time t i be for one line quite different than those for a different row, depending on the maximum brightness of the columns in the respective row. However, this case does not occur in the example currently described.
  • the operating current or the voltage for each individual pixel ij can be halved, wherein in the two-line addressing (Two-line addressing) must be considered that the column-wise control corresponds to several lines in the circuit realization of a parallel circuit and the applied operating current is therefore distributed evenly to the pixels of all activated lines. In the case of a two-line addressing in a matrix, the switched-on operating current must therefore be doubled so that the same operating current is available at each pixel.
  • the current distribution for the combined control according to Fig. 1c and 1d is Fig. 2c and shows a further reduction of the maximum operating current without loss of brightness in the matrix display D.
  • the starting point of the description is the properties of a matrix display D, which is shown in FIG Fig. 3 is shown.
  • the brightness D ij of a matrix display can be given in digital values, where the value "0" describes a switched-off pixel.
  • the maximum brightness in the matrix is D max (eg: value "255" for 8-bit).
  • the corresponding operating current is I 0 .
  • the height of I 0 is specified or set by the application. It represents the desired brightness of the display.
  • each row within a frame period (total time T frame ) is assigned an identical, fixed or constant row addressing time t L , in which the maximum brightness D max can be generated.
  • T frame total time
  • D max maximum brightness
  • a certain brightness is converted in a brightness control by means of a pulse width modulation (PWM) in a number of clocks t 0 .
  • PWM pulse width modulation
  • the necessary selection duration of a line is determined by the maximum brightness D ij of all the pixels ij in the selected line i. If the maximum brightness in this line is less than D max , the next line can be activated earlier, ie the selected line addressing time t i may be shorter than t L.
  • T Sum is less than or equal to the total time T frame and can be extended to T frame by reducing the operating current I 0 to the operating current I 1 .
  • the reduced operating current I 1 is thus achieved in that the active or selected phase of a line (Zeilenadressierzeit t i ) is not fixed to t L. Instead, each row i remains active only as long as it requires the brightest pixel ij with the brightness D i max on that row. When the required time for the brightest pixel is reached, the system switches to the next line immediately.
  • the operating current I 1 and the timing for the row addressing t i are variable according to the invention.
  • FIG. 3 A simple example for this is in Fig. 3 illustrated.
  • the image of the matrix display in Fig. 3a becomes appropriate Fig. 1 described with the matrix D, which contains the brightness values D ij at the individual pixel positions ij.
  • Fig. 3b shows the time course of the (operating) current impressed into the second column.
  • Fig. 3b represents the current profile in a conventional single-line addressing (SLA), which in Fig. 3c ) is contrasted with the time course of the inventive Improved Single Line Addressing (ISLA).
  • SLA single-line addressing
  • ISLA Improved Single Line Addressing
  • the current amplitude is, for example, constant at 70 ⁇ A and each line is activated with a constant line addressing time t L of 2.8 msec
  • the current amplitude 40 ⁇ A in the case of the improved single-line addressing (FIG. Fig. 3c ) the current amplitude 40 ⁇ A.
  • the first, third and fifth lines are respectively active for a time (line addressing time t i ) of 4.2 msec and the second and fourth lines for a time (line addressing time t i ) of 0.7 msec.
  • the forward voltage of the OLED diodes also decreases.
  • the efficiency increases with the unit Lm / W, since the consumed energy is equal to the integration of the product of current and voltage over the frame period.
  • the achieved higher efficiency also means less self-heating of the display, which leads to an increase in the display life.
  • the implementation effort is low because the operating current I 1 for the display only needs to be set once and a time t i is easy to implement.
  • the sum D Sum of the maximum brightnesses D i max of a line is a predetermined, unchangeable variable. If several lines are combined and controlled in one matrix at the same time, there is the possibility to minimize or reduce D Sum . During a line addressing time t i , several lines are then selected at the same time, so that the total time required to drive the entire picture matrix can be reduced as a whole. Thus, the operating current can be further reduced.
  • Fig. 4 is circuitically illustrated how two lines Ri and Ri + 1 are addressed simultaneously.
  • the impressed column current is now 2 * I 1 and is distributed equally to the two diodes of the individual rows Ri and Ri + 1.
  • the diodes on the remaining lines are passive and are only shown with the parasitic capacitance C p .
  • the luminous intensities are the same at the respective diodes of a column in the simultaneously driven lines because they are each acted upon by the same current. Therefore, compared to single-line addressing, only one row addressing time t i is needed for the two lines to produce the same brightness in the driven pixels.
  • the source data for the individual pixel brightnesses D ij of the matrix display D, which are assembled into the desired image, are decomposed into two matrices S and M2.
  • S is the single-line matrix, which is controlled by the improved single-line addressing.
  • M2 is the multi-line matrix, for the control of which two lines are combined and addressed or activated together.
  • the representation of M2 in n-1 matrices, where n is the number of rows of the matrix display D, shows that for each of these matrices M, two rows are combined since the entries in the two rows are identical.
  • the merging of two lines is preferably done for two consecutive lines, because it is assumed that successive lines of an image have the greatest similarities and the distribution of the two-fold operating currents in two pixels is most homogeneous in successive lines of a real display.
  • mathematical decomposition is easier for this constraint than when two arbitrary rows are combined. The implementation of the algorithms is then of less effort and will be described in more detail below in an implementation according to the invention.
  • the Zeilenadressierzeit t i which gets every "two-line" for the activation, depends analogously to the above-described realization of the maximum brightness Mij of a pixel in this two-line.
  • the time-optimized control method which has already been described for single-line addressing, is also used here.
  • max (S il , ... S im ) and max (M2 il , ..., M2 im ) respectively indicate the maximum brightness of a line which is proportional to the respective row addressing time t i .
  • the goal of decomposing into multiple matrices is a further reduction of the operating current I 1 , ie a minimization of D Sum .
  • This is achieved by each brightness M2 ij of the multi-line matrix M2 reducing two elements in the single-line matrix, namely S ij and S i + lj by the amount M2 ij from the original data D ij and D i + lj ,
  • only one row addressing time t i is required, namely the time for the addressing of M2 ij .
  • the effect is correspondingly higher.
  • a 4X9 matrix D is decomposed into two matrices M2 and S.
  • D max should have the brightness value "15" (4 bit).
  • the first matrix in Fig. 6 indicates the desired brightnesses D ij of the matrix display D.
  • the second matrix is two-line matrix M2 and the third is the residual single-line matrix S. M2 is again shown separately, the sum representation is shown how the brightnesses are distributed to two adjacent lines with simultaneous addressing.
  • Fig. 7 D Sum can be further reduced.
  • the first matrix according to Fig. 7 is equal to the source matrix Fig. 6 and represents the desired brightness D ij of the matrix display D.
  • the second matrix is the three-line matrix M3
  • the third matrix is the two-line matrix M2
  • the fourth is the residual single-line matrix S.
  • D Sum in this case further reduces to 58.
  • Fig. 8 are the voltage curve of the eighth row, the current and voltage curve of the second column and the voltage at a diode (D 82 ) for the two-line addressing according to Fig. 6 shown.
  • the operating current I 0 for conventional single-line addressing is 100 ⁇ A.
  • the flux sweep of the OLED at 53 ⁇ A is 6 V.
  • the threshold voltage of the OLED is 3 V.
  • a frame period, ie the total time T frame is 13.5 msec.
  • Fig. 6 t 1 0.1875 msec.
  • the S matrix and M2 matrix are activated alternately. First the first row of the S matrix is addressed, then the first two row of the M2 matrix (ie its rows 1 and 2), then the second row of the S matrix, then the second two row of the M2 matrix (ie their rows 2 and 3), etc ..
  • Fig. 8a the voltage curve of the eighth line is shown.
  • a corresponding line switch (cf. Fig. 4 ) is closed when this line is addressed so that a current can flow. The voltage is then zero. Otherwise the line switch is open. Since a column current always flows, there is at least one column voltage of 6 V.
  • the row voltage of 3 V results from the 6V column voltage minus a threshold voltage of eg 3 V in the case of an OLED.
  • the eighth line is addressed for 2.625 msec (from 9.375 msec to 12 msec).
  • Fig. 8b the operating current is shown in the second column.
  • the current waveform there are three stages, zero, when no pixel diode is active, 53 ⁇ A when only one pixel diode is active, and 106 ⁇ A when two pixel diodes (in the context of two-line addressing) are active.
  • the current amplitude at each diode is also 53 ⁇ A, because the total current distributes equally to both of the simultaneously driven pixel diodes.
  • the time span (line addressing time t i ) in which the eighth line is activated consists of three phases. During the first four bars (from 9.375 msec to 10.125 msec) row 7 and row 8 are addressed together. The current is therefore also 2 * 53 ⁇ A. This corresponds to the row addressing of M2 72 .
  • line 8 is addressed by S 82 .
  • the total of five bars of the row addressing time t i come from the fact that the maximum of the brightness Sij of the eighth row of the matrix S has the value 5 (see 1st column, 8th row).
  • a current of 53 ⁇ A flows for a time of 0.1875 msec (one clock). Then, the current for four more clocks is zero, since the maximum of the eighth row of the S matrix (S 81 ) is 5 and the brightness control is performed by a pulse width modulation.
  • the last phase lasts 5 bars, in which the eighth and ninth rows of the matrix M2 are addressed.
  • the current is again 106 ⁇ A. However, the current only flows for 4 cycles, since M2 82 is 4. The current drops back to zero for one cycle.
  • the voltage in the second column is in Fig. 8c shown over time. It is 6 volts when an operating current is flowing and is independent of whether the operating current is 53 ⁇ A or 106 ⁇ A since at 106 ⁇ A the operating current is divided by two diodes. If no current flows, the voltage drops to 3 volts. This corresponds to the threshold voltage below which no diode current can flow.
  • the voltage is 6 volts when an operating current of 53 ⁇ A flows through this diode.
  • no current flows for 4 clocks.
  • the voltage at the pixel is 3V (threshold voltage). If there is no current in the second column, the voltage at the return and column switches is 3V, so the voltage at that pixel will be zero.
  • the column voltage is 6V and pulls the potential of this non-addressed row 8 to 3V (6V minus threshold voltage).
  • a pulse width modulation of the operating current was used.
  • the S and M2 arrays can also be mapped by amplitude modulation of the operating current.
  • amplitude modulation each line or multiple line is addressed as long as it corresponds to the maximum on this line or multiple line. This is the same with pulse width modulation. The only difference is that the operating current flows continuously during the row addressing time t i and the magnitude of its amplitude is adjusted.
  • Optimized means minimizing the sum of the maximum magnitudes D Sum and efficiently means a low hardware overhead and fast turnaround.
  • the extraction or determination of the matrices M and S is basically feasible with known methods such as linear programming and standard software.
  • complex arithmetic operations such as multiplication and division have to be applied so that this method is very computationally intensive and slow.
  • the complexity increases more than quadratically with the size of the image matrix.
  • the transformed secondary conditions can be defined by the in Fig. 10 visualize the graph shown.
  • each node represented as a circle represents an entry in the transformed matrix d '.
  • D' ij in the circle represents the corresponding element of the matrix d ', which in Fig. 9 is shown.
  • the value of these nodes is thus equal to the value of the matrix element d ' ij .
  • the edges between the matrix elements d ' ij are the arrows leading from one node or circle to another node or circle. Each of these edges has a direction indicated by the arrow and numbered. This occupancy (number) of edges (from edge set A) reflects the value that the corresponding variable has in the decomposition of the source data matrix display. Edges that extend from one line to the next belong to the matrix S.
  • Edges that skip one line, ie have the length "2" are to be assigned to the matrix M2. Edges of length three are assigned according to the matrix M3, and the matrices M4, M5, etc. have an analogous assignment.
  • the indices of the edges are denoted by ij, where "i" is the line number for the starting node (circle) and "j" is the number for the column.
  • the 4X9 matrix D off Fig. 6 gets into a 4X10 flow matrix d ' transformed into Fig. 11 is specified.
  • This matrix d ' is in Fig. 12 shown as a river to be balanced.
  • Each element of the d'matrix corresponds to a node in the corresponding position.
  • the edges are still all zeroed, since this is the start of the matrix decomposition.
  • a valid decomposition is achieved if and only if the sum of the occupations (numbers) of the outgoing edges (arrows outgoing from the circle) minus the sum of the assignments (numbers) of the incoming edges (arrows arriving at the circle) of each node (circle) are equal of its respective value (need) of the node. All edge assignments are not negative.
  • Fig. 13 the result of the balanced flow is displayed. From the assignments of the edges, all elements of the matrices M3, M2 and S are obtained.
  • Two edges (arrows) in Fig. 13 should be of the same type if the start and end nodes of both edges are each in the same line.
  • the goal is to find a valid occupancy of the edges so that the sum of the maximum edges of each edge type is minimized.
  • p is the number of rows of the multi-line matrices M and the remainder of the single-line matrix S.
  • V ⁇ Z which assigns each node its need.
  • Z is an integer.
  • the special feature of this new method is that the capacity is valid for all edges of a certain length of a line. The flow on each of these edges is less than or equal to this capacity.
  • the capacities themselves are variable and in some way represent the costs and the effort for the optimization. The sum of all capacities must be minimized. In contrast to a known max-flow / min-cut method, where the flow is maximized at given capacities, the capacity is minimized for a given flow.
  • the capacities are a function u : ⁇ 1, ..., p ⁇ ⁇ Z ⁇ 0c , so that for all k ⁇ ⁇ 1, ..., p ⁇ and a ⁇ A k we have: f ( a ) ⁇ u ( k ).
  • the capacities are successively, i. gradually increased from zero until a valid decomposition is possible. This also ensures that the capacity is greater than or equal to zero.
  • the amount of edges is determined whose occupancy is equal to the capacity and thus represents a bottleneck that prevents a valid solution.
  • This edge set also called minimum cut, separates the nodes with positive demand from those with negative need.
  • the capacities of the edges are increased from the minimum cut. However, this is preferably done only for the capacity that allows most edges to leave the bottleneck.
  • the assignments are now increased until either a valid solution is found or a new bottleneck occurs, after which the steps described are repeated.
  • the program modules "MaxFIow” and “MinCut” are the standard methods known from the literature.
  • the set H describes the history of the calculated MinCuts. In this case, C ⁇ A denotes the outgoing edges of the current MinCut, and C i ⁇ A denotes the outgoing edges of the MinCuts of the iteration i.
  • the parameter ⁇ u determines the step size with which the individual capacities are increased.
  • the method of this invention can also be used for a subarea of an image matrix.
  • an image can be divided into several segments and each optimized for itself, which corresponds to a local optimization.
  • a mixed global and local optimization can be performed by moving a segment of a particular size line by line or by several lines.
  • the submatrix is formed from a certain number of lines. It is first formed from the top rows of the source matrix. In each optimization, the matrix entries (S, M2, M3, etc.) are obtained for the topmost line or a few topmost lines. The next submatrix is accordingly shifted down one or more lines. The influence of the previously obtained multi-line matrix row on this new submatrix must be deducted. Then one or more rows of S, M2, M3, etc. are recovered. The submatrix runs to the end of the source matrix and is then completely decomposed. Thus one receives all entries of S, M2, M3 etc ..
  • the decomposition of a smaller matrix requires less memory and fewer iterations.
  • the result of the matrix decomposition must be placed in a cache, such as SRAM or the like. Only immediately before activation, the information is then read line by line in register for the output driver.
  • the Capacities first obtained by the sub-matrix decomposition, hence their sum, or t l and I 1 . Thanks to the fast decomposition, the row result is then successively calculated again and passed on directly to the register for the output driver, so that the large buffer can be dispensed with.
  • the hardware overhead can be reduced by the segmented / local or mixed optimization, while the quality of the optimization can decrease somewhat in this case.
  • the diodes must be driven accordingly.
  • the individual Zeilenadressier devis t i can vary from line to line and are each based on the maximum brightness value of these lines.
  • the brightness control can then be achieved by a pulse width modulation or an amplitude modulation of the current.
  • an amplitude modulation can be used for brightness control, so that all pixel ij in the active phase, that is during the respective row addressing time t i, are switched to 100% of the time and the operating current at pixels ij is correspondingly reduced with lower brightness.
  • amplitude modulation is harder to implement in terms of hardware. This is especially true for a high color depth or many gray levels, while a pulse width modulation is comparatively simple and accurate to implement without a high cost of the hardware used is required.
  • the operating current must be quantified, ie divided into several different stages, fed to the streams for one, two and more lines addressing in the columns and adjust the amount of current accordingly.
  • the quadruple operating current (4 * I 1 ) must also be impressed.
  • the quantified operating current can also be used to reduce the operating current again for a matrix entry whose brightness value M ij , S ij is not a maximum.
  • This can, for example, the in Fig. 18 used for the brightness values M ij algorithm.
  • the result corresponds to a combined pulse width and amplitude modulation for brightness control.
  • Fig. 17 The result of this combined brightness control is in Fig. 17 in comparison to an exclusive pulse width modulation for brightness control ( Fig. 16 ).
  • the current amplitude is, for example, constant 100 ⁇ A.
  • the pulse width of the first pulse is 6 out of 10 units (6/10), with the active duration of this row being 10 units (row addressing time of 10 units). Since 6 units is greater than half of 10 units and less than 3/4 of 10 units, mixed pulse amplitude modulation extends the pulse width of the first pulse to 4/3 of the original value. At the same time the amplitude is reduced to 3 ⁇ 4 of the original amplitude (ie 75 ⁇ A in the example).
  • Fig. 17 compared to Fig. 16 refer to.
  • the pulse width of the second pulse is doubled while the amplitude is halved analogously.
  • the third and fifth pulses can not be extended because their pulse widths are close to the active duration (row addressing time) of the respective row.
  • the width of the fourth pulse can be quadrupled.
  • the present method for controlling matrix displays and a display control set up to carry out the method described above, to which the invention also relates it is thus possible to use a to achieve optimized control of matrix displays.
  • This can be used to increase performance, for example an increased refresh rate, and / or to reduce the operating current required to drive the individual pixels.
  • Significant features are that the row addressing time for each row depends on the maximum brightness that a pixel in that row must reach, and / or the matrix display is broken down into several separate matrices, some of which represent multi or multi-line control.
  • the present invention also relates to a controller for carrying out the above-described method.
  • the claimed method can be implemented in an application-specific IC (ASIC) if, for example, the display controller and the display driver are integrated in one chip.
  • ASIC application-specific IC
  • the generation of t 1 and I 1 happens in the driver.
  • Matrix decomposition is realized with combinational logic that is simple and fast.

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Claims (15)

  1. Procédé de pilotage d'affichages matriciels lumineux ou non lumineux, lesquels sont constitués de plusieurs pixels individuels (ij) formant des lignes (i) et des colonnes (j), les différentes lignes et colonnes étant pilotées sélectivement en ce que les lignes (i) sont activées pour un certain temps d'adressage de ligne (ti) et en ce que les colonnes (j), corrélées à la ligne activée (i), sont soumises en fonction de la luminosité (Dij) désirée dans les pixels (ij) à un courant de service (I) ou à une tension correspondante, une image source (D) étant décomposée en plusieurs matrices d'image (S, M2, M3, M4) qui sont utilisées séparément pour l'excitation de l'affichage matriciel, et plusieurs lignes (i) de l'affichage matriciel pouvant être pilotées simultanément,
    caractérisé en ce que
    une matrice d'image (S) pour l'adaptation individuelle de la luminosité désirée pour chaque pixel (ij), au moyen de laquelle une ligne (i) de l'affichage matriciel est pilotée, et une ou plusieurs matrices d'image (M2, M3, M4), au moyen desquelles plusieurs lignes de l'affichage matriciel sont pilotées, sont combinées ensemble de telle sorte qu'une ligne (i) de l'affichage matriciel est adressée au moyen de différentes matrices d'image (S, M) aussi bien seule que conjointement avec d'autres lignes de l'affichage matriciel.
  2. Procédé selon la revendication 1, caractérisé en ce que le temps total (TFrame) pour l'activation de toutes les lignes (i) dans toutes les matrices est maintenu constant, de telle sorte que la somme (Tsum) des temps d'adressage de ligne (ti) sur toutes les lignes correspond au temps total (TFrame).
  3. Procédé selon la revendication 1 ou 2, caractérisé en ce que le temps d'adressage de ligne (tj) pour chaque ligne (i) est fixé en fonction de la luminosité maximale (Di max) de toutes les colonnes de la ligne (i).
  4. Procédé selon la revendication 1, caractérisé en ce que des lignes voisines (i, i+1) sont pilotées en même temps.
  5. Procédé selon la revendication 1, caractérisé en ce que l'image source (D) est transformée en une matrice organique (d') qui comporte comme entrées des noeuds correspondant aux besoins en différences de luminosité des différents pixels dans la colonne.
  6. Procédé selon la revendication 5, caractérisé en ce que la matrice organique (d') est formée par la différence de deux matrices, la première matrice consistant en l'image source (D) et en une ligne, contenant des entrées zéros, ajoutée à la fin de l'affichage de la matrice (D), et la deuxième matrice en l'image source (D) et en une ligne avec des entrées zéros ajoutée en tête de l'image source (D).
  7. Procédé selon la revendication 5 ou 6, caractérisé en ce que les noeuds sont reliés par des flèches désignées comme arêtes, auxquelles est affectée une occupation, laquelle correspond de préférence en fonction de leur longueur aux entrées des plusieurs matrices (S, M2, M3, M4) pilotées séparément.
  8. Procédé selon la revendication 7, caractérisé en ce qu'à chaque ligne d'une matrice (S, M2, M3, M4) est affectée une capacité variable qui est augmentée jusqu'à ce qu'une affectation valide des arêtes soit atteinte.
  9. Procédé selon l'une quelconque des revendications 8, caractérisé en ce que les capacités qui sont augmentées sont celles qui sont choisies d'après des critères locaux.
  10. Procédé selon la revendication 9, caractérisé en ce qu'un critère local est un « Min-Cut ».
  11. Procédé selon la revendication 9 ou 10, caractérisé en ce que les informations des Min-Cuts précédents sont utilisées conjointement comme critère de choix.
  12. Procédé selon l'une quelconque des revendications 8 à 11, caractérisé en ce que la largeur de pas avec laquelle la valeur de capacité est accrue est adaptée dynamiquement.
  13. Procédé selon l'une quelconque des revendications 5 à 12, caractérisé en ce que l'image source (D) est subdivisée en plusieurs sous-matrices et en ce que les sous-matrices (S, M2, M3, M4) sont décomposées séparément en sous-matrices organiques.
  14. Procédé selon l'une quelconque des revendications 5 à 13, caractérisé en ce qu'une optimisation mixte locale et globale est effectuée, lors de laquelle, à partir d'une sous-matrice organique, une ou un petit nombre de lignes de matrices multilignes (M2, M3, M4) et/ou des matrices (restantes) à ligne unique (S) sont obtenues.
  15. Dispositif pour le pilotage d'affichages matriciels lumineux ou non lumineux, lesquels sont constitués de plusieurs pixels individuels (ij) formant des lignes (i) et des colonnes (j), le dispositif étant configuré pour l'exécution d'un procédé dans lequel les différentes lignes et colonnes sont pilotées sélectivement, en ce que les lignes (i) sont activées pour un certain temps d'adressage de ligne (ti) et les colonnes (j), corrélées à la ligne activée (i) sont soumises en fonction de la luminosité (Dij) désirée dans les pixels (ij) à un courant de service (I) ou à une tension correspondante, une image source (D) étant décomposée en plusieurs matrices d'image (S, M2, M3, M4), qui sont utilisées séparément pour l'excitation de l'affichage matriciel, et plusieurs lignes (i) de l'affichage matriciel pouvant être pilotées simultanément,
    caractérisé en ce que
    une matrice d'image (S) pour l'adaptation individuelle de la luminosité désirée pour chaque pixel (ij), au moyen de laquelle une ligne (i) de l'affichage matriciel est pilotée, et une ou plusieurs matrices d'image (M2, M3, M4), au moyen desquelles plusieurs lignes (i) de l'affichage matriciel sont pilotées, sont combinées ensemble de telle sorte qu'une ligne est adressée au moyen de différentes matrices d'image (S, M) aussi bien seule que conjointement avec d'autres lignes de l'affichage matriciel.
EP06841084.4A 2005-12-30 2006-12-21 Procédé de commande d'afficheurs matriciels Not-in-force EP1966786B1 (fr)

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US8610650B2 (en) 2009-05-20 2013-12-17 Dialog Semiconductor Gmbh Advanced multi line addressing
EP2254108A1 (fr) * 2009-05-20 2010-11-24 Dialog Semiconductor GmbH Commande d'adresse étendue à plusieurs lignes
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EP1966786A1 (fr) 2008-09-10
JP5313687B2 (ja) 2013-10-09
US8456493B2 (en) 2013-06-04
DE102005063159A1 (de) 2007-07-05
WO2007079947A1 (fr) 2007-07-19
CN101366069B (zh) 2012-10-10
US20090195563A1 (en) 2009-08-06
CN101366069A (zh) 2009-02-11
JP2009522590A (ja) 2009-06-11

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