EP1966786B1 - Method for triggering matrix displays - Google Patents

Description

The invention relates to a method for driving matrix displays according to the preamble of claim 1, which are made up of a plurality of lines formed as rows and columns with individual pixels, wherein individual rows are selectively driven by activating lines for a particular Zeilenadressierzeit and the columns correlated to the activated line corresponding to the desired brightness in the pixels with an operating current or a corresponding voltage, ie an electrical signal for driving, be acted upon.

Hereinafter, the horizontal rows are called rows, and the orthogonal vertical rows are columns. This is for easier understanding. However, the invention is not limited to this exact arrangement. In particular, it is possible to interchange the rows and columns in their function or to choose a non-orthogonal relationship between the rows and columns.

The image data or the desired brightness D _{ij of} individual pixels ij are described using the matrix D shown below. $$D=\left(\begin{array}{cccc}{D}_{11}& {\mathrm{<figure-callout\; id="12"\; label="D"\; filenames="imgf0004.png,imgf0006.png"\; state="\{\{state\}\}">D</figure-callout>}}_{12}& ...& {\mathrm{<figure-callout\; id="1"\; label="D"\; filenames="imgf0001.png,imgf0002.png"\; state="\{\{state\}\}">D</figure-callout>}}_{1m}\\ D_{21}& D_{22}& ...& {\mathrm{<figure-callout\; id="2"\; label="D"\; filenames="imgf0001.png,imgf0002.png"\; state="\{\{state\}\}">D</figure-callout>}}_{2m}\\ \mathrm{,}& \mathrm{,}& ...& \mathrm{,}\\ D_{n1}& D_{n2}& ...& D_{nm}\end{array}\right)\mathrm{,}$$

The indices correspond to the positions of the pixels on the display, which is given by the matrix or matrix display D. Each row i of the matrix D and each column j on the matrix D correspond to the geometric line, respectively and column on the display. Each controllable pixel ij of the matrix display D is assigned a pixel diode or the like element for generating a pixel of a display. The time-averaged luminous intensity (corresponding to the brightness D _ij ) in each pixel corresponds to the corresponding element in the matrix D. All entries of the matrix D together form the image to be displayed.

The pixels ij on the matrix display D, each of which may be formed in particular as an OLED (Organic Light Emitting Diode) are activated so far line by line. For this purpose, the OLEDs are activated on a selected line i by a switch, for example by connecting them to ground. In each case an operating current I is impressed in the columns j, which causes the pixels ij to light up at the intersection of this row i and the columns j. The luminous intensity L is in the first approximation proportional to charge, which is impressed during the active phase (Zeilenadressierzeit) and radiant recombined in the OLED pixel. At higher repetition frequency of the addressing of the display matrix or matrix display D, the human eye perceives the following mean value of the intensity L of the light: $$L_{\mathit{light}}~\frac{\underset{0}{\overset{T_{\mathit{frame}}}{\int }}{I}_{\mathit{OLED}}\cdot dt}{T_{\mathit{frame}}}\approx \frac{I\cdot \frac{T_{\mathit{frame}}}{n}}{T_{\mathit{frame}}}=\frac{I}{n}$$

T _frame is the total time required to build a complete image when all n lines of matrix display D are activated once. The operating _current I _OLED or I or I ₀ is impressed in each pixel. In the case of an amplitude modulation for brightness control, the operating current over the time period T _frame / n is active, which corresponds to the row addressing time. In a pulse width modulation, the duration of the operating current is smaller, namely d * T _frame / n. Where d is the pulse width modulation duty cycle and lies between zero and one: $$L_{\mathit{light}}~d\cdot \frac{I_0}{n}$$

The current I ₀ is now constant regardless of the luminous intensity of the pixel. The intensity L is set by means of the duty cycle d. Such brightness control is simpler and more accurate compared to amplitude modulation because the units of time in the electronics can be set very accurately, and consequently d. Only one reference current I _{0 is} sufficient to drive all pixels ij. For amplitude modulation, on the other hand, the amplitude must be adjusted according to the desired brightness D _ij .

By controlling all columns j of only one row i each diode or each pixel ij can be active only a maximum of one nth of the total time T _frame . In order to arrive at a certain average _brightness D _ij , the corresponding operating current thus has to be multiplied by the number n of lines in comparison with the case in which a pixel is supplied with operating current over the total time T _frame . That is, the higher the number of lines, the higher must be the pulsed operating current I or I ₀ . In addition, the operating current in a pulse width modulation for brightness adjustment is always high, even if the pixel to be controlled ij is very dark. In this case, only the turn-on time of the operating current is very short.

However, the high operating current can lead to a significant reduction in the OLED life. In order to achieve the high required operating current, the voltage at the OLEDs must also be increased, whereby the power consumption increases and the efficiency decreases. This increased power dissipation not only discharges the battery or the battery faster, but also makes the display warmer, which also reduces the service life. Nevertheless, in order to realize a large, high-resolution display, as with LCDs (liquid crystal display, liquid crystal display), a so-called "active matrix" could be used, whereby the operating current is no longer supplied pulsed, but is present as a constant current. However, an active-matrix drive (TFT backplane) for an OLED display requires significant additional costs.

A driver for an initially discussed OLED display is in the WO 03/091983 A1 described, which serves to drive passive matrix displays with higher efficiency. For this purpose, an identifier for empty, ie not or not significantly lit, rows of pixels is provided in the driver circuit. Such lines are completely omitted in the control. This increases the brightness of the remaining, driven lines. This effect can also be used to reduce the power to the display in proportion to the number of missed lines. The time with which a line is addressed is always the same. Clare Micronix's MXED301 data sheet identifies a controller for an OLED display that selectively drives specific lines in a partial scan mode of operation and in a screen saver operating mode and does not take into account other lines of the display during control. However, a driven line is scanned at the designated line address time.

From the WO 97/16811 A1 For example, a method for driving an electroluminescent matrix display is known in which two lines are actuated simultaneously, with the exception of the first line, so that each of these lines is driven twice in total. As a result, the luminance per drive of a pixel can be reduced because the pixel is driven twice per drive period in total. With the same current, the luminance can be doubled. The similar discloses the JP 2001-337649A According to which two or more lines with the same image content can be controlled together to increase the average illumination duration of the display.

The EP 1 437 704 A2 discloses a drive for a matrix display in which the drive time for one or more driven line (s) is variably set based on the respective pixel data to increase the peak luminance of the display and reduce black level luminance and thus improve the contrast , To achieve the luminance desired in a pixel, a pulse width and / or amplitude modulation is proposed.

From the post-published WO 2006/035248 A1 For example, a method of multiline addressing is known in which the image data defines an image matrix which is factored into a product of at least a first and a second factor matrix. The first factor matrix defines row drive signals and the second factor matrix defines column drive signals for the display to be driven. The non-negative matrix factorization (NMF) described leads to data compression. The errors for the different color channels can be weighted differently and minimized in this calculation method.

The also nachveröffentlichte WO 2006/035246 A1 describes a similar method for multi-line addressing, according to which groups of first and second column electrodes are driven with different column drive signals to which first and second groups of row electrodes are assigned, each driven simultaneously with the first and second groups of column electrodes. The determination of the matrices takes place with the above-described factorization.

In further development of the technology described above, which also post-published WO 2007/023251 A1 for which the national phase has not been initiated and which therefore does not constitute state of the art, the use of variable row addressing times within the meaning of EP 1 437 704 A2 also in multiline addressing, whose matrices are again obtained by factoring.

Object of the present invention is to propose a method for driving matrix displays according to the type mentioned, with which increases the life of OLED display or the performance of any matrix display can be improved.

This object is achieved with the features of claims 1 and 15. The row addressing time is set t _i for each row i as a function of the maximum brightness D ⁱ _{max of} all columns j of row i. As a result, the row addressing time t _i can be chosen to be less than or equal to a constant row addressing time t _L , which results if each row of the matrix display is addressed so long that a maximum pixel brightness D _max could be achieved with the impressed operating current. The inventive row addressing time t _i thus corresponds to the constant row addressing time t _L multiplied by the ratio of the maximum brightness D ⁱ _{max of} the pixels in all columns j of the row i to the maximum possible pixel brightness D _max in the entire matrix display.

The maximum pixel brightness D _max is defined as the luminous intensity (brightness) in a pixel ij which is reached when the operating current I _{0 is} applied to the pixel during the constant row addressing time t _L. It follows that the time sum T _{Sum of} the times addressing times t _i over the number n of all lines is less than or equal to the total time T _frame for activating all n lines, which is given by n times the constant Zeilenadressierzeit t _L. At constant operating current I ₀ , therefore, the total time for driving the matrix display according to the invention on the time sum T _Sum <T _frame of Line addressing times are reduced. This allows, for example, a higher refresh rate and thus increases the achievable performance of a matrix display.

Since the luminous intensity of a pixel ij is, to a first approximation, proportional to the charge impressed into a pixel ij, ie, proportional to the product of row addressing time t _i and operating current, the dependence of the row addressing time t _i on the maximum brightness across the columns a line can also be used to reduce the operating current. For this purpose, the total time T _frame for activating all lines i can be kept constant, so that the sum of the line addressing times t ' _i over all lines n corresponds to the total time T _frame . The Zeilenadressierzeiten t ' _i are thus extended accordingly according to this variant of the method according to the invention, so that their sum is equal to the total time T _frame . Simultaneously, according to the invention, the operating current I ₀ to the ratio of the time sum T _Sum of (necessarily required) row addressing times t _i of all the lines n to the total time (T _frame) for the activation of all the lines with constant row addressing time t _L are lowered to the operating current I. ₁ The luminous intensity of the individual pixels does not change because the product of the row addressing time and the operating current t _i * I ₀ = t ' _i * I ₁ remains constant. In the case of OLEDs, the quantum efficiency η in the region of a lower operating current is generally greater than at a higher operating current. Therefore, the operating current I _{1 can be} additionally reduced by the ratio of the quantum efficiencies η (I ₁ ) / η (I ₀ ). Hereinbelow, the line addressing time t ' _i (normalized to T _frame ) is also referred to as t _{i for} the sake of simplicity.

By the inventive adaptation of the row _i t for addressing the diode pixels so can the selective phase (row addressing) of the individual diode pixels ij of the display D, that is the time during which the diode pixels ij is supplied with the operating current 1, are markedly prolonged. The active operating current I ₁ can be inversely proportional to the duration of selected phase can be reduced. Thus, the efficiency of the matrix display D can be increased overall and in particular in OLED displays, the lifetime can be extended. A basic idea of this invention is therefore to extend the duration of the operating current by a line-dependent shortening or adaptation of the Zeilenadressierzeiten. Since the charge is primarily decisive for a specific luminous intensity, more time for imprinting the operating current thus means a lower current in the amplitude.

An improved handling and a further reduction of the operating current is achieved according to the invention by dividing the matrix display D into a plurality of matrices S, M, which are controlled separately. The superimposition of all matrices then generates the image of the matrix display D in the desired brightness D _{ij of} the respective pixels ij. It should match the sum of the individual brightnesses S _ij, M _jj overall brightness formed a plurality of arrays D _ij of the total desired brightness D _ij of the matrix display D in the pixel ij. According to the invention, the matrices can be successively nested or interleaved, preferably in each case using the method described above, in rows and columns. In the case of a division into two matrices, wherein a matrix S provides the control of a row i and a matrix M2 a simultaneous control of two rows i, the rows of the matrices S, M2 can be addressed alternately. For passive matrix display types, such as OLED displays or LCD, a source image, which is described in the matrix display D, can thus be decomposed into a plurality of image matrices. Each of these matrices obtained for the display type, for example, by the multi-line addressing described below to implement well, so that the sum of the images is better implemented than in a direct control of the display based on the original matrix D.

Furthermore, according to the invention it is provided that a plurality of lines i are controlled simultaneously. The pixels ij in each column have j of the driven lines i in each case the same signal and the same light intensity. In order that the luminous intensity of a pixel ij of the luminous intensity when driving corresponds to only one line i, the operating current I ₀ , I _{1 is} increased by a multiple corresponding to the number of simultaneously driven lines, thus doubling with simultaneous control of two lines. The simultaneous control of several lines is also called "multi-line addressing" (MLA), in contrast to the control of only one line, which is also referred to as "single-line addressing" (SLA).

In a simultaneous control of multiple lines preferably adjacent lines can be controlled. However, according to the invention, it is also possible for rows i, which are preferably separated by a few rows, to be controlled simultaneously, for example, every row after the second. A close proximity of simultaneously driven lines is therefore particularly useful because in an image adjacent lines of the matrix display D often have a similar brightness distribution.

In order to be able to generate intensity differences between the individual rows and / or columns in the case of a plurality of simultaneously controlled lines, a matrix (S) in which one row (i) is driven and one or more matrices (M2, M3, M4 ), in which several lines (i) are controlled, combined. By providing a matrix S with a single-line addressing, the desired brightness D _ij can be individually adapted for each pixel ij. This matrix S is also called residual single-line matrix.

According to the invention, a pulse width modulation can be used for the brightness control, that is, for example, the application of the operating current I during a Zeilenadressierzeit t _i only for a portion of the Zeilenadressierzeit t _i and the operating current I in the remaining time of the Zeilenadressierzeit t _{i is} turned off. follows and the operating current _{I is} switched off in the remaining time of the row addressing time t _i .

Alternatively, an amplitude modulation can also be used for the brightness control, ie the amplitude of the operating current I can be adjusted in accordance with the desired brightness D _ij . According to the invention, the pulse width modulation and the amplitude modulation for brightness control can also be combined with each other. Then it is particularly advantageous if the brightness D _{ij is given} in quantized steps, because the amplitude of the operating current can then be reduced in quantized steps, while the pulse width duty cycle is correspondingly increased. This control is also device technology particularly easy to implement. This combined method can be used flexibly, in particular, if the time for switching on the operating current I in a column j after an increase in the pulse width duty cycle does not exceed the row addressing time t _i . Thus, the decision of a combination of the amplitude modulation with the pulse width modulation depending on the required operating current Aufschaltzeit and the intended Zeilenadressierzeit for each row i and column j of the matrix display D done individually. In the combined pulse width and amplitude modulation, the amplitude can thus be reduced with quantized steps, while the pulse width modulation duty cycle is increased accordingly. The implementation of the quantization can be done with multiple transistor cells, with which the multi-line addressing can be implemented.

In order to generate the matrices used to drive the matrix pixels, it is proposed according to a preferred embodiment to convert the matrix display into a flow matrix having as entries nodes which correspond to the demand for brightness or brightness differences of individual pixels in the respective columns. This can be done with a suitable control, in which the method described above is implemented and which has suitable computing means to carry out the individual method steps. Such a control is also the subject of the present invention. This transformation allows the matrix decomposition to be carried out using a combinatorial method based on the well-known MaxFlow / Min-Cut principle. The hardware implementation effort for such combinatorial algorithms is known to be low. In addition, combinatorial algorithms can be processed quickly, so that these algorithms are particularly suitable for controlling a matrix display.

It has proved to be advantageous if the flux matrix is mapped from the difference between two matrices, the first matrix consisting of the matrix display and a row with zero entries appended to the end of the matrix display and the second matrix of the matrix display and a row preceding the matrix display consist of zero entries. In a matrix decomposition in multi-line matrices and (residual) single-line matrix, it is crucial to optimally cover the brightness differences of individual pixels on the column. The flux matrix proposed according to the invention describes the differences between the pixels in the column and provides the basis or an optimal starting point for the optimization with a combinatorial method.

In a flow matrix according to the present invention, the nodes are preferably connected by arrows designated as edges, to which an assignment is assigned, which preferably corresponds to the entries of the several, separately controlled matrices (for example S, M2, M3, M4) according to their length. correspond, in which the matrix display can be decomposed as described above. This completely transforms the matrix decomposition into a flow optimization. The result of the flux optimization, ie the edge assignments, are then directly the corresponding matrix elements of the single and multi-line matrices S, M2, M3, M4 etc.

For flow optimization, in particular in the activation of a passive matrix display, it is advantageous to associate a capacity or a capacitance value for each row of the matrices involved (S, M2, M3, M4). The capacitance value corresponds to the maximum of the pixel values of the respective row. The sum of all capacities should then be minimized.

While in known min-cut methods or max-flow methods, the capacity is kept constant and the flow is maximized, the flow in this method is derived from the source matrix (matrix display D) and thus predetermined. The goal of optimization is to minimize the sum of all capacities. Therefore, the capacity is inventively made variable. Capacities are increased according to a strategy described later until all rivers are balanced. Then a valid assignment of the edges is achieved and the matrix decomposition is completed. It can be assumed that the sum of the capacitance values is minimal or very small. The quality of the optimization is the ratio between the theoretical minimum and the sum of the capacitance values. In order to reduce the number of necessary iterations when increasing the capacitance values, an initialization can be used to generate an assignment of the edges as start value.

According to the invention, in each iteration those capacities are selected and increased which represent a bottleneck which prevents a valid solution. This amount of edges, also called minimum cut (min-cut), can be used as a selection criterion for the capacities to be increased.

In addition, according to the invention, the information of preceding min-cuts can be used as a selection criterion, whereby a weighting of the min-cuts of the last iterations can take place. This allows a fast or efficient solution.

To speed up the iteration, the step size with which the capacity value is increased can be adapted dynamically. This ensures that fewer iterations need to be performed without losing much optimization quality over the smallest increment of "one".

To increase the computational speed and reduce the required memory space requirement, the matrix display can be divided into a plurality of smaller sub-matrices and the sub-matrices separated into sub-flow matrices. Such optimization is considered to be local optimization, while matrix decomposition in a single optimization is considered to be global optimization. Since smaller iterations require much fewer iterations, it is also possible to pass the results of S, M2, M3, M4, etc., line by line to the registers for the output driver, without requiring any cache for these matrices. Thus, the storage cost is significantly lower.

Furthermore, a mixed local and global optimization can be carried out according to the invention, one or a few rows of multi-line matrices (M2, M3, M4) and / or residual single-line matrices (S) being selected from a sub-flow matrix. be won. This achieves a good compromise between local and global optimization, namely speed and space requirements on one side and optimization quality on the other. The results are output line by line or submatrix, so that there is no memory requirement for the storage of complete matrices.

Preferred applications of the method result for the control of self-illuminating displays, for example OLED displays, or non-self-illuminating displays, for example LCDs. Another, inventive application of the method, which is not directed to the control of matrix displays, but refers generally to the reading of matrices, for example sensor matrices in CCD cameras.

Further advantages, features and applications of the present invention will become apparent from the following description of exemplary embodiments and the drawings. All described and / or illustrated features form the subject of the present invention, regardless of their summary in the claims or their back references.

Fig. 1

schematisch verschiedene Ausführungsformen der Ansteuerung einer Matrixanzeige gemäß der vorliegenden Erfindung zur an-schaulichen Erläuterung der Single-Line- und der Multi-LineAdressierung;

Fig. 2

schematisch Zeitdiagramme des Betriebsstroms (oder der zugehörenden Spannung) zur Ansteuerung der Pixel einer Spalte der in Fig. 1 dargestellten Matrixanzeige;

Fig. 3

eine Matrixanzeige D aus drei Spalten und fünf Zeilen und den zur Ansteuerung einer Spalte benötigten Strom;

Fig. 4

Ersatzschaltung einer Matrixanzeige mit m Spalten (C_m) und n Zeilen (R_n);

Fig. 5

eine Definition von Singe- und Multi-Line-Matrizen;

Fig. 6

eine erfindungsgemäße Zerlegung einer Matrixanzeige D in eine Zwei-Line-Matrix und eine Single-Line-Matrix;

Fig. 7

eine erfindungsgemäße Zerlegung einer der in Fig. 6 gezeigten Matrixanzeige D in eine Drei-Line-, eine Zwei-Line- und eine Single-Line-Matrix;

Fig. 8

Spannungs- und Stromverläufe für ausgewählte Reihen von Matrizen gemäß Fig. 6;

Fig. 9

eine Zerlegung der Matrix D in eine Fluss-Matrix d';

Fig. 10

ein Flussdiagramm der Fluss-Matrix d' gemäß Fig. 9;

Fig. 11

ein konkretes Beispiel der in die Flussmatrix d' überführte Matrix D gemäß Fig. 6;

Fig. 12

ein Flussdiagramm der Fluss-Matrix d' gemäß Fig. 11 in einem ersten Optimierungsschritt;

Fig. 13

ein Flussdiagramm der Fluss-Matrix d' gemäß Fig. 11 nach dem Optimierungsschritt;

Fig. 14

einen mathematischen Ablaufplan zum Erstellen der Fluss-Matrix d' und eines optimierten Flussdiagramms;

Fig. 15

eine erfindungsgemäße Ausführungsform zur Erzeugung des Betriebsstroms;

Fig. 16

eine Helligkeitssteuerung durch eine Pulsweitenmodulation;

Fig. 17

eine Helligkeitssteuerung durch eine kombinierte Amplituden- und Pulsweitenmodulation und Fig. 18;

Fig. 18

einen Algorithmus zur Durchführung einer Helligkeitssteuerung gemäß Fig. 17.

Show it:

Fig. 1

schematically various embodiments of the control of a matrix display according to the present invention for an illustrative explanation of single-line and multi-line addressing;

Fig. 2

schematically time diagrams of the operating current (or the associated voltage) for driving the pixels of a column of in Fig. 1 displayed matrix display;

Fig. 3

a matrix display D of three columns and five rows and the current required to drive a column;

Fig. 4

Equivalent circuit of a matrix display with m columns (C _m ) and n rows (R _n );

Fig. 5

a definition of singleton and multi-line matrices;

Fig. 6

a decomposition of a matrix display D into a two-line matrix and a single-line matrix according to the invention;

Fig. 7

a decomposition of one of the in Fig. 6 shown matrix display D in a three-line, a two-line and a single-line matrix;

Fig. 8

Voltage and current curves for selected rows of matrices according to Fig. 6 ;

Fig. 9

a decomposition of the matrix D into a flow matrix d ';

Fig. 10

a flowchart of the flow matrix d 'according to Fig. 9 ;

Fig. 11

a concrete example of the converted into the flow matrix d 'matrix D according to Fig. 6 ;

Fig. 12

a flowchart of the flow matrix d 'according to Fig. 11 in a first optimization step;

Fig. 13

a flowchart of the flow matrix d 'according to Fig. 11 after the optimization step;

Fig. 14

a mathematical flowchart for creating the flow matrix d 'and an optimized flowchart;

Fig. 15

an embodiment of the invention for generating the operating current;

Fig. 16

a brightness control by a pulse width modulation;

Fig. 17

a brightness control by a combined amplitude and pulse width modulation and Fig. 18 ;

Fig. 18

an algorithm for performing a brightness control according to Fig. 17 ,

Fig. 1 schematically illustrates a matrix display D, which is composed of four rows i and four columns j. Accordingly, the matrix display D has a total of sixteen pixels ij, which should have the brightness D _ij . Each pixel ij is represented by a rectangle in which the digital brightness value D _{ij is entered} as a number. The brightness value "0" stands for a dark pixel ij, the brightness value "1" stands for a weak luminous pixel ij and the brightness value "2" stands for a bright luminous pixel.

Therefore shows Fig. 1a a matrix display D showing a cross with a half-dark center in the pixel ij = 23 and four bright pixels at its edges. In the conventional single-line addressing (SLA), the matrix display D is activated in such a way that lines one to four are activated in succession for a constant line addressing time t _L , which are given in units of any value "1". During the activation of the first line, the third column is supplied with an operating current I which deposits a charge corresponding to the desired brightness "2" in the pixel ij = 13. After a row addressing time of t _L = 1, the system switches over to the second line. In this second row, the columns two and four are simultaneously supplied with an operating current I corresponding to the brightness "2" and the column three are supplied with an operating current I corresponding to the brightness "1". An analogous behavior results in the case of a non-self-luminous display for the voltage applied to the individual columns for the control voltage. A typical application are LCDs (Liquid Crystal Display).

After a further line addressing time tL = 1, the third line is driven analogously to the first line. Finally, for a further row addressing time t _L = 1, the fourth row is activated, but completely dark, ie that during the selected phase of the fourth row (row addressing time for the fourth row), none of the columns one through four have a pixel ij with an operating current is charged.

After a total time T _frame = 4 * t _L , all the pixels ij of the image matrix D were driven once. The human eye integrates the successively illuminated pixels ij into an overall image.

This conventional method for driving a matrix display D by means of a single-line addressing is inventively as in Fig. 1b is modified in such a way that the row addressing time t _i for each row i is determined as a function of the maximum brightness D ⁱ _{max of} all pixels on the crossing points of all columns j with the row i. This method is also referred to below as "Improved Single-Line Addressing" (ISLA). The row addressing time t _i is dimensioned such that the sum T _{sum of} the row addressing times t _i over all four lines corresponds to the total time T _frame = 4 * t _L.

When dimensioning the row addressing times t _{i, the procedure} may be as follows. The maximum brightness D ⁱ _{max of} all columns is "2" for the first three lines, so that the row addressing time t _i must be the same for each of these first three lines. In the fourth line, the maximum brightness is "0", so that this line does not have to be driven at all and t _i = 0 can be selected. The total time T _frame = 4 * t _L can therefore be divided into three Zeilenadressierzeiten t _i , so that t _i for the lines one to three can be selected by one third longer than the constant Zeilenadressierzeit t _L , ie $$t_i=\frac{4}{3}\cdot t_L\mathrm{,}$$

The first three lines can be activated by one third longer than in the activation according to Fig. 1a , Since the luminous intensity in an OLED display depends on the charge impressed on the OLEDs, which results from the product of the applied operating current with the row addressing time, the operating current can be correspondingly reduced by a quarter in order to arrive at the same integrated brightness value D _ij ie $$I_1=\frac{4}{3}\cdot I_O$$

Thus, the product of t _L and I _{0 is} equal to the product of t _i and I ₁ . This is clear also the comparison of the two Fig. 2a and 2b refer to. The illustrations in Fig. 2 show the third column Fig. 1 over all lines one to four acted upon operating current or the proportional operating voltage. Plotted are the applied current (or the corresponding applied voltage) during the Zeilenadressierzeit. As Fig. 2a The width of a displayed box corresponds to the constant row addressing time t _L , which has been used as the normalization quantity in the example described above. A box thus corresponds to the activation time of a line. The total width consisting of four boxes corresponds to the total time T _frame , within which an image of the matrix display can be completely built up.

In Fig. 2a the current profile in the known single-line addressing is described. In the first line, the current corresponding to the desired brightness value "2" is maximum. For clarification, the associated drive pulse (Current x time) for the pixel in the crossing point of the third column hatched with the first line. This also applies to the other representations of Fig. 2b) and 2c ). In the second line with the brightness value "1" the current is halved. In the third line the current is maximum again to reach the brightness value "2". For the last line with the pixel off, the power is off. This type of control corresponds to an amplitude modulation.

In Fig. 2b the current profile for the improved single-line addressing according to the invention is shown. As described, the Zeilenadressierzeiten t _{i have been extended} accordingly by one third. This is shown by the dashed lines. The fourth line is not activated at all. The brightness of a pixel ij is proportional to the impressed amount of charge which is determined by the time-integrated current (operating current). As Fig. 2b it can be seen that the area under the current curve is in Fig. 2b equal to the area under the current curve in Fig. 2a although the current (respectively the applied voltage) could each be reduced by a quarter. This is advantageous for the life of OLEDs.

Regarding Fig. 1c Another embodiment of the present invention will be described. In this method of control, several lines are controlled simultaneously (multi-line addressing). In the present example, these are lines one and three, in each of which a pixel with the brightness "2" must be generated in the third column (cf. Fig. 1 a) , Since two lines have been combined, the line address time can be doubled. Accordingly, the operating current (or the corresponding voltage) per pixel is halved (cf. Fig. 2c for one pixel).

As in Fig. 1d it is particularly advantageous in relation to Fig. 1c described method of multi-line addressing with the Improved single-line addressing corresponding Fig. 1b to combine. This makes it possible to generate any images in a multi-line addressing, since all activated lines are controlled identically in the multi-line addressing. Remaining differences and / or remaining lines can then be compensated by the Improved Single-Line-Addressing (MISLA).

So will in Fig. 1d the second line according to Fig. 1a generated by a separate control of a second matrix. This corresponds to a decomposition of the matrix display D into a plurality of matrices, which are controlled separately and produce the desired image of the matrix display D in the sum. The control takes place in such a fast time clock that the human eye can not separate the sequential controls of the respective rows and / or matrices and composed to form a complete picture. Therefore, even when driven by multiple matrices, the total time T _frame required to fully construct an image should not be extended. It is an advantageous procedure to keep the total time T _frame for activating all the lines to be controlled constant in all matrices and to adapt the respective line addressing times t _i accordingly. Here, the row addressing time t _i be for one line quite different than those for a different row, depending on the maximum brightness of the columns in the respective row. However, this case does not occur in the example currently described.

For the combination of matrices according to Fig. 1c and Fig. 1d the following procedure results. For the control, exactly one row addressing time is required per matrix. The thereby to be achieved maximum brightnesses D _ij are the same. As a result, two equal row addressing times t _i = 2 * t _{L are} needed to arrive at a total time T _Frame = 4 * t _L. According to the doubling of the row addressing time compared to the single-line addressing according to Fig. 1c Thus, the operating current or the voltage for each individual pixel ij can be halved, wherein in the two-line addressing (Two-line addressing) must be considered that the column-wise control corresponds to several lines in the circuit realization of a parallel circuit and the applied operating current is therefore distributed evenly to the pixels of all activated lines. In the case of a two-line addressing in a matrix, the switched-on operating current must therefore be doubled so that the same operating current is available at each pixel.

The current distribution for the combined control according to Fig. 1c and 1d is Fig. 2c and shows a further reduction of the maximum operating current without loss of brightness in the matrix display D.

That on the basis of Fig. 1 and 2 described driving method is compared to the practical application greatly simplified execution and serves to explain the underlying idea. According to the invention, this process can also advantageously be combined with elements of conventional or known processes, for example in conjunction with precharge and discharge techniques or the like.

In the following, a more complex example for the control of matrix displays will be described, wherein all of the described features are the subject of and part of the invention.

The starting point of the description is the properties of a matrix display D, which is shown in FIG Fig. 3 is shown. The brightness D _{ij of} a matrix display can be given in digital values, where the value "0" describes a switched-off pixel. The maximum brightness in the matrix is D _max (eg: value "255" for 8-bit). The corresponding operating current is I ₀ . The height of I ₀ is specified or set by the application. It represents the desired brightness of the display.

According to the prior art prior art SLA method (single-line addressing), each row within a frame period (total time T _frame ) is assigned an identical, fixed or constant row addressing time t _L , in which the maximum brightness D _max can be generated. For exactly one bit of brightness, there is a corresponding time clock t ₀ . $${\mathrm{<figure-callout\; id="0"\; label="t"\; filenames="imgf0001.png,imgf0002.png"\; state="\{\{state\}\}">t</figure-callout>}}_0=\frac{t_{\mathit{L}}}{D_{\mathrm{Max}}}=\frac{T_{\mathit{frame}}}{n\cdot D_{\mathrm{Max}}}$$

A certain brightness is converted in a brightness control by means of a pulse width modulation (PWM) in a number of clocks t ₀ . For maximum brightness flows for the row addressing time of t _i = D _max * t _0, the operating current I _0th

wobei $$D_{\mathit{Sum}}={\displaystyle \sum _{i=1}^n}\max \left(D_{i1},D_{i2},\dots D_{im}\right)\le n\cdot D_{\max }$$

die Summe der maximalen Helligkeiten Dⁱ _max einer Zeile über alle Zeilen ist. Dⁱ _max ist also die größte Helligkeit aller Spalten in der Zeile i.In the present invention, the necessary selection duration of a line, ie the row addressing time t _i selected for this line, is determined by the maximum brightness D _{ij of} all the pixels ij in the selected line i. If the maximum brightness in this line is less than D _max , the next line can be activated earlier, ie the selected line addressing time t _i may be shorter than t _L. The total time required to build an image is thus: $$T_{\mathit{Sum}}=D_{\mathit{Sum}}\cdot {\mathrm{<figure-callout\; id="0"\; label="t"\; filenames="imgf0001.png,imgf0002.png"\; state="\{\{state\}\}">t</figure-callout>}}_0\le T_{\mathit{frame}}.$$

in which $$D_{\mathit{Sum}}={\displaystyle \underset{i=1}{\overset{n}{\Sigma }}}\mathrm{Max}\left(D_{i1}.D_{i2}....D_{im}\right)\le n\cdot D_{\mathrm{Max}}$$

the sum of the maximum magnitudes D ^{i is} _max one line across all lines. D ⁱ _max is thus the highest brightness of all columns in line i.

This time T _Sum is less than or equal to the total time T _frame and can be extended to T _frame by reducing the operating current I ₀ to the operating current I ₁ . The operating current I ₁ , which is adapted to the desired brightness; results from: $$I_1=\frac{T_{\mathit{Sum}}}{T_{\mathit{frame}}}\cdot I_0=\frac{D_{\mathit{Sum}}}{n\cdot D_{\mathrm{Max}}}\cdot I_0\mathrm{,}$$

The reduced operating current I ₁ is thus achieved in that the active or selected phase of a line (Zeilenadressierzeit t _i ) is not fixed to t _L. Instead, each row i remains active only as long as it requires the brightest pixel ij with the brightness D ⁱ _max on that row. When the required time for the brightest pixel is reached, the system switches to the next line immediately.

With this time-optimized control method, the operating current I ₁ and the timing for the row addressing t _{i are} variable according to the invention. The operating current is reduced to I ₁ and the timing for exactly one bit of brightness (LSB, least significant bit) increased from t ₀ to t ₁ : $${\mathrm{<figure-callout\; id="1"\; label="t"\; filenames="imgf0001.png,imgf0002.png"\; state="\{\{state\}\}">t</figure-callout>}}_1=\frac{T_{\mathit{frame}}}{D_{\mathit{Sum}}}$$

A simple example for this is in Fig. 3 illustrated. The image of the matrix display in Fig. 3a becomes appropriate Fig. 1 described with the matrix D, which contains the brightness values D _ij at the individual pixel positions ij.

The matrix D represents three bright stripes, each with an intermediate dark stripe, for the sake of simplicity gray levels up to 3 bits, ie a maximum brightness of D _max = 7, are assumed. Overall, the matrix display D thus contains five rows and three columns.

In the Fig. 3b) and 3c ) shows the time course of the (operating) current impressed into the second column. Fig. 3b ) represents the current profile in a conventional single-line addressing (SLA), which in Fig. 3c ) is contrasted with the time course of the inventive Improved Single Line Addressing (ISLA).

While in single-line addressing ( Fig. 3b ) the current amplitude is, for example, constant at 70 μA and each line is activated with a constant line addressing time t _L of 2.8 msec, in the case of the improved single-line addressing (FIG. Fig. 3c ) the current amplitude 40 μA. The first, third and fifth lines are respectively active for a time (line addressing time t _i ) of 4.2 msec and the second and fourth lines for a time (line addressing time t _i ) of 0.7 msec.

η(I) ist die Quanteneffizienz bei dem Strom I in der Einheit Cd/A. Der Verlauf der Quanteneffizienz wird in einer Gamma-Tabelle abgespeichert und kann durch eine erfindungsgemäße Ansteuerelektronik, welche das beschriebene Verfahren umsetzt, für die obige Berechnung herangezogen werden.The operating current I ₁ used for driving the entire matrix D in the same way and the timing t ₁ for exactly one bit of brightness are now dependent on the respective image to be displayed. Since the diode current is quite high in the case of passive matrix OLEDs due to the multiplex method, the quantum efficiency or the luminous intensity per current unit is relatively low. With reduced operating current, the quantum efficiency increases, which can lead to a further reduced operating current: $$I_1=\frac{D_{\mathit{Sum}}}{n\cdot D_{\mathrm{Max}}}\cdot I_0\cdot \frac{\eta \left(I_0\right)}{\eta \left(I_1\right)}$$

η (I) is the quantum efficiency at the current I in the unit Cd / A. The course of the quantum efficiency is stored in a gamma table and can be used for the above calculation by an inventive control electronics, which implements the described method.

Since the operating current I ₁ is reduced compared to a known control, the forward voltage of the OLED diodes also decreases. As a result, the efficiency increases with the unit Lm / W, since the consumed energy is equal to the integration of the product of current and voltage over the frame period. The achieved higher efficiency also means less self-heating of the display, which leads to an increase in the display life.

The implementation effort is low because the operating current I ₁ for the display only needs to be set once and a time t _{i is} easy to implement.

In the above-described variant of the control, the sum D _{Sum of} the maximum brightnesses D ⁱ _{max of} a line is a predetermined, unchangeable variable. If several lines are combined and controlled in one matrix at the same time, there is the possibility to minimize or reduce D _Sum . During a line addressing time t _i , several lines are then selected at the same time, so that the total time required to drive the entire picture matrix can be reduced as a whole. Thus, the operating current can be further reduced.

In Fig. 4 is circuitically illustrated how two lines Ri and Ri + 1 are addressed simultaneously. The impressed column current is now 2 * I ₁ and is distributed equally to the two diodes of the individual rows Ri and Ri + 1. The diodes on the remaining lines are passive and are only shown with the parasitic capacitance C _p . The luminous intensities are the same at the respective diodes of a column in the simultaneously driven lines because they are each acted upon by the same current. Therefore, compared to single-line addressing, only one row addressing time t _{i is} needed for the two lines to produce the same brightness in the driven pixels.

This approach is also true if more than two lines are addressed simultaneously. The time savings are greater the more rows are combined. This is then a multi-line addressing.

The combination of several lines, however, is not readily possible because now several pixels of a column are driven the same in several lines. There is no difference in brightness between these pixels, so that differential information is lost or the resolution is reduced.

wobei M2 die Matrix für eine Zwei-Zeilen-Adressierung ist. Die Matrix S wird auch als Rest-Single-Line-Matrix bezeichnet. Der grundsätzliche Aufbau ist der Matrizen ist Fig. 5 zu entnehmen.This problem is solved by combining the multi-line addressing (MLA) with the optimized optimized single-line addressing (ISLA) described above by breaking the desired matrix display D into several matrices. That is, a row in different matrices S, M is addressed both alone and with other rows. The difference in the luminous intensity between the pixels in the different lines of the respective column, which are jointly controlled in the multi-line addressing, is realized by the improved single-line addressing with the matrix S. The multi-line addressing should minimize the required total time T _Sum . The conversion of a matrix display D into a single-line matrix S and a multi-line matrix M is represented mathematically as follows. $$D=S+M2.$$

where M2 is the matrix for two-line addressing. The matrix S is also called a residual single-line matrix. The basic structure is the matrices Fig. 5 refer to.

The source data for the individual pixel brightnesses D _{ij of} the matrix display D, which are assembled into the desired image, are decomposed into two matrices S and M2. S is the single-line matrix, which is controlled by the improved single-line addressing. M2 is the multi-line matrix, for the control of which two lines are combined and addressed or activated together. The representation of M2 in n-1 matrices, where n is the number of rows of the matrix display D, shows that for each of these matrices M, two rows are combined since the entries in the two rows are identical. The merging of two lines is preferably done for two consecutive lines, because it is assumed that successive lines of an image have the greatest similarities and the distribution of the two-fold operating currents in two pixels is most homogeneous in successive lines of a real display. In addition, mathematical decomposition is easier for this constraint than when two arbitrary rows are combined. The implementation of the algorithms is then of less effort and will be described in more detail below in an implementation according to the invention.

Of course, depending on the application, not adjacent rows can be summarized. For example. With the combination of two lines separated by an intermediate line, checkerboard patterns can be mapped very well with the multi-line addressing.

wobei max(S_il,...S_im) und max(M2_il, ..., M2_im) jeweils die maximale Helligkeit einer Zeile angeben, die proportional zu der jeweiligen Zeilenadressierzeit t_i ist.The Zeilenadressierzeit t _i , which gets every "two-line" for the activation, depends analogously to the above-described realization of the maximum brightness Mij of a pixel in this two-line. The time-optimized control method, which has already been described for single-line addressing, is also used here. The sum of the row addressing times is thus as follows: $$T_{\mathit{Sum}}\square {\displaystyle \underset{i=1}{\overset{n}{\Sigma }}}\mathrm{Max}\left(S_{i1}.S_{i1}....S_{\mathit{in\; the}}\right)+{\displaystyle \underset{i=1}{\overset{n-1}{\Sigma }}}\mathrm{Max}\left({M2}_{i1}.{M2}_{i1}....{M2}_{\mathit{in\; the}}\right)=D_{\mathit{Sum}}.$$

where max (S _il , ... S _im ) and max (M2 _il , ..., M2 _im ) respectively indicate the maximum brightness of a line which is proportional to the respective row addressing time t _i .

The goal of decomposing into multiple matrices is a further reduction of the operating current I ₁ , ie a minimization of D _Sum . This is achieved by each brightness M2 _{ij of} the multi-line matrix M2 reducing two elements in the single-line matrix, namely S _ij and S _{i + lj} by the amount M2 _ij from the original _data D _ij and D _{i + lj} , However, only one row addressing time t _{i is} required, namely the time for the addressing of M2 _ij . With several lines the effect is correspondingly higher.

definiert, wobei M3 eine gleichzeitige Ansteuerung von drei Zeilen beschreibt (vgl. Fig. 5). Eine gleichzeitige Adressierung von noch mehr Zeilen geschieht entsprechend.The transformation of the source data (matrix display D) into several multi-line matrices is analogous $$D=S+M2+M3+...$$

defined, where M3 describes a simultaneous control of three lines (see. Fig. 5 ). A simultaneous addressing of even more lines happens accordingly.

in welcher die Matrix M3 mit Null belegt wird. Die Single-Line-Adressierung kann auch so interpretiert werden, dass alle Elemente der Multi-Line-Matrizen Mx mit Null belegt sind.It is also possible to omit some multi-line matrices, for example according to the definition $$D=S+M2+M4.$$

in which the matrix M3 is zeroed. The single-line addressing can also be interpreted so that all elements of the multi-line matrices Mx are assigned zero.

The idea of dividing an image or image matrix D into several images or image matrices S, M, which are easier to control, can be used for all matrix display types, including LCD and plasma displays. The multi-line matrix is a good example of simple and efficient control.

The following describes a complete multi-line addressing including a single-line addressing on a concrete example. The goal of the transformations is the minimization of D _Sum . The result is that the operating current is no longer I ₀ , but (depending on the image) can become significantly smaller: $$I_1=\frac{D_{\mathit{Sum}}}{n\cdot D_{\mathrm{Max}}}\cdot I_0$$

At the in Fig. 6 As illustrated, a 4X9 matrix D is decomposed into two matrices M2 and S. The number of lines of this matrix D is n = 9. D _max should have the brightness value "15" (4 bit).

The first matrix in Fig. 6 indicates the desired brightnesses D _{ij of} the matrix display D. The second matrix is two-line matrix M2 and the third is the residual single-line matrix S. M2 is again shown separately, the sum representation is shown how the brightnesses are distributed to two adjacent lines with simultaneous addressing. D _Sum , ie sum of the maximum brightnesses of simultaneously activated lines, is D _Sum = 72 when using the two-line matrix. If only the Improved Single-Line addressing is used, D _Sum = 107. Compared to n * D _max = 9 * 15 = 135 Thus, the required operating current is reduced by applying the two-line matrix to 53% of the conventional driving method.

If a three-line matrix addressing M3 accordingly Fig. 7 is used, D _Sum can be further reduced. The first matrix according to Fig. 7 is equal to the source matrix Fig. 6 and represents the desired brightness D _{ij of} the matrix display D. The second matrix is the three-line matrix M3, the third matrix is the two-line matrix M2 and the fourth is the residual single-line matrix S. D _Sum in this case further reduces to 58. Compared with n * D _max = 135 a reduction of the operating current amplitude by 57% is achieved.

In Fig. 8 are the voltage curve of the eighth row, the current and voltage curve of the second column and the voltage at a diode (D ₈₂ ) for the two-line addressing according to Fig. 6 shown.

In the example shown, the operating current I ₀ for conventional single-line addressing is 100 μA. Corresponding to the reduction to 53%, the operating current when driving one line is therefore I ₁ = 53 μA. The flux sweep of the OLED at 53 μA is 6 V. The threshold voltage of the OLED is 3 V. A frame period, ie the total time T _frame , is 13.5 msec. In conventional single-line addressing, the constant row addressing time is t ₀ = 0.1 msec. Corresponding with the multi-line addressing Fig. 6 t ₁ = 0.1875 msec. A frame now consists of 72 (D _Sum ) t _l clocks.

The S matrix and M2 matrix are activated alternately. First the first row of the S matrix is addressed, then the first two row of the M2 matrix (ie its rows 1 and 2), then the second row of the S matrix, then the second two row of the M2 matrix (ie their rows 2 and 3), etc ..

In Fig. 8a the voltage curve of the eighth line is shown. A corresponding line switch (cf. Fig. 4 ) is closed when this line is addressed so that a current can flow. The voltage is then zero. Otherwise the line switch is open. Since a column current always flows, there is at least one column voltage of 6 V. The row voltage of 3 V results from the 6V column voltage minus a threshold voltage of eg 3 V in the case of an OLED. The eighth line is addressed for 2.625 msec (from 9.375 msec to 12 msec).

In Fig. 8b the operating current is shown in the second column. In the current waveform, there are three stages, zero, when no pixel diode is active, 53 μA when only one pixel diode is active, and 106 μA when two pixel diodes (in the context of two-line addressing) are active. In the case of two-line addressing, the current amplitude at each diode is also 53 μA, because the total current distributes equally to both of the simultaneously driven pixel diodes.

The time span (line addressing time t _i ) in which the eighth line is activated consists of three phases. During the first four bars (from 9.375 msec to 10.125 msec) row 7 and row 8 are addressed together. The current is therefore also 2 * 53 μA. This corresponds to the row addressing of M2 ₇₂ .

In the next five bars, line 8 is addressed by S ₈₂ . The total of five bars of the row addressing time t _i come from the fact that the maximum of the brightness Sij of the eighth row of the matrix S has the value 5 (see 1st column, 8th row). A current of 53 μA flows for a time of 0.1875 msec (one clock). Then, the current for four more clocks is zero, since the maximum of the eighth row of the S matrix (S ₈₁ ) is 5 and the brightness control is performed by a pulse width modulation.

The last phase lasts 5 bars, in which the eighth and ninth rows of the matrix M2 are addressed. The current is again 106 μA. However, the current only flows for 4 cycles, since M2 _{82 is} 4. The current drops back to zero for one cycle. Current (not shown) also flows in the third column in this last cycle because the maximum brightness in the third column M2 is ₈₃ = 5. The total duration in which the pixel ij = 82 is supplied with operating current (active time) is 9 clocks, which corresponds to D ₈₂ .

The voltage in the second column is in Fig. 8c shown over time. It is 6 volts when an operating current is flowing and is independent of whether the operating current is 53 μA or 106 μA since at 106 μA the operating current is divided by two diodes. If no current flows, the voltage drops to 3 volts. This corresponds to the threshold voltage below which no diode current can flow.

In Fig. 8d the voltage at the diode in the pixel ij = 82 is displayed over time. The voltage is 6 volts when an operating current of 53 μA flows through this diode. During the addressed time of the eighth line, no current flows for 4 clocks. During this time, the voltage at the pixel is 3V (threshold voltage). If there is no current in the second column, the voltage at the return and column switches is 3V, so the voltage at that pixel will be zero. When a current flows through the second column, the column voltage is 6V and pulls the potential of this non-addressed row 8 to 3V (6V minus threshold voltage).

The technical realization of the method according to the invention for driving matrix displays is similarly simple as in conventional single-line addressing methods. There is a switch on each row and each column is provided with a current source that has three current levels (such as 0, 1 and 2) for two-line addressing, while for a two-line address conventional single-line addressing method gives only two stages (such as 0 and 1). This is because with the simultaneous addressing of several lines, the correspondingly increased current must be available. As a general rule, if n lines are addressed at the same time, grading with n + 1 levels is required. However, this can be realized with little effort. A concrete circuit for mixed amplitude-pulse width modulation for brightness control will be described later in more detail.

In the example described above, a pulse width modulation of the operating current was used. Of course, the S and M2 arrays can also be mapped by amplitude modulation of the operating current. In the case of amplitude modulation, each line or multiple line is addressed as long as it corresponds to the maximum on this line or multiple line. This is the same with pulse width modulation. The only difference is that the operating current flows continuously during the row addressing time t _i and the magnitude of its amplitude is adjusted.

In order to minimize the operating current, the optimized and efficient transfer of the source matrix (matrix display D) into multi-line matrices M and a single-line matrix S is decisive. Optimized means minimizing the sum of the maximum magnitudes D _Sum and efficiently means a low hardware overhead and fast turnaround.

The extraction or determination of the matrices M and S is basically feasible with known methods such as linear programming and standard software. However, complex arithmetic operations such as multiplication and division have to be applied so that this method is very computationally intensive and slow. In addition, the complexity increases more than quadratically with the size of the image matrix.

Therefore, a combinatorial method is proposed according to the invention, which is based on the so-called "MaxFlow / MinCut" principle. Since the quality of the optimum essentially depends on how two successive lines differ, the constraint D = S + M2 + M3 + ... is transformed by forming the difference between two successive equations without changing the solution space , This produces the matrices d ', S' and M2 ', M3', as in Fig. 9 shown. The matrix S 'is formed analogously to the matrix d'. The sum of each column of matrices is zero.

The transformed secondary conditions can be defined by the in Fig. 10 visualize the graph shown.

Here, each node represented as a circle (from a vertex set V) represents an entry in the transformed matrix d '. D' _ij in the circle represents the corresponding element of the matrix d ', which in Fig. 9 is shown. The value of these nodes is thus equal to the value of the matrix element d ' _ij . The edges between the matrix elements d ' _ij are the arrows leading from one node or circle to another node or circle. Each of these edges has a direction indicated by the arrow and numbered. This occupancy (number) of edges (from edge set A) reflects the value that the corresponding variable has in the decomposition of the source data matrix display. Edges that extend from one line to the next belong to the matrix S. Edges that skip one line, ie have the length "2", are to be assigned to the matrix M2. Edges of length three are assigned according to the matrix M3, and the matrices M4, M5, etc. have an analogous assignment. The indices of the edges are denoted by ij, where "i" is the line number for the starting node (circle) and "j" is the number for the column.

This will be described below with reference to the already in the 6 and 7 treated example explained. The 4X9 matrix D off Fig. 6 gets into a 4X10 flow matrix d ' transformed into Fig. 11 is specified. This matrix d 'is in Fig. 12 shown as a river to be balanced.

Each element of the d'matrix corresponds to a node in the corresponding position. The edges are still all zeroed, since this is the start of the matrix decomposition. A valid decomposition is achieved if and only if the sum of the occupations (numbers) of the outgoing edges (arrows outgoing from the circle) minus the sum of the assignments (numbers) of the incoming edges (arrows arriving at the circle) of each node (circle) are equal of its respective value (need) of the node. All edge assignments are not negative.

In Fig. 13 the result of the balanced flow is displayed. From the assignments of the edges, all elements of the matrices M3, M2 and S are obtained.

In the following, the mathematical method will be described in more detail, with which the in Fig. 13 illustrated balanced flow is created.

gilt und $$D_{\mathit{Sum}}={\displaystyle \sum _{k=1}^p}\max \left\{f\left(a\right):a\in A_k\right\}$$

minimal ist. Die obere Gleichung wird auch "Flusserhaltung" genannt und entspricht der Kirchhoffschen Knotengleichung. b(v) ist der Bedarf dieses Knotens und kann als den Stromfluss aus der Masse in diesen Knoten betrachtet werden (wobei bei negativem Bedarf der Strom vom Knoten in die Masse fließt). D_Sum ist zu minimieren.Two edges (arrows) in Fig. 13 should be of the same type if the start and end nodes of both edges are each in the same line. The goal is to find a valid occupancy of the edges so that the sum of the maximum edges of each edge type is minimized. Mathematically, this can be described as follows. Given is a directed graph G = (V, A) where the set of edges A is partitioned by types in A = A ₁ ∪̇ A ₂ ∪̇ ... ∪̇ A _p . p is the number of rows of the multi-line matrices M and the remainder of the single-line matrix S. Further, there is a function b : V → Z which assigns each node its need. Z is an integer. We are looking for a function f : A → Z _≥0 (so that for every v ∈ V the equation $${\displaystyle \underset{\begin{array}{c}a\in A\\ \mathit{v\; is\; starting\; node\; of\; a}\end{array}}{\overset{}{\Sigma }}}f\left(a\right)-{\displaystyle \underset{\begin{array}{c}a\in A\\ \mathit{v\; is}\mathrm{End}\mathit{knot\; from\; a}\end{array}}{\overset{}{\Sigma }}}f\left(\mathrm{a}\right)=\mathrm{b}\left(v\right)$$

applies and $$D_{\mathit{Sum}}={\displaystyle \underset{k=1}{\overset{p}{\Sigma }}}\mathrm{Max}\left\{f\left(a\right):a\in A_k\right\}$$

is minimal. The upper equation is also called "flux conservation" and corresponds to Kirchhoff's node equation. b (v) is the demand of this node and can be considered as the flow of current from the ground in these nodes (with negative demand flowing the current from the node to the ground). D _Sum is to be minimized.

The above object is equivalent to the problem of assigning to each edge type A _k , k = 1,..., P a nonnegative number (a so-called capacitance) such that the sum of these capacitances is minimal and there exists a valid occupancy of the edges does not exceed the capacities.

The special feature of this new method is that the capacity is valid for all edges of a certain length of a line. The flow on each of these edges is less than or equal to this capacity. The capacities themselves are variable and in some way represent the costs and the effort for the optimization. The sum of all capacities must be minimized. In contrast to a known max-flow / min-cut method, where the flow is maximized at given capacities, the capacity is minimized for a given flow.

The capacities are a function u : {1, ..., p } → Z _≥0c , so that for all k ∈ {1, ..., p } and a ∈ A _k we have: f ( a ) ≤ u ( k ).

The above-described minimization can basically also be modeled and solved as a linear program, which however, as already mentioned, is very computationally intensive. As shown below, the method according to the invention described above can be implemented mathematically as follows, with only little effort.

For this purpose, the capacities are successively, i. gradually increased from zero until a valid decomposition is possible. This also ensures that the capacity is greater than or equal to zero. In each iteration, the amount of edges is determined whose occupancy is equal to the capacity and thus represents a bottleneck that prevents a valid solution. This edge set, also called minimum cut, separates the nodes with positive demand from those with negative need. Thereafter, the capacities of the edges are increased from the minimum cut. However, this is preferably done only for the capacity that allows most edges to leave the bottleneck. The assignments are now increased until either a valid solution is found or a new bottleneck occurs, after which the steps described are repeated.

Summe maximal ist, wobei ältere Schnitte weniger stark gewichtet werden. Dabei beschreibt w die Gewichtung der Historie. Die Wahl der Größe des Schritts ermöglicht einen Kompromiss zwischen der Güte des Verfahrens (kleine Δu, z.B. Δu = 1) und Laufzeit (größere Δu) und kann auch dynamisch angepasst werden.A mathematical formulation of the procedure is Fig. 14 refer to. The program modules "MaxFIow" and "MinCut" are the standard methods known from the literature. The program module "initialize" defines the start values for u, eg u (k) = 0 for all k ∈ {1, ..., p }. Preferably, however, lower bounds generated by pre-processing the data are used. The set H describes the history of the calculated MinCuts. In this case, C ⊂ A denotes the outgoing edges of the current MinCut, and C _i ⊂ A denotes the outgoing edges of the MinCuts of the iteration i. The parameter Δ u determines the step size with which the individual capacities are increased. Preferably, only a few capacities increased per iteration (eg only for the k, for the | A _k ∩ C | or the weighted ${\displaystyle \underset{C_i\in H}{\Sigma }}{w}_i\cdot \left|A_k\cap C_i\right|$

Sum is maximum, with older cuts being weighted less heavily. W describes the weighting of the history. The choice of the size of the step allows a compromise between the quality of the method (small Δ u , eg Δ u = 1) and transit time (larger Δ u ) and can also be adapted dynamically.

Of course, the method of this invention can also be used for a subarea of an image matrix. Thus, an image can be divided into several segments and each optimized for itself, which corresponds to a local optimization.

Similarly, a mixed global and local optimization can be performed by moving a segment of a particular size line by line or by several lines. The submatrix is formed from a certain number of lines. It is first formed from the top rows of the source matrix. In each optimization, the matrix entries (S, M2, M3, etc.) are obtained for the topmost line or a few topmost lines. The next submatrix is accordingly shifted down one or more lines. The influence of the previously obtained multi-line matrix row on this new submatrix must be deducted. Then one or more rows of S, M2, M3, etc. are recovered. The submatrix runs to the end of the source matrix and is then completely decomposed. Thus one receives all entries of S, M2, M3 etc ..

The decomposition of a smaller matrix requires less memory and fewer iterations. In a global optimization, where the matrix is typically large, the result of the matrix decomposition must be placed in a cache, such as SRAM or the like. Only immediately before activation, the information is then read line by line in register for the output driver. For segmented / local or mixed optimization, the Capacities first obtained by the sub-matrix decomposition, hence their sum, or t _l and I ₁ . Thanks to the fast decomposition, the row result is then successively calculated again and passed on directly to the register for the output driver, so that the large buffer can be dispensed with. The hardware overhead can be reduced by the segmented / local or mixed optimization, while the quality of the optimization can decrease somewhat in this case.

If the matrices M, S are fixed with the brightnesses corresponding to the individual pixels ij, the diodes must be driven accordingly. The individual Zeilenadressierzeiten t _i can vary from line to line and are each based on the maximum brightness value of these lines. The brightness control can then be achieved by a pulse width modulation or an amplitude modulation of the current.

In pulse width modulation, only the maximum brightness pixels ij are turned on during the entire row addressing time, i. flows through the operating current. The remaining pixels ij light up only intermittently, the respective lighting time being correlated with the respective brightness value Sij, Mij.

Alternatively, an amplitude modulation can be used for brightness control, so that all pixel ij in the active phase, that is during the respective row addressing time t _i, are switched to 100% of the time and the operating current at pixels ij is correspondingly reduced with lower brightness. However, amplitude modulation is harder to implement in terms of hardware. This is especially true for a high color depth or many gray levels, while a pulse width modulation is comparatively simple and accurate to implement without a high cost of the hardware used is required.

It is particularly advantageous to combine a pulse width modulation with an amplitude modulation in order to reduce the operating current for pixels ij with lower brightness. This mixed amplitude and pulse width modulation according to the present invention will be described below with reference to FIGS FIGS. 15 to 18 explained.

For the above-described multi-line addressing according to the invention, the operating current must be quantified, ie divided into several different stages, fed to the streams for one, two and more lines addressing in the columns and adjust the amount of current accordingly. For example, for four simultaneously addressed lines in a multi-line addressing M4, the quadruple operating current (4 * I ₁ ) must also be impressed.

For this, the power source with three transistors, as in Fig. 15 represented, consisting of two single-transistor cells and a two-transistor cell can be realized. These three transistors get the same control voltage to the gate when an operating current I = 4 * I ₁ for four lines is required. If an operating current of I = 3 * I _{1 is} required, no control voltage is applied to one single-transistor cell, while a control voltage for the two-transistor cell and the other single-transistor cell is applied to their respective gate. For an operating current of I = 2 * I ₁ , either the two-transistor cell is active and the two one-transistor cell is passive or vice versa. For an operating current I = I _l , only one single-transistor cell is active.

The quantified operating current can also be used to reduce the operating current again for a matrix entry whose brightness value M _ij , S _{ij is} not a maximum. This can, for example, the in Fig. 18 used for the brightness values M _ij algorithm. The result corresponds to a combined pulse width and amplitude modulation for brightness control.

The result of this combined brightness control is in Fig. 17 in comparison to an exclusive pulse width modulation for brightness control ( Fig. 16 ). In a pure pulse width modulation, the current amplitude is, for example, constant 100 μA. The pulse width of the first pulse is 6 out of 10 units (6/10), with the active duration of this row being 10 units (row addressing time of 10 units). Since 6 units is greater than half of 10 units and less than 3/4 of 10 units, mixed pulse amplitude modulation extends the pulse width of the first pulse to 4/3 of the original value. At the same time the amplitude is reduced to ¾ of the original amplitude (ie 75 μA in the example). This is also Fig. 17 compared to Fig. 16 refer to. The pulse width of the second pulse is doubled while the amplitude is halved analogously. The third and fifth pulses can not be extended because their pulse widths are close to the active duration (row addressing time) of the respective row. The width of the fourth pulse, however, can be quadrupled.

It is in Fig. 17 clearly recognizes that the average amplitude of the operating current is reduced in a mixed or combined amplitude and pulse width modulation for brightness control.

Of course, only parts of the above, in Fig. 18 illustrated algorithms are applied. These algorithms also apply to the single-line matrix. In a multi-line addressing with a different number of lines, the algorithms are formulated in a similar manner. The algorithms depend on the quantification of the current source.

With the present method for controlling matrix displays and a display control set up to carry out the method described above, to which the invention also relates, it is thus possible to use a to achieve optimized control of matrix displays. This can be used to increase performance, for example an increased refresh rate, and / or to reduce the operating current required to drive the individual pixels. Significant features are that the row addressing time for each row depends on the maximum brightness that a pixel in that row must reach, and / or the matrix display is broken down into several separate matrices, some of which represent multi or multi-line control.

The present invention also relates to a controller for carrying out the above-described method. For this purpose, the claimed method can be implemented in an application-specific IC (ASIC) if, for example, the display controller and the display driver are integrated in one chip. The generation of t ₁ and I ₁ happens in the driver. Matrix decomposition is realized with combinational logic that is simple and fast.

Since an image, and hence the derived matrices, are always data-intensive, memory is also required. This need can be reduced with a modern semiconductor process or as previously described, also with local or mixed optimization. Of course, the present method can also be divided into multiple chips.

Claims (15)

1. Method for triggering luminous or non-luminous matrix displays, which are composed of several rows formed as lines (i) and columns (j) with individual pixels (ij), wherein individual lines and columns are selectively triggered by activating lines (i) for a specific line addressing time (t_i) and by charging the columns (j) with an operating current (I) or a corresponding voltage in correlation with the activated line (i) according to the desired brightness (D_ij) in the pixels (ij), wherein a source image (D) is broken down into several image matrices (S, M2, M3, M4), which are used separately for the triggering of the matrix displays, and wherein several lines (i) of the matrix display can be triggered simultaneously,
   characterised in that,
   an image matrix (S) for the individual adjustment of the desired brightness for each pixel (ij), by means of which a line (i) of the matrix display is triggered, and one or more image matrices (M2, M3, M4), by means of which several lines (i) of the matrix display are triggered, can be combined with each other in such a way that a line of the matrix display can be addressed by means of various image matrices (S, M) both alone and together with other lines of the matrix display.
2. Method according to claim 1, characterised in that the total time (T_Frame) for activating all lines (i) in all matrices is kept constant, such that the sum (T_sum) of the line addressing times (t_i) for all lines corresponds to the total time (T_Frame).
3. Method according to claim 1 or 2, characterised in that the line addressing time (t_j) for each line (i) is defined in accordance with the maximum brightness of all columns (Dⁱ _max) of the line (i).
4. Method according to claim 1, characterised in that adjacent lines (i, i+1) are triggered simultaneously.
5. Method according to claim 1, characterised in that the source image (D) is transferred into a flow matrix (d'), which has nodes as inputs, which correspond to the need for brightness differentiation of individual pixels in the column.
6. Method according to claim 5, characterised in that the flow matrix (d') is composed of the difference between two matrices, wherein the first matrix consists of the source image (D) and a line added to the end of the matrix display (D) with zero inputs and the second matrix consists of the source image (D) and a line upstream of the source image (D) with zero inputs.
7. Method according to claim 5 or 6, characterised in that the nodes are connected by arrows denoted as edges, to which a configuration is allocated, which preferably, according to its length, correspond to the inputs of the several matrices (S, M2, M3, M4) that are triggered separately.
8. Method according to claim 7, characterised in that a variable capacity is allocated to each line of a matrix (S, M2, M3, M4), which is increased until a valid allocation of the edges is achieved.
9. Method according to claim 8, characterised in that the capacities selected according to local criteria are the ones that are increased.
10. Method according to claim 9, characterised in that a local criterion is a min-cut.
11. Method according to claim 9 or 10, characterised in that the information about the previous min-cuts is also used as a selection criterion.
12. Method according to one of claims 8 to 11, characterised in that the increment by which the capacity value is increased is dynamically adjusted.
13. Method according to one of claims 5 to 12, characterised in that the source image (D) is divided into several sub-matrices and the sub-matrices (S, M2, M3, M4) are broken down separately into sub-flow matrices.
14. Method according to one of claims 5 to 13, characterised in that a mixed local and global optimisation is carried out, wherein one or a few lines from multi-line matrices (M2, M3, M4) and/or (remaining) single-line matrices (S) are obtained from a sub-flux matrix.
15. Device for triggering luminous or non-luminous matrix displays, which are composed of several rows formed as lines (i) and columns (j) with individual pixels (ij), wherein the device is configured to embody a method wherein individual lines and columns are selectively triggered by activating lines (i) for a specific line addressing time (t_i) and by charging the columns (j) with an operating current (I) or a corresponding voltage in correlation with the activated line (i) according to the desired brightness (D_ij) in the pixels (ij), wherein a source image (D) is broken down into several image matrices (S, M2, M3, M4), which are used separately for the triggering of the matrix displays, and wherein several lines (i) of the matrix display can be triggered simultaneously,
    characterised in that,
    an image matrix (S) for the individual adjustment of the desired brightness for each pixel (ij), by means of which a line (i) of the matrix display is triggered, and one or more image matrices (M2, M3, M4), by means of which several lines (i) of the matrix display are triggered, can be combined with each other in such a way that a line is addressed by means of various image matrices (S, M) both alone and together with other lines.

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