EP1803186A4 - Vorrichtung und verfahren für oszillierende breitband-frequenz - Google Patents

Vorrichtung und verfahren für oszillierende breitband-frequenz

Info

Publication number
EP1803186A4
EP1803186A4 EP05800772A EP05800772A EP1803186A4 EP 1803186 A4 EP1803186 A4 EP 1803186A4 EP 05800772 A EP05800772 A EP 05800772A EP 05800772 A EP05800772 A EP 05800772A EP 1803186 A4 EP1803186 A4 EP 1803186A4
Authority
EP
European Patent Office
Prior art keywords
oscillating
wideband frequency
wideband
frequency
oscillating wideband
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05800772A
Other languages
English (en)
French (fr)
Other versions
EP1803186A2 (de
Inventor
Joonbae Park
Seung-Wook Lee
Jeong-Woo Lee
Kyeongho Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GCT Semiconductor Inc
Original Assignee
GCT Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020040075736A external-priority patent/KR100699080B1/ko
Application filed by GCT Semiconductor Inc filed Critical GCT Semiconductor Inc
Publication of EP1803186A2 publication Critical patent/EP1803186A2/de
Publication of EP1803186A4 publication Critical patent/EP1803186A4/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
EP05800772A 2004-09-22 2005-09-21 Vorrichtung und verfahren für oszillierende breitband-frequenz Withdrawn EP1803186A4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1020040075736A KR100699080B1 (ko) 2004-09-22 2004-09-22 광대역 주파수 발진 장치 및 그 방법
US11/227,439 US7190236B2 (en) 2004-09-22 2005-09-16 Apparatus and method of oscillating wideband frequency
PCT/US2005/034021 WO2006036749A2 (en) 2004-09-22 2005-09-21 Apparatus and method of oscillating wideband frequency

Publications (2)

Publication Number Publication Date
EP1803186A2 EP1803186A2 (de) 2007-07-04
EP1803186A4 true EP1803186A4 (de) 2008-09-24

Family

ID=36119431

Family Applications (1)

Application Number Title Priority Date Filing Date
EP05800772A Withdrawn EP1803186A4 (de) 2004-09-22 2005-09-21 Vorrichtung und verfahren für oszillierende breitband-frequenz

Country Status (4)

Country Link
EP (1) EP1803186A4 (de)
JP (1) JP2008514163A (de)
CA (1) CA2580945A1 (de)
WO (1) WO2006036749A2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4768645B2 (ja) * 2007-02-16 2011-09-07 パナソニック株式会社 Ｐｌｌ回路、およびそれを備えた無線装置
US7973277B2 (en) * 2008-05-27 2011-07-05 1St Detect Corporation Driving a mass spectrometer ion trap or mass filter
JP2018129660A (ja) * 2017-02-08 2018-08-16 富士通株式会社 通信装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0821489A2 (de) * 1996-07-25 1998-01-28 Matsushita Electric Industrial Co., Ltd. Phasenregelkreisschaltung eines Anzeigemonitors
US6650186B1 (en) * 1999-10-29 2003-11-18 Siemens Aktiengesellschaft Clock pulse and data regenerator for different data rates
WO2005057792A1 (en) * 2003-11-18 2005-06-23 Analog Devices, Inc. Phase-locked loop structures with enhanced signal stability

Family Cites Families (20)

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Publication number Priority date Publication date Assignee Title
JPS5616834Y2 (de) * 1975-10-14 1981-04-20
JPS59108432A (ja) * 1982-12-14 1984-06-22 Matsushita Electric Ind Co Ltd 発振回路
JPS61225928A (ja) * 1985-03-29 1986-10-07 Toshiba Corp 周波数シンセサイザの制御方法
JPS6382023A (ja) * 1986-09-26 1988-04-12 Toshiba Corp 周波数シンセサイザ
JPS63305619A (ja) * 1987-06-08 1988-12-13 Mitsubishi Electric Corp Ｐｌｌシンセサイザ装置
JPS6448934U (de) * 1987-09-19 1989-03-27
JPH022215A (ja) * 1988-06-10 1990-01-08 Nec Ic Microcomput Syst Ltd Ｐｌｌ回路
JPH07240685A (ja) * 1994-02-28 1995-09-12 Casio Comput Co Ltd 周波数シンセサイザ回路
JP3180865B2 (ja) * 1994-06-10 2001-06-25 株式会社富士通ゼネラル 適応型ｐｌｌ回路
JPH09261042A (ja) * 1996-03-26 1997-10-03 Fujitsu Denso Ltd 位相同期ループの引き込み方式
JP2000209027A (ja) * 1999-01-13 2000-07-28 Fujitsu Ltd 可変周波発振器
JP2001345698A (ja) * 2000-03-27 2001-12-14 Toshiba Corp 補償機能付アナログ回路
EP1189347A1 (de) * 2000-09-15 2002-03-20 Texas Instruments France Elektronisch abgeglichener spannungsgesteuerter Oszillator
JP2002217725A (ja) * 2001-01-19 2002-08-02 Fujitsu Ltd Ｐｌｌ周波数シンセサイザ回路
US6744324B1 (en) * 2001-03-19 2004-06-01 Cisco Technology, Inc. Frequency synthesizer using a VCO having a controllable operating point, and calibration and tuning thereof
JP2002314414A (ja) * 2001-04-13 2002-10-25 Matsushita Electric Ind Co Ltd 周波数シンセサイザ
FI114886B (fi) * 2001-06-29 2005-01-14 Nokia Corp Menetelmä ja laite taajuussyntetisaattorin tehokkuuden parantamiseksi
DE10134640B4 (de) * 2001-07-17 2005-07-14 Texas Instruments Deutschland Gmbh PLL-Schaltung und Verfahren zur automatischen Einstellung ihrer Ausgangsfrequenz
JP2004173177A (ja) * 2002-11-22 2004-06-17 Nec Corp Ｐｌｌ回路
US6903613B1 (en) * 2002-12-20 2005-06-07 Cypress Semiconductor Corporation Voltage controlled oscillator

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0821489A2 (de) * 1996-07-25 1998-01-28 Matsushita Electric Industrial Co., Ltd. Phasenregelkreisschaltung eines Anzeigemonitors
US6650186B1 (en) * 1999-10-29 2003-11-18 Siemens Aktiengesellschaft Clock pulse and data regenerator for different data rates
WO2005057792A1 (en) * 2003-11-18 2005-06-23 Analog Devices, Inc. Phase-locked loop structures with enhanced signal stability

Also Published As

Publication number Publication date
JP2008514163A (ja) 2008-05-01
EP1803186A2 (de) 2007-07-04
WO2006036749A2 (en) 2006-04-06
WO2006036749A3 (en) 2006-09-28
CA2580945A1 (en) 2006-04-06

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Effective date: 20080822

RIC1 Information provided on ipc code assigned before grant

Ipc: H03L 7/187 20060101ALI20080818BHEP

Ipc: H01P 5/12 20060101AFI20060920BHEP

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