Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
  • H10K10/40—Organic transistors
  • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
  • H10K10/462—Insulated gate field-effect transistors [IGFETs]
  • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
  • H10K71/10—Deposition of organic active material
  • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
  • H10K71/10—Deposition of organic active material
  • H10K71/18—Deposition of organic active material using non-liquid printing techniques, e.g. thermal transfer printing from a donor sheet
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
  • H10K71/50—Forming devices by joining two substrates together, e.g. lamination techniques
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
  • H10K85/10—Organic polymers or oligomers
  • H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
  • H10K85/113—Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
  • H10K85/60—Organic compounds having low molecular weight
  • H10K85/615—Polycyclic condensed aromatic hydrocarbons, e.g. anthracene
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
  • H10K85/60—Organic compounds having low molecular weight
  • H10K85/649—Aromatic compounds comprising a hetero atom
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
  • Y10T156/17—Surface bonding means and/or assemblymeans with work feeding or handling means
  • Y10T156/1702—For plural parts or plural areas of single part
  • Y10T156/1705—Lamina transferred to base from adhered flexible web or sheet type carrier

Definitions

• the present invention relates to a process for the fabrication of thin film electronic devices in which the semiconductor portion of the device is deposited by lamination from a donor substrate on to a receiver substrate.
• the donor or the substrate may include other elements of the device, such as conductors or dielectrics.
• This dry lamination process is useful for fabricating devices such as transistors or light-emitting devices on flexible, polymer substrates, which require low temperature fabrication processes.
• TECHNICAL BACKGROUND Most active electronics today is done using silicon integrated circuit (IC) technology on crystalline or on other hard surfaces. In recent years, lower cost paths than silicon IC processes have been emerging.
• Thin film transistors can be fabricated with low-cost flexible plastics as a substrate using low temperature processes. Combining flexible substrates with low cost continuous printing methods is a goal that would allow for the production of inexpensive or large applications that IC silicon technology cannot deliver. Examples of products that would benefit with low cost flexible electronics are disposable tags, sensors or flexible displays.
• the use of polymer substrates dictates that the thin film transistor fabrication processes operate at low temperature. Additionally, it is desired that transistor fabrication processes operate at ambient pressure so that large areas of polymer substrate can be processed without introduction into a vacuum chamber.
• Japanese Patent 2002236286 discloses a colored organic film used as a layer insulation membrane, which is laminated.
• US Patent 6,197,663 discloses a thin film transistor formed by laminating two substrates together.
• the present invention concerns a process comprising: a) depositing an organic semiconductor on a donor substrate; b) laminating the organic semiconductor on the donor substrate with a receiver substrate; and c) removing the donor substrate.
• the present invention also includes the above process where the receiver substrate is a flexible polymer.
• the present invention further describes an electronic device comprising a semiconductor laminated on a receiver substrate.
• the present invention further describes an electronic device comprising a semiconductor laminated on a receiver substrate where the electronic device is a transistor.
• FIG. 1 illustrates an organic polymer semiconductor deposited on a donor sheet.
• Figure 2 depicts the donor sheet oriented for lamination with a substrate containing transistor elements.
• Figure 3 shows a micrograph of a laminated organic polymer semiconductor on a substrate.
• Figure 4 shows the transistor characteristics of a transistor with a laminated organic semiconductor of ⁇ , ⁇ '-bis-4-(n-hexyl) phenyl bitiophene (6PTTP6).
• Figure 5 shows the transistor characteristics of a transistor with a laminated organic polymer semiconductor of polythiophene.
• Figure 6 compares the transistor characteristics of laminated and evaporated pentacene.
• FIG. 7 further compares the transistor characteristics of laminated and evaporated pentacene.
• a thin film field effect transistor herein consists of a semiconductor material between a source and a drain electrode.
• the source and the drain electrodes and the semiconductor are electrically insulated from a third, gate, electrode by a dielectric layer.
• Numerous low temperature printing processes have been developed to apply the conductive electrodes to polymer substrates. These include lithography, laser printing, micro contact printing and ink jet printing.
• the objective of the present invention is to provide a low temperature, ambient pressure method of depositing a semiconductor during the fabrication of a thin film transistor.
• organic semiconductors such as pentacene, alpha, alpha'-bis-4 (n-hexyl)phenyl bitiophene or polythiophene can be deposited on a flexible donor substrate.
• the donor substrate is the material on which the semiconductor is initially deposited prior to lamination with the desired receiver substrate.
• the receiver substrate is frequently patterned with other elements of an electronic device such as sources and drains of a field effect transistor. Deposition can be accomplished through evaporation, spin casting or drop casting. Evaporation of the semiconductor on to the donor substrate may be performed in a vacuum chamber.
• the donor substrate may be sheets of Teflon, Mylar, Kapton, or similar materials. Some donor substrates may contain additional intermediate layers to facilitate the semiconductor film formation or release, or to improve the conformal coverage of the receiver substrate.
• the donor substrate is positioned relative to the flexible polymer substrate with the semiconductor deposit situated between the flexible polymer substrate and the transfer substrate. At this point, the receiver substrate may be already patterned with other elements of the thin film transistor. Two arrangements are particularly convenient.
• the gate electrode may be deposited directly on the flexible polymer substrate and then covered with a dielectric layer.
• the organic polymer semiconductor is then laminated over the dielectric.
• lamination it is meant that a layer of transferable material deposited on a donor substrate will be pressed against a receiver substrate at a desired temperature such that the transferable material adheres to the receiver substrate. There is no motion of the donor substrate in the plane of contact with the receiver substrate.
• the source and drain electrodes are deposited on the semiconductor layer. Alternatively, the source and drain may be deposited directly on the donor substrate. The semiconductor is then laminated over the source and drain. A dielectric layer is then deposited over the semiconductor and a gate electrode is deposited over the dielectric.
• the semiconductor deposition via lamination presents several advantages over the direct deposition onto a substrate.
• applying the solvent on to a donor sheet first resolves all the chemical compatibility issues between different layers of the transistor, since by the time the semiconductor is ready for lamination, all the solvents have evaporated.
• This technique also allows for a preparation of a smaller size donor sheet that can be partitioned to cover a large area electronic panel.
• the latter feature of lamination can be critical when semiconductors need to be evaporated in a vacuum chamber: the size of the vacuum chamber does not limit the size of the electronic panel. Spin coating of large areas can also be challenging, and lamination again decouples the size of the donor and the size of the electronic circuits being built.
• Example 1 This example describes how to laminate a semiconductor by coating a donor with a drop of organic semiconductor solution. A sheet of Teflon paper 11 was placed on a 120JC hot plate inside a glove box.
• ⁇ , ⁇ '-bis-4-(n-hexyl) phenyl bitiophene (6PTTP6) semiconductor in chloroform_ were placed on the Teflon.
• the drops were allowed to dry on the hotplate for a few minutes, resulting in circular patterns of semiconductor with thicker edges where most of the solution agglomerated.
• the donor was removed from the hotplate and left at room temperature for 30 minutes.
• the drop of 6PTTP6 dried unevenly, leaving a ring pattern 10 as depicted in Figure 1.
• the donor sheet 11 was then pressed in a laminator onto a Si wafer patterned with a gate electrode 15, dielectric 12, and source 13 /drain 14 pair.
• the laminator press (not shown) consist of two iron plates which were warmed to 85°C and pressed together with a force of 1 to 10 kilopounds.
• Figure 2 illustrates the orientation of the donor substrate and the dried semiconductor relative to the electrode elements of a transister. The donor was then peeled-off. The semiconductor remained on the Si-wafer thereby completeing the transistor.
• a Micrograph of the device achieved using a "laminated semiconductor" is shown in Figure 3. The area surrounding the transistor was scratched to reduce the leakage.
• the sample current-voltage characteristic obtained from this device is shown as Figure 4, where the gate voltage was swept from 0 to -60V. The resulting mobilities are ⁇ 10 -7 cm 2 ⁇ s.
• Example 2 This example describes the lamination of a semiconductor by spin- coating the semiconductor onto the donor sheet.
• a sample of polythiophene (Aldrich) dissolved in toluene was spin-coated onto a Mylar/Elvax/Cronar/Latex donor. The coating was done inside a glove- box, at room temperature and a speed of 1000 rpm for 1 minute. The coated donor was then laminated onto a Si-based gate/dielectric/source- drain structure, completing the transistor by the transfer of a semiconductor.
• the lamination was performed at 2 klb pressure at 85°C. During lamination, only the semiconductor was transferred from the donor sheet to the Si-chip.
• Example 3 This is an example of lamination of a semiconductor where the semiconductor donor was prepared by evaporation. A Mylar/Elvax/Latex donor sheet was placed in a thermal evaporator. Pentacene was evaporated at a pressure of 10 -7 Torr at a rate of -0.02 nm/sec. As a control, a Si-chip containing a gate/dielectic/source-drain structure was placed together with the donor sheet. Approximately 1200 nm of pentacene was deposited at room temperature. The donor sheet was laminated onto a Si-chip identical to the control sample, at 85°C and 2 klb.
• the pentacene was transferred onto the chip but the dielectric (latex) was not.
• the results of the laminated pentacene as compared to the evaporated pentacene are shown as Figure 6.
• the mobilities decreased with lamination as compared to evaporation.
• the threshold voltage increased, but the on/off ratios of the transistors remained the same or improved, as shown in Figure 7.
• the evaporated pentacene is the upper curve.
• the on/off current ratio is 2 x 10 3 .
• the lower curve of Figure 7 is laminated pentacene.
• the on/off ration is 10 5 .

Landscapes

• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Thin Film Transistor (AREA)
• Bipolar Transistors (AREA)
• Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Applications Claiming Priority (3)

Publications (1)

Family

ID=34107798

Family Applications (1)

Country Status (5)

Families Citing this family (16)

Family Cites Families (12)

• 2004
  • 2004-07-21 US US10/895,599 patent/US7105462B2/en not_active Expired - Fee Related
  • 2004-07-22 KR KR1020067001364A patent/KR20060063903A/ko not_active Ceased
  • 2004-07-22 JP JP2006521198A patent/JP2006528430A/ja active Pending
  • 2004-07-22 WO PCT/US2004/023375 patent/WO2005011016A2/en not_active Ceased
  • 2004-07-22 EP EP04757163A patent/EP1647063A2/en not_active Withdrawn
• 2006
  • 2006-07-26 US US11/493,050 patent/US20070004229A1/en not_active Abandoned

Non-Patent Citations (1)

Also Published As

Similar Documents

Legal Events