EP1468446A1 - Procede de production de couches dielectriques avec utilisation de carbosilane multifonctionnel - Google Patents

Procede de production de couches dielectriques avec utilisation de carbosilane multifonctionnel

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Publication number
EP1468446A1
EP1468446A1 EP02804878A EP02804878A EP1468446A1 EP 1468446 A1 EP1468446 A1 EP 1468446A1 EP 02804878 A EP02804878 A EP 02804878A EP 02804878 A EP02804878 A EP 02804878A EP 1468446 A1 EP1468446 A1 EP 1468446A1
Authority
EP
European Patent Office
Prior art keywords
dielectric layers
aryl
alkyl
layers according
multifunctional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP02804878A
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German (de)
English (en)
Inventor
Stephan Kirchmeyer
Detlef Gaiser
Harald Kraus
Udo Merker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HC Starck GmbH
Original Assignee
Bayer AG
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Filing date
Publication date
Application filed by Bayer AG filed Critical Bayer AG
Publication of EP1468446A1 publication Critical patent/EP1468446A1/fr
Withdrawn legal-status Critical Current

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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H01L21/3121—Layers comprising organo-silicon compounds
    • H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31695—Deposition of porous oxides or porous glassy oxides or oxide based porous glass
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49894—Materials of the insulating layers or coatings
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    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676—Single layer compositions

Definitions

  • the present invention relates to a ner driving for the production of dielectric
  • Highly integrated microelectronic circuits consist of a large number of semiconducting elements, which are produced by selective doping and structuring of monocrystalline silicon. These individual semiconductor elements are connected to form a functioning unit by means of a layer structure consisting of conductor tracks and the intermediate layers required for insulation, the so-called interconnect.
  • the progressive miniaturization places extreme demands on the materials used.
  • the properties of the interconnect determine the performance characteristics of these highly integrated microelectronic circuits. These requirements are determined by the ever higher clock frequencies and the shorter signal delays required for this.
  • a high conductivity of the conductor track material and a low dielectric constant of the insulator material are desired.
  • the miniaturization of the semiconductor elements and the interconnect negatively influences the component properties.
  • Conductor resistance increased.
  • the interactions between the conductor tracks depend to a large extent on the relative dielectric constant ⁇ (the k value) of the insulator material. Attempts are made to counteract these technical difficulties by using conductor materials with a higher specific conductivity and insulator materials with a lower dielectric constant.
  • the aluminum that was previously used as a conductor material is gradually being replaced by copper, which has a higher specific conductivity.
  • silicon dioxide has proven itself as an insulator material in the manufacture of highly integrated circuits in both its electrical and process properties.
  • the dielectric constant of silicon dioxide is approx.
  • the value of the relative dielectric constant (k value) depends strongly on the temperature at which this value is determined.
  • the values given here are understood to mean the values which result from a determination at 22 ° C. and a pressure of 1 bar.
  • the dielectric constant (the k value)
  • the dielectric material must be able to withstand high process temperatures up to 400 ° C, which are achieved in subsequent metallization and tempering steps.
  • the layer materials or their precursors are available in sufficient purity, since impurities, in particular metals, can have a negative effect on the electrical properties of the layer materials.
  • the dielectric material should be as easy to process as possible and be applied as a thin layer in an industry-standard process such as the spin coating process.
  • silsesquioxanes and carbon-doped silicon dioxide have been described as dielectrics with a dielectric constant below 3.0.
  • Organic polymers as dielectrics with a low dielectric constant have found their way into technical production.
  • the properties of these polymers lead to considerable problems in process integration.
  • Their limited chemical and mechanical stability at elevated temperatures limits the subsequent process steps.
  • Necessary polishing steps are optimized, for example, on layers that are similar to silicon dioxide, and often lead to less than optimal results on organic polymer layers.
  • Silsesquioxanes are organosilicon polymers that are applied as oligomer solutions in the spin coating process and then thermally crosslinked.
  • WO 98/47944 AI teaches the use of organosilsesquioxanes for the production of layers with k values less than 2.7. However, these compounds can only be obtained from trialkoxysilanes via complex synthetic routes.
  • US-A-5,906,859 teaches the application of oligomeric hydridosilsequioxanes which are thermally crosslinked to form polymers. Dielectric constants of 2.7-2.9 are achieved with the compounds described in US Pat. No. 5,906,859.
  • Carbon-doped silicon dioxide is applied from organosilanes in a PE-CVD (Plasma Enhanced Chemical Vapor Deposition) process with reactive oxygen plasma.
  • PE-CVD Pullasma Enhanced Chemical Vapor Deposition
  • carbon-doped silicon dioxide Because of its silicon dioxide matrix, carbon-doped silicon dioxide has similar process properties to silicon dioxide and is therefore significantly lighter to integrate into the production process. The dielectric constant of these layers is reduced compared to silicon dioxide by the carbon content. US-A-6,054,206 teaches the application of such layers of gaseous organosilanes. However, the high vacuum plasma CND process is complex and involves high costs. With carbon-doped silicon dioxide layers, too
  • WO 99/55526 A1 also describes the production of dielectric layers by means of a CND process, preferably a plasma CND process.
  • a CND process preferably a plasma CND process.
  • layers are obtained which have a backbone structure made of Si-O-Si bonds, organic side groups being bound to this structure.
  • the CVD process is preferably carried out in such a way that the backbone has annular structures.
  • Cyclic organosiloxanes are particularly suitable as precursors.
  • the layers produced according to the examples have dielectric constants between 2.6 and 3.3.
  • WO 00/75975 A2 teaches the use of polycarbosilanes which are applied from a solution and converted into polyorganosilicon layers with k values of less than 2.5 by thermal treatment in discrete steps.
  • the polycarbosilanes used are hydridopolycarbosilanes which contain at least one
  • Silicon-bonded hydrogen atom and preferably contain allyl substituents.
  • Si-H bonds are sensitive to moisture and must therefore be handled accordingly.
  • the platinum compounds used to cross-link Si-H compounds with unsaturated groups are undesirable as metallic impurities.
  • the temperature treatment In order to achieve layers with low k values, the temperature treatment must be carried out under precisely controlled conditions, whereby various specified temperature steps must be observed.
  • the air contained in the pores has a k-value of almost 1. Bring it into a dense one If the material contains air-filled pores, the average k-value of the material is made up of the k-value of the dense material and a proportion of the k-value of air. The effective k-value is thus reduced.
  • the k value of pure silicon dioxide can thus be reduced from 4.0 to below 2.0, but this requires porosities> 90% (L. Hrubesch, Mat. Res. Soc. Symp. Proc, 381,
  • the principle can generally be applied to dense dielectric layers.
  • k values below 2.0 can be achieved with much lower porosities, which in turn benefits the mechanical stability of the layers.
  • German patent DE 196 03 241 Cl describes the production of multifunctional organosiloxanes which are used as crosslinkers in inorganic paints based on silica sol. After drying, these materials form soft
  • Cl are known to have dielectric layers with low k values produced by thermal treatment.
  • carbosilanes which have no Si-H bonds can be used. This is particularly surprising given the background of the teaching in WO 00/75975 A2, in which the last paragraph on page 8 explains that the manufacture of appropriate dielectric layers finally, polycarbosilanes are suitable which contain at least one hydrogen atom bonded to silicon.
  • the dielectric layers according to the invention are similar in their composition to carbon-doped silicon dioxide, and combine low k values with the advantage of simple temperature treatment.
  • the invention therefore relates to a method for producing dielectric layers, characterized in that sol-gel products of multifunctional carbosilanes are thermally treated.
  • the invention further relates to the dielectric layers which can be produced by this method.
  • the invention finally relates to the use of the dielectric
  • sol-gel products which can be used in the process according to the invention can be:
  • Reaction of a multifunctional carbosilane can be obtained with water in the presence of a catalyst.
  • Suitable carbosilanes are multifunctional carbosilanes which contain at least 2, preferably at least 3, silicon atoms, each having 1 to 3 alkoxy or
  • the silicon atoms being bonded to at least one Si — C bond to a structural unit linking the silicon atoms.
  • linking units within the meaning of the invention are linear or branched - to CIO-alkylene chains, C 5 - to CIO-cycloalkylene radicals, aromatic radicals, for example phenyl, naphthyl or biphenyl, or combinations of aromatic and aliphatic radicals called.
  • aromatic radicals for example phenyl, naphthyl or biphenyl, or combinations of aromatic and aliphatic radicals called.
  • the aliphatic and aromatic radicals can also contain hetero atoms, such as Si, N, O or F.
  • Multifunctional carbosilanes which do not have any Si-H bonds are preferably used.
  • Examples of suitable multifunctional carbosilanes are compounds of the general formula (I)
  • R 3 alkyl, aryl, preferably C ⁇ -C ⁇ o-alkyl, C 6 -C ⁇ 0 -aryl, particularly preferably methyl.
  • R can also mean hydrogen.
  • R 4 alkyl, aryl, preferably Ci-Cio-alkyl, C 6 -C ⁇ o-aryl, particularly preferably methyl, ethyl, isopropyl;
  • R can also mean hydrogen
  • R 5 alkyl, aryl, preferably Ci-Cio-alkyl, C ⁇ -Cio-aryl, particularly preferred
  • R 6 -C 6 alkyl or C 6 -C 4 aryl, preferably methyl, ethyl, particularly preferred
  • polyfunctional carbosilanes are compounds of the general formula (III)
  • R can also be hydrogen
  • R 9 alkyl, aryl, preferably Ci-Cio-alkyl, C ö -Ciö-aryl, particularly preferred
  • Oligomers or mixed oligomers of the compounds of the formulas (I) - (III) can also be used as multifunctional carbosilanes.
  • Examples of particularly suitable compounds are 1,3,5,7-tetramethyl-1,3,5,7-tetra (2- (diethoxymethylsilyl) ethylene) cyclotetrasiloxane, 1,3,5,7-tetramethyl-1,3,5, 7- tetra (2- (hydroxy-dimethylsilyl) ethylene) cyclotetrasiloxane or their oligomers.
  • the multifunctional can be used to manufacture the sol-gel product
  • EP 743 313 A2 EP 787 734 AI and WO 98/52992 AI described.
  • Suitable organic solvents are, for example, ketones, alcohols, diols, ethers and mixtures thereof. The addition of the solvent serves to give the solution the desired viscosity.
  • Preferred solvents are n-butanol, ethanol and i-propanol. Possible dilutions are 10-90% by weight, preferably 20-50% by weight, of multifunctional carbosilane in the solvent.
  • Catalysts i.e. Compounds which accelerate the reaction between the functional groups are added.
  • suitable catalysts are organic and inorganic acids such as aliphatic monocarboxylic acids with 1 to 10 carbon atoms such as e.g. Formic acid or acetic acid, aromatic carboxylic acids with 7 to 14 carbon atoms, e.g. Benzoic acid, dicarboxylic acids such as e.g. Oxalic acid, aliphatic and aromatic sulfonic acids such as e.g. p-toluenesulfonic acid, inorganic volatile acids such as hydrochloric acid or nitric acid. The use of p-toluenesulfonic acid is particularly preferred.
  • the catalysts can be used as aqueous or alcoholic solutions in concentrations of 0.05-5 n, preferably 0.1-1 n.
  • concentrations of 0.05-5 n, preferably 0.1-1 n For example, 1-50% by weight, preferably 5-20% by weight, of the catalyst solution can be added to the carbosilane solution.
  • Formulations of the multifunctional carbosilanes which have the following composition are particularly preferably used:
  • the sol-gel product is generally applied to a substrate.
  • all customary methods are available for applying the layers. These are e.g. Spin coating, dip coating, knife coating and spraying.
  • the sol-gel product of the multifunctional carbosilane or its formulation is thermally treated after being applied to a substrate.
  • the thermal treatment takes place, for example, at temperatures between 100 and 800 ° C., preferably between 200 and 600 ° C., particularly preferably between 200 and 400 ° C.
  • This thermal treatment serves to complete the crosslinking of the multifunctional carbosilanes and to remove the solvent, and furthermore the temperature treatment serves to create pores.
  • the temperature treatment can be carried out in a very simple manner in one step at a fixed temperature. However, it is also possible to carry out the treatment in several steps according to a suitable temperature and time profile. Suitable temperature and time profiles depend on the multifunctional carbosilanes, the
  • Catalyst and the solvent content can be determined by preliminary tests.
  • the layers are preferably crosslinked at temperatures of 100-150 ° C. for a period of 5-120 minutes.
  • the pore is generated by temperature treatment above a temperature at which parts of the carbosilane decompose and escape as gaseous components. This happens from temperatures above approx. 220 ° C, depending on the multifunctional carbosilanes used. It is also possible to add pore-forming substances such as high-boiling solvents or foaming agents to the sol-gel product before application. These remain in the layer during crosslinking and are only evaporated and / or decomposed into gaseous products during the subsequent temperature treatment.
  • the temperature treatment can be carried out using conventional furnaces, RTP (Rapid Thermal Processing) furnaces, hotplates etc. However, it is also possible to supply the energy required for crosslinking and pore formation with the aid of microwaves, LR light, lasers or other high-energy electromagnetic radiation.
  • the temperature treatment in an oven or on a is preferred
  • the temperature treatment can be carried out in air or other gases.
  • the temperature treatment is preferably carried out in air or in nitrogen.
  • thermally labile components of the layer are pyrolytically broken down, so that gas-filled pores remain.
  • a further processing step which serves to hydrophobize the pore surface.
  • the k value of an organosilicon material can be further reduced by the chemical conversion of Si-OH groups into Si-O-SiR 3 groups.
  • the surface is treated with suitable compounds, such as trichloromethylsilane or hexamethylene disilazane. Further information on the procedure and further examples are described, for example, in WO 99/36953 AI.
  • the invention also relates to dielectric layers which can be obtained by the process according to the invention.
  • the layers according to the invention are characterized by k values of less than 2.8, preferably less than 2.5, particularly preferably less than 2.0, the k value in particular depending on the choice of multifunctional carbosilane and the conditions of the thermal treatment of the sol gel Product depends.
  • the layers preferably have a layer thickness of 0.01 to 100 ⁇ m.
  • the layers according to the invention can be used, for example, as dielectric insulation layers in the production of microelectronic circuits, in chip packaging, for the construction of multichip modules, and for the production of laminated printed circuit boards and displays.
  • the substrate to be used, to which a dielectric layer according to the invention is applied depends on the application. All substrates are possible that deal with the aforementioned techniques such as spin and dip coating, knife coating or
  • Allow spray coating and which can withstand the temperatures that occur during the temperature treatment e.g. structured and unstructured silicon wafers, structured and unstructured wafers of other semiconductors such as gallium arsenide or silicon germanide, with structured layers provided, structured or unstructured glass plates or suitable structured and unstructured thermostable plastic substrates.
  • the layer thicknesses of the applied films were measured with a surface profiler (Alpha-Step 500, KLA-Tencor).
  • the dielectric constant k was determined by measuring the capacitance C of a model plate capacitor. The following applies:
  • Capacitor made.
  • the mating contact on the layer was made by means of a sputtered gold electrode (diameter approx. 5 mm).
  • the capacitance was measured with an impedance spectrometer (EG&G 398).
  • the impedance Z of the model plate capacitor was determined in the range from 10-100000 Hz without bias voltage.
  • the capacitance C of the model capacitor results from the impedance Z according to:
  • the film was then 0.61 ⁇ m, the k value 2.7.

Abstract

L'invention concerne un procédé de production de couches diélectriques de faible constante diélectrique par traitement thermique d'un produit sol-gel d'un carbosilane multifonctionnel. L'invention concerne en outre les couches correspondantes et leur utilisation pour la fabrication de composants électroniques.
EP02804878A 2001-12-19 2002-12-06 Procede de production de couches dielectriques avec utilisation de carbosilane multifonctionnel Withdrawn EP1468446A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10162443 2001-12-19
DE10162443A DE10162443A1 (de) 2001-12-19 2001-12-19 Verfahren zur Herstellung von dielektrischen Schichten unter Verwendung multifunktioneller Carbosilane
PCT/EP2002/013834 WO2003052809A1 (fr) 2001-12-19 2002-12-06 Procede de production de couches dielectriques avec utilisation de carbosilane multifonctionnel

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EP1468446A1 true EP1468446A1 (fr) 2004-10-20

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US (1) US7090896B2 (fr)
EP (1) EP1468446A1 (fr)
JP (1) JP2005513777A (fr)
KR (1) KR20040068274A (fr)
CN (1) CN100336183C (fr)
AU (1) AU2002366351A1 (fr)
DE (1) DE10162443A1 (fr)
HK (1) HK1076918A1 (fr)
TW (1) TWI265964B (fr)
WO (1) WO2003052809A1 (fr)

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US7892648B2 (en) * 2005-01-21 2011-02-22 International Business Machines Corporation SiCOH dielectric material with improved toughness and improved Si-C bonding
JP5324734B2 (ja) * 2005-01-21 2013-10-23 インターナショナル・ビジネス・マシーンズ・コーポレーション 誘電体材料とその製造方法
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Publication number Publication date
TW200305618A (en) 2003-11-01
US20030181537A1 (en) 2003-09-25
JP2005513777A (ja) 2005-05-12
TWI265964B (en) 2006-11-11
AU2002366351A1 (en) 2003-06-30
DE10162443A1 (de) 2003-07-03
CN1605118A (zh) 2005-04-06
CN100336183C (zh) 2007-09-05
WO2003052809A1 (fr) 2003-06-26
US7090896B2 (en) 2006-08-15
KR20040068274A (ko) 2004-07-30
HK1076918A1 (en) 2006-01-27

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