EP1223622A3 - Semiconductor device and method for fabrication thereof - Google Patents

Semiconductor device and method for fabrication thereof Download PDF

Info

Publication number
EP1223622A3
EP1223622A3 EP01308381A EP01308381A EP1223622A3 EP 1223622 A3 EP1223622 A3 EP 1223622A3 EP 01308381 A EP01308381 A EP 01308381A EP 01308381 A EP01308381 A EP 01308381A EP 1223622 A3 EP1223622 A3 EP 1223622A3
Authority
EP
European Patent Office
Prior art keywords
electrode
ferroelectric film
ferroelectric
crystal structure
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01308381A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP1223622A2 (en
Inventor
Kenji c/o Fujitsu Limited Maruyama
Kazuaki c/o Fujitsu Limited Kurihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of EP1223622A2 publication Critical patent/EP1223622A2/en
Publication of EP1223622A3 publication Critical patent/EP1223622A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
EP01308381A 2001-01-11 2001-10-01 Semiconductor device and method for fabrication thereof Withdrawn EP1223622A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001004150A JP2002208678A (ja) 2001-01-11 2001-01-11 半導体装置及びその製造方法
JP2001004150 2001-01-11

Publications (2)

Publication Number Publication Date
EP1223622A2 EP1223622A2 (en) 2002-07-17
EP1223622A3 true EP1223622A3 (en) 2004-07-28

Family

ID=18872380

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01308381A Withdrawn EP1223622A3 (en) 2001-01-11 2001-10-01 Semiconductor device and method for fabrication thereof

Country Status (5)

Country Link
US (1) US20020090742A1 (ko)
EP (1) EP1223622A3 (ko)
JP (1) JP2002208678A (ko)
KR (1) KR100421506B1 (ko)
TW (1) TW504836B (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030075778A1 (en) * 1997-10-01 2003-04-24 Patrick Klersy Programmable resistance memory element and method for making same
KR100390845B1 (ko) * 2001-06-30 2003-07-12 주식회사 하이닉스반도체 반도체 소자의 강유전체 캐패시터 및 그 형성방법
CN100420024C (zh) 2003-06-06 2008-09-17 富士通株式会社 半导体器件的制造方法
JP4670612B2 (ja) * 2005-11-30 2011-04-13 Ｔｄｋ株式会社 誘電体素子とその製造方法
JP4802777B2 (ja) * 2006-03-13 2011-10-26 セイコーエプソン株式会社 半導体装置及びその製造方法
TW201738888A (zh) * 2016-04-18 2017-11-01 Univ Chang Gung 記憶體之結構
US20220181433A1 (en) * 2020-12-09 2022-06-09 Intel Corporation Capacitors with built-in electric fields

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0568064A2 (en) * 1992-05-01 1993-11-03 Texas Instruments Incorporated Pb/Bi-containing high-dielectric constant oxides using a non-Pb/Bi-containing perovskite as a buffer layer
US5781404A (en) * 1993-03-31 1998-07-14 Texas Instruments Incorporated Electrode interface for high-dielectric-constant materials
EP0920054A1 (en) * 1996-07-09 1999-06-02 Hitachi, Ltd. Semiconductor memory and method for manufacturing the same

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3106255B2 (ja) * 1991-08-16 2000-11-06 ローム株式会社 強誘電体デバイス
JP3435966B2 (ja) * 1996-03-13 2003-08-11 株式会社日立製作所 強誘電体素子とその製造方法
KR100247919B1 (ko) * 1996-12-31 2000-03-15 윤종용 강유전체막을구비한캐패시터
JP3087672B2 (ja) * 1997-01-07 2000-09-11 日本電気株式会社 薄膜キャパシタ
JPH10247664A (ja) * 1997-03-04 1998-09-14 Hitachi Ltd 半導体集積回路装置およびその製造方法
KR19980082687A (ko) * 1997-05-08 1998-12-05 김영환 다층 구조를 이용한 강유전체 캐패시터 및 그 제조 방법
WO1999025014A1 (fr) * 1997-11-10 1999-05-20 Hitachi, Ltd. Element dielectrique et mode de fabrication
JP3092659B2 (ja) * 1997-12-10 2000-09-25 日本電気株式会社 薄膜キャパシタ及びその製造方法
KR20000014388A (ko) * 1998-08-20 2000-03-15 윤종용 강유전체 메모리 커패시터 및 그 제조방법
JP3468706B2 (ja) * 1998-09-17 2003-11-17 富士通株式会社 半導体装置およびその製造方法
KR20010045568A (ko) * 1999-11-05 2001-06-05 윤종용 후속 열처리에 의한 결함생성이 억제되는 커패시터 제조방법
JP2001189430A (ja) * 1999-12-28 2001-07-10 Toshiba Corp 強誘電体キャパシタ
US6518609B1 (en) * 2000-08-31 2003-02-11 University Of Maryland Niobium or vanadium substituted strontium titanate barrier intermediate a silicon underlayer and a functional metal oxide film

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0568064A2 (en) * 1992-05-01 1993-11-03 Texas Instruments Incorporated Pb/Bi-containing high-dielectric constant oxides using a non-Pb/Bi-containing perovskite as a buffer layer
US5781404A (en) * 1993-03-31 1998-07-14 Texas Instruments Incorporated Electrode interface for high-dielectric-constant materials
EP0920054A1 (en) * 1996-07-09 1999-06-02 Hitachi, Ltd. Semiconductor memory and method for manufacturing the same

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
CHANG L H ET AL: "Single and multilayer ferroelectric PbZrxTi1-xO3 (PZT) on BaTiO3", THIN SOLID FILMS, ELSEVIER-SEQUOIA S.A. LAUSANNE, CH, vol. 303, no. 1-2, 15 July 1997 (1997-07-15), pages 94 - 100, XP004087618, ISSN: 0040-6090 *
INOUE N ET AL: "Low thermal-budget fabrication of sputtered-PZT capacitor on multilevel interconnects for embedded FeRAM", INTERNATIONAL ELECTRON DEVICES MEETING 2000. IEDM. TECHNICAL DIGEST. SAN FRANCISCO, CA, DEC. 10 - 13, 2000, NEW YORK, NY, IEEE, US, 10 December 2000 (2000-12-10), pages 797 - 800, XP000988943 *
SUK SHIN D ET AL: "Characteristics of Pt/SrTiO3/Pb(Zr0.52, Ti0.48)O3/SrTiO3/Si ferroelectric gate oxide structure", PREPARATION AND CHARACTERIZATION, ELSEVIER SEQUOIA, NL, vol. 354, no. 1-2, 8 October 1999 (1999-10-08), pages 251 - 255, XP004321418, ISSN: 0040-6090 *

Also Published As

Publication number Publication date
EP1223622A2 (en) 2002-07-17
US20020090742A1 (en) 2002-07-11
KR20020060563A (ko) 2002-07-18
JP2002208678A (ja) 2002-07-26
TW504836B (en) 2002-10-01
KR100421506B1 (ko) 2004-03-09

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