EP1117132A1 - Ferroelectric device and semiconductor device - Google Patents

Ferroelectric device and semiconductor device Download PDF

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Publication number
EP1117132A1
EP1117132A1 EP98943084A EP98943084A EP1117132A1 EP 1117132 A1 EP1117132 A1 EP 1117132A1 EP 98943084 A EP98943084 A EP 98943084A EP 98943084 A EP98943084 A EP 98943084A EP 1117132 A1 EP1117132 A1 EP 1117132A1
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Prior art keywords
ferroelectric
thin film
bottom electrode
layer
electrode
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EP98943084A
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German (de)
English (en)
French (fr)
Inventor
Tetsuo Fujiwara
Toshihide Nabatame
Takaaki Suzuki
Kazutoshi Higashiyama
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Hitachi Ltd
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Hitachi Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40111—Multistep manufacturing processes for data storage electrodes the electrodes comprising a layer which is used for its ferroelectric properties
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors

Definitions

  • the present invention relates to a ferroelectric capacitor. More particularly, the present invention relates to a ferroelectric capacitor suitable for a semiconductor device typified by a non-volatile ferroelectric memory (FeRAM), system LSI with a non-volatile memory, and DRAM which employs ferroelectrics as the capacitor.
  • FeRAM non-volatile ferroelectric memory
  • DRAM dynamic random access memory
  • the ferroelectric memory has been said to be an ideal memory because of its outstanding characteristic property that it has a high access speed comparable to that of DRAM and yet it is non-volatile and capable of operating with lower power consumption. It has a capacitor of ferroelectric material such as Pb(Zr x Ti 1-x )O 3 (PZT) and SrBi 2 Ta 2 O 3 (SBT) which are oxides with perovskite-type crystal structure, so that it records information by means of the direction of its remanent polarization.
  • PZT Pb(Zr x Ti 1-x )O 3
  • SBT SrBi 2 Ta 2 O 3
  • the ferroelectric oxide needs in its production a process of heat treatment for crystallization in an oxygen atmosphere which is carried out after its thin film has been formed. Consequently, the electrodes through which electrical signals are transmitted to the ferroelectric thin film as a capacitor is made of noble metal, such as Pt and Ir, which is chemically stable and resistant to oxidation and deterioration at high temperature during heat treatment.
  • noble metal such as Pt and Ir
  • Japanese Patent Laid-open No. Hei 9-102590 discloses a ferroelectric capacitor composed of PZT (for the ferroelectric thin film) and Pt (for the electrode).
  • the above-mentioned prior art technology pays no attention to the problem that the ferroelectrics deteriorates in polarizing characteristics due to hydrogen evolved in the process which is carried out after the capacitor has been formed.
  • This hydrogen is evolved in the step of passivation (to form insulating protective film) and in the step of packaging. It is known that hydrogen greatly deteriorates the polarizing characteristics of the ferroelectric capacitor.
  • the top electrode is made of platinum, hydrogen is decomposed into active hydrogen due to platinum's catalytic action. Active hydrogen reaches the interface between the top electrode and the ferroelectric thin film and combines with oxygen in the ferroelectric thin film. This results in an oxygen-poor degraded layer near the interface between the ferroelectric thin film and the electrode, and this layer greatly deteriorates the polarizing characteristics.
  • the above-mentioned prior art technology has both advantage and disadvantage. It protects the electrode material from oxidation during the heat treatment in an oxygen atmosphere to form an oxide of the ferroelectric material. On the other hand, it permits the constituting elements to diffuse from the ferroelectric oxide to the electrode material in the step of heat treatment.
  • the ferroelectric thin film lacks oxygen in the stage immediately after film forming and hence is in an unstable crystalline state. Therefore, it needs heat treatment for crystallization so as to supply oxygen which stabilizes the crystalline state. This heat treatment for crystallization should be carried out at about 500-800°C in order to provide a ferroelectric capacitor having the satisfactory polarizing characteristics.
  • ferroelectric oxide diffuses from the ferroelectric thin film to the bottom electrode, forming a deteriorated layer (or a small region with varied compositions) near the interface between the ferroelectric thin film and the bottom electrode.
  • a ferroelectric capacitor composed of PZT (for the ferroelectric thin film) and Pt (for the electrode) poses a problem that Pb in the PZT diffuses into Pt in the bottom electrode during heat treatment for crystallization, resulting in a Pb-poor degraded layer near the interface between the PZT film and the electrode.
  • This degraded layer deteriorates the initial polarizing characteristics of the ferroelectric capacitor and it also greatly deteriorates the polarizing characteristics after the ferroelectric capacitor polarizes and inverses repeatitiously that is a memory switching.
  • the present invention was completed in view of the foregoing. It is an object of the present invention to prevent the formation of the degraded layer in the ferroelectric thin film of the ferroelectric memory.
  • the first aspect of the present invention resides in a ferroelectric capacitor of the type having an top electrode, a ferroelectric thin film, and a bottom electrode, characterized in that said ferroelectric thin film is a perovskite-type oxide containing a metal element and said top electrode contains an intermetallic compound composed of said metal element and a noble metal.
  • the second aspect of the present invention resides in a ferroelectric capacitor of the type having an top electrode, a ferroelectric thin film, and a bottom electrode, characterized in that said ferroelectric thin film is a perovskite-type oxide containing a metal element and said top electrode and bottom electrode contain an intermetallic compound composed of said metal element and a noble metal.
  • the third aspect of the present invention resides in a ferroelectric capacitor of the type having an top electrode, a ferroelectric thin film, and a bottom electrode, characterized in that said ferroelectric thin film is a perovskite-type oxide containing a metal element, and at least either of said top electrode or said bottom electrode has a multilayer structure formed by sequentially laminating a layer containing an intermetallic compound composed of said metal element and a noble metal and a layer of said noble metal, the former being adjacent to the interface of the ferroelectric thin film.
  • the fourth aspect of the present invention resides in a ferroelectric capacitor of the type having a substrate, a buffer layer, a bottom electrode, and a ferroelectric thin film, which are sequentially laminated, characterized in that said buffer layer is made of a transition metal or a nitride thereof, said ferroelectric thin film is made of a perovskite-type oxide containing a metal element, and said bottom electrode contains an intermetallic compound composed of said metal element and a noble metal.
  • the fifth aspect of the present invention resides in a ferroelectric capacitor as defined above, in which said noble metal is Pt, said intermetallic compound is one which is composed of Pb and Pt, with the Pb content being 40 atom% or less, and said transition metal is Ti.
  • Fig. 15 is an equilibrium diagram of the Pt-Pb binary system. (from Metal Data Book compiled by the Japan Institute of Metals), 3 rd edition, p.580, published by Maruzen, 1993) This diagram shows that Pt does not dissolve in Pb in their equilibrium state. Therefore, as Pb is added to Pt, there occurs a two-phase structure composed of Pb-free Pt and an intermetallic compound Pt 3 Pb having the L1 2 type crystal structure. When the amount of Pb reaches 25 atom%, there occurs a single-phase structure of Pt 3 Pb. This is the intermetallic compound composed of Pt and Pb (with the Pb content being 40 atom% or less) mentioned in the present invention. The phase structure shown in the diagram of equilibrium state (Fig.
  • the intermetallic compound composed of Pt and Pb (with the Pb content 40 atom% or less) should also include the structure which is not shown in the diagram of equilibrium state.
  • said intermetallic compound will be as effective as the Pt 3 Pb intermetallic compound so long as it has the phase of crystal structure of face centered cubic lattice even though it has other crystal structure than that of L1 2 type.
  • the Pt-Pb intermetallic compound denotes an intermetallic compound composed of Pt and Pb, with the Pb content being 40 atom% or less.
  • the bottom electrode layer has the crystal structure of face centered cubic lattice, with its major orientation being (111) or (100) or (110).
  • both the ferroelectric thin film and the bottom electrode have the major orientation of (111) or (100) or (110).
  • the terms “strongly oriented”, “high orientation”, and “major orientation” has the same meaning in this specification.
  • the ferroelectric capacitor according to the present invention is characterized in that the bottom electrode is of multilayer structure, with the first layer being made of a metal having the face centered cubic lattice and the second layer being made of an alloy containing said metal and having the basic crystal structure of face centered cubic lattice, the first and second layers having lattice constants whose difference is 3.5% or less.
  • the ferroelectric capacitor should preferably be characterized in that at least either of the top electrode or the bottom electrode has the basic crystal structure of face centered cubic lattice, with the bottom electrode and the ferroelectric thin film having lattice constants whose difference is 1% or less.
  • the ferroelectric thin film has a thickness of 1000 ⁇ or less.
  • the top electrode is made the Pt-Pb intermetallic compound specified in the present invention.
  • the top electrode is formed after the ferroelectric thin film has undergone heat treatment for crystallization; therefore, the top electrode has no adverse effect on the ferroelectric thin film during heat treatment for crystallization.
  • the polarization of the ferroelectric capacitor is greatly affected by hydrogen which is evolved in the steps of passivation (to form insulating protective film) and packaging in the LSI manufacturing process. If the top electrode is made of platinum, platinum catalytically decomposes hydrogen into active hydrogen. And this active hydrogen reaches the interface between the top electrode and the ferroelectric thin film and combines with oxygen in the ferroelectric thin film.
  • the Pt-Pb intermetallic compound specified in the present invention is less capable of decomposing molecular hydrogen into active hydrogen. Therefore, the top electrode made of this intermetallic compound protects the ferroelectric thin film from being attached by active hydrogen.
  • the Pt 3 Pb intermetallic compound has a lattice constant close to that of PZT (or the ferroelectric thin film); therefore, the top electrode made of this intermetallic compound greatly reduces stress due to lattice distortion that occurs near the interface between the top electrode and the ferroelectric thin film.
  • the top electrode made of Pt-Pb intermetallic compound prevents Pb in PZT from diffusing into the electrode (and hence prevents a degraded layer from forming in PZT) during the heat treatment which is carried out after the top electrode has been made.
  • the Pr-Pb intermetallic compound should contain Pb in an amount of 50 atom% or less; otherwise, it has a low melting point and adversely affects the film shape after heat treatment. Owing to the above-mentioned effect, the top electrode made of the Pt-Pb intermetallic compound yields a ferroelectric capacitor which is superior in polarizing characteristics and is almost exempt from deterioration.
  • the ferroelectric thin film of perovskite-type oxide containing Pb (as represented by PZT) is held between electrodes made of the Pt-Pb intermetallic compound.
  • the ferroelectric thin film by sputtering, sol-gel method, or CVD on the lower electrode, which is formed on a substate.
  • the ferroelectric thin film is incomplete in crystallinity on account of insufficient oxygen.
  • it should undergo heat treatment for crystallization in an oxygen-containing atmosphere.
  • the temperature of this heat treatment varies depending on the ferroelectric substance. It ranges from about 600°C to about 800°C in the case of PZT. This high temperature region has never been experienced in the conventional silicon process.
  • the bottom electrode should be made of a substance superior in oxidation resistance.
  • the electrode is made of an alloy composed mainly of Pt in the present invention.
  • the bottom electrode made of the Pt-Pb intermetallic compound according to the present invention effectively prevents Pb from diffusing from PZT into the electrode and hence prevents the degraded layer from forming in the ferroelectric thin film.
  • the electrode made of pure platinum causes Pb to diffuse from PZT into the platinum electrode during heat treatment for crystallization, giving rise to a degraded layer of unstable composition in the ferroelectric thin film and aggravating the polarizing characteristics.
  • Diffusion of a metal element across different phases is causes by the chemical potential difference, which is a function of the difference in concentration of the diffusing element.
  • the driving force of diffusion is decreased if Pb is previously contained in the electrode into which diffusion proceeds so that the difference in Pb concentration is small between the PZT and the electrode.
  • the amount of Pb contained in the electrode should be 50 atom% or less. With a Pb content higher than this limit, the electrode has lower melting point and melts during heat treatment, producing an adverse effect on the smoothness and fine structure of the ferroelectric thin film.
  • the amount of element diffusion depends on temperature and time in addition to the driving force. Fortunately, the heat treatment for crystallization is completed in a short time (several minutes). This short time does not affect diffusion so long as the difference in Pb concentration is small between the PZT and the electrode as in the present invention.
  • the bottom electrode is made of the Pt-Pb intermetallic compound, there is only a small difference in lattice constant between the PZT and the bottom electrode. This contributes to high-quality ferroelectric film owing to reduction in stress induced by lattice distortion at the interface.
  • a conspicuous effect is produced when a Pt 3 Pb intermetallic compound of L1 2 crystal structure is used.
  • the L1 2 crystal structure is shown in Fig. 16. It is based on the face centered cubic (FCC) lattice with regular atom arrangement.
  • 101 denotes a Pt atom
  • 102 denotes a Pb atom
  • 105 denotes a Ti atom or Zr atom.
  • the Pt 3 Pb having the L1 2 type crystal structure as shown in Fig. 16 (center) has a lattice constant of 4.058 ⁇ according to P. Villars and L.D.Calvert, "Pearson's Handbook of Crystallographic Data for Intermetallic Phases" ASM International, (1991). This value is very close to the lattice constant of PZT of perovskite-type crystal structure shown in Fig. 16 (right), which is 4.036 ⁇ according to K. Kakegawa et al., Solid State Commun., 24, 769 (1977), rather than the lattice constant of 3.92 ⁇ of Pt of FCC shown in Fig. 16 (left). The difference in lattice constant is 0.55%.
  • the PZT thin film formed on the Pt 3 Pb has less lattice strain than that formed directly on Pt; therefore, it is of high quality with very little stress.
  • the difference in lattice constant between the bottom electrode and the PZT is 1% or less, the PZT is formed with orientation similar to that of the bottom electrode. In this case, it is apparent that the effect of preventing the diffusion of Pb (as mentioned above) can be obtained at the same time.
  • the PZT thin film with high orientation, free of interfacial stress and degraded layer, contributes to the ferroelectric capacitor with outstanding polarizing characteristics.
  • the ferroelectric thin film with orientation in order to obtain the outstanding polarizing characteristics, it is suitable to form the ferroelectric thin film with orientation.
  • This object is effectively achieved by forming the bottom electrode with orientation.
  • the Pt bottom electrode formed on a Ti or TiN buffer layer on a silicon single-crystal substrate tends to strongly orient in the (111) plane and the PZT also orients in the (111) plane under this influence.
  • the orientation of Pt in the (111) plane depends on the crystal structure and lattice constant of Pt and Ti.
  • the Pt-Pb intermetallic compound according to the present invention does not greatly differ from platinum in crystal structure and lattice constant; therefore, the bottom electrode made of it in place of platinum can be oriented mainly in the (111) plane when formed on the Ti buffer layer.
  • the difference in lattice constant between the Pt-Pb intermetallic compound and PZT is smaller than that between Pt and PZT. Therefore, the PZT formed on the bottom electrode of Pt-Pb which orients mainly in the (111) plane has higher orientation than the PZT formed on the bottom electrode of the Pt intermetallic compound.
  • a laminate is formed on a silicon single-crystal substrate from a Ti buffer layer, a first bottom electrode layer of Pt, a second bottom electrode layer of Pt-Pb intermetallic compound, and a PZT ferroelectric thin film.
  • the first bottom electrode layer of Pt certainly orients on the Ti buffer layer; therefore, the second bottom electrode of Pt-Pb intermetallic compound has a higher degree of orientation.
  • Epitaxial growth on the oriented bottom electrode yields high-quality ferroelectric thin film of PZT with high orientation and low stress at the interface. This leads to the outstanding polarizing characteristics.
  • the orientation of the Ti buffer layer does not transmit directly to the bottom electrode layer of Pt-Pb intermetallic compound or the first bottom electrode layer of Pt. Therefore, the bottom electrode does not have a high degree of orientation.
  • the PZT ferroelectric thin film does not highly orient and hence does not have the outstanding polarizing characteristics.
  • the bottom electrode is composed of layers of the crystal structure of face centered cubic lattice so as to achieve the desired orientation.
  • the PZT ferroelectric thin film can be formed with orientation.
  • the first layer is made of metal of face centered cubic lattice structure which certainly orients on the buffer layer.
  • the second layer has the function of preventing diffusion and reducing interfacial stress.
  • the second layer of the bottom electrode should be made of an alloy having the face centered cubic lattice structure or the crystal structure based on the face centered cubic lattice structure and also containing a metal element constituting the first layer of the bottom electrode. Moreover, the difference in lattice structure between the first layer and the second layer should be 3.5% or less. These conditions are necessary for the electrode as a whole to have a high degree of orientation and for the ferroelectric thin film to have a high degree of orientation. In addition, if the difference in lattice constant between the ferroelectric thin film and the bottom electrode is 1% or less, the orientation of the ferroelectric thin film is enhanced under the influence of the oriented atom arrangement in the bottom electrode. In this case, there is only small strain in the interface between the bottom electrode and the ferroelectric thin film, and this effectively prevents deterioration due to repeated polarization and inversion.
  • the present invention provides a ferroelectric capacitor which has a high degree of polarization and resists deterioration by repeatitious switching.
  • Fig. 1 is a sectional view of the ferroelectric capacitor in one example of the present invention.
  • Fig. 2 is a diagram showing how the ferroelectric capacitor in one example of the present invention deteriorates in polarization due to reducing heat treatment differently depending of the top electrode.
  • Fig. 3 is a diagram showing how the ferroelectric capacitor in one example of the present invention varies in hysteresis curve depending on the temperature of the reducing heat treatment.
  • Fig. 4 is a diagram showing how the remanent polarization value before and after the reducing heat treatment varies depending on the Pb composition of the top electrode.
  • Fig. 5 is a diagram showing how the value of coercive electric field in one example of the present invention depends on the Pb composition of the top electrode.
  • Fig. 6 is a diagram showing how the film fatigue characteristics in one example of the present invention depends on the top electrode.
  • Fig. 7 is a hysteresis curve before and after the fatigue test in one example of the present invention.
  • Fig. 8 is a diagram showing the XRD diffraction pattern in one example of the present invention.
  • Fig. 9 is a sectional view of the ferroelectric capacitor in one example of the present invention.
  • Fig. 10 is a diagram showing the XRD diffraction pattern in one example of the present invention.
  • Fig. 11 is a diagram showing the lattice constant of the bottom electrode in one example of the present invention.
  • Fig. 12 is a schematic diagram showing the atom arrangement of the bottom electrode and ferroelectric thin film of the ferroelectric capacitor in one example of the present invention.
  • Fig. 13 is a sectional view of the ferroelectric capacitor in one example of the present invention.
  • Fig. 14 is a sectional view of the ferroelectric capacitor in one example of the present invention.
  • Fig. 15 is a phase diagram of equilibrium state of the Pt-Pb binary system.
  • Fig. 16 is a diagram showing the crystal structure of Pt, Pt 3 Pb, and PZT.
  • Fig. 17 is a sectional view of ferroelectric memory in one example of the present invention.
  • Fig. 18 is a schematic diagram showing the semiconductor device in one example of the present invention.
  • Fig. 19 a conceptual diagram showing the system LSI in one example of the present invention.
  • Fig. 20 a conceptual diagram showing a contactless IC card in one example of the present invention.
  • Fig. 1 is a schematic sectional view of the capacitor of the ferroelectric capacitor according to the present invention.
  • the substrate 11 is a silicon wafer substrate having an SiO 2 layer formed by thermal oxidation.
  • the buffer layer 15 is a Ti layer (200 ⁇ thick) formed by sputtering, with the substrate heated at 300°C.
  • the bottom electrode 26 is a Pt layer (1700 ⁇ thick) formed by sputtering, with the substrate heated at 300°C.
  • the ferroelectric thin film 30 is a thin film (ca. 2500 ⁇ thick) formed by sputtering from PZT having a composition of Pb(Zr 0.52 Ti 0.48 )O 3 , with the substrate heated at 300°C.
  • the substrate with deposited layers undergoes heat treatment for crystallization. This heat treatment is rapid thermal annealing (RTA) at 650°C for 2 minutes in an atmosphere with a low oxygen concentration. It was found by X-ray diffraction that the resulting PZT film is highly oriented mostly in the (111) plane.
  • RTA rapid thermal annealing
  • the top electrode 25 is formed by sputtering from the Pt-Pb intermetallic compound specified in the present invention. Sputtering was carried out using a binary sputtering apparatus capable of manipulating two targets of Pt and Pb simultaneously and controlling the sputtering speeds independently for the respective targets.
  • the top electrode 25 is 1700 ⁇ thick.
  • Several top electrodes were prepared which vary in the Pb composition from 0 atom% to 40 atom% in order to find a range of Pb composition which is most effective in preventing deterioration due to hydrogen reduction. While the top electrode is being formed, the substrate was kept at room temperature or 300°C.
  • the resulting top electrode film contains the phase of Pt 3 Pb intermetallic compound if Pb accounts for at least 10% in the Pb composition. (This was confirmed by XRD.)
  • the second annealing oxygen heat treatment
  • the ferroelectric capacitor was examined for hysteresis curve (or polarization-voltage curve).
  • Fig. 2 is a diagram showing how the value of remanent polarization varies depending on the temperature of reducing heat treatment in the case where the upper layer is made of Pt, Pt-25 atom% Pb, and Pt-40 atom% Pb.
  • the value of remanent polarization decreases when the temperature of reducing heat treatment exceeds 150°C, and it becomes almost null (or ferroelectric characteristics disappear) when the temperature of reducing heat treatment exceeds 300°C.
  • the top electrode made of Pt-25 atom% Pb or Pt-40 atom% Pb the polarizing characteristics remain almost intact even when the temperature of reducing heat treatment exceeds 350°C.
  • Fig. 3 shows the hysteresis curves of the three top electrodes mentioned above.
  • the top electrode of Pt in comparative example gives an almost straight line after heat treatment at 300°C, as shown in Fig. 3 (left).
  • the top electrode of Pt-25 atom% Pb or Pt-40 atom% Pb does not greatly change in hysteresis characteristics after heat treatment at 300°C, as shown in Fig. 3 (middle and right). This result suggests that the top electrode of Pt-Pb according to the present invention is less subject to the platinum's catalytic action.
  • Fig. 4 shows the relation between the remanent polarization after reducing heat treatment at 250°C for 10 minutes and the Pb composition of the top electrode made of Pt-Pb.
  • the ordinate represents the normalized value of the remanent polarization determined before the top electrode undergoes reducing heat treatment. It is noted that hydrogen deterioration decreases as the amount of Pb increases in the Pt-Pb for the top electrode. The effect is conspicuous when the content of Pb is 10% or more. It is concluded, therefore, that the content of Pb in the Pt-Pb top electrode should preferably be 10% or more from the standpoint of resistance to reduction.
  • Fig. 5 shows how the ferroelectric capacitor in one example of the present invention varies in coercive electric field (Ec) depending on the Pb composition of the Pt-Pb top electrode.
  • Ec coercive electric field
  • the Pt-Pb top electrode in this example does not greatly vary in coercive electric field even though its Pb content increases; it keeps an adequate value for memory driving.
  • the ⁇ mark denotes the value after oxygen treatment carried out to remove damages
  • the ⁇ mark denotes the value after reducing heat treatment in an atmosphere of He-3%H at 250°C for 10 minutes.
  • Fig. 6 shows the result of evaluation of the fatigue characteristics of the ferroelectric capacitor in this example. The evaluation was carried out by switching cycles (5V, 500 kHz), and the remanent polarization Pr were observed.
  • the ⁇ mark denotes the result of the Pt-25 atom% Pb (Pt 3 Pb) top electrode in this example
  • the ⁇ mark denotes the result of the Pt top electrode in comparative example. It is noted that as compared with the comparative sample, the sample in this example is less liable to deterioration in polarization characteristics due to repeated polarization and inversion and hence has better film fatigue characteristics.
  • Fig. 7 shows the hysteresis curve before and after the fatigue test.
  • the value of remanent polarization decreases by nearly half after 10 10 switching cycles.
  • the value of remanent polarization decreases only a little after 10 10 switching cycles. This results from decrease in strain in the interface between Pt 3 Pb and PZT. To show this, XRD analysis was conducted.
  • Fig. 8 is the result of XRD analysis of the ferroelectric capacitor in this example.
  • the diagram (1) represents the result obtained after the top electrode of Pt-25 atom% Pb had been formed.
  • the diagram (2) represents the result obtained after oxygen treatment at 650°C.
  • the top electrode analyzed is made of Pt 3 Pb intermetallic compound and is formed on the PZT highly orienting in the (111) plane. It orients mainly in the (111) plane.
  • the results of XRD analysis give peaks due to (111) and (222) corresponding to the lattice constant of 4.04 ⁇ and peaks due to (111) and (222) corresponding to the lattice constant of 3.91 ⁇ .
  • the former represents PZT and Pt 3 Pb, which have almost the same lattice constant.
  • the latter represents Pt constituting the bottom electrode.
  • the top electrode of Pt 3 Pb has good lattice matching with PZT.
  • most part of the top electrode retains the lattice constant and orientation of Pt 3 Pb.
  • the fact that there is very little difference in lattice constant between the Pt 3 Pb top electrode and the PZT leads to reduction in strain in the interface (due to good matching) and improvement in film fatigue characteristics.
  • the top electrode made of Pt-Pb intermetallic compound is scarcely subject to deterioration by hydrogen and hence contributes to the ferroelectric capacitor superior in film fatigue characteristics.
  • sputtering As the method of forming the PZT film. Any other method than sputtering may be employed. For example, it is possible to use spin coating, spraying, misting, MOCVD, MBE, or laser vapor deposition (in which the raw material may be an organometallic compound or an acetate).
  • the dual sputtering that employs two targets of Pt and Pb as the method of forming the layer of Pt-Pb intermetallic compound.
  • Any other method than this may be employed.
  • Another alternative method is implantation of Pb ions in a high vacuum after or during the formation of the Pt layer or ion-beam deposition which directly laminates Pt ions and Pb ions in a high vacuum.
  • Fig. 9 is a schematic sectional view of the ferroelectric capacitor in this example.
  • the substrate 11 and the buffer layer 15 are the same as those in Example 1. That is, the substrate 11 is a silicon wafer substrate having an SiO 2 layer formed by thermal oxidation.
  • the buffer layer 15 is a Ti layer (200 ⁇ thick) formed by sputtering, with the substrate heated at 300°C.
  • the bottom electrode 16 is of double layer structure, consisting of a first layer 21 of Pt and a second layer 21 of Pt 3 Pb intermetallic compound having the composition of Pt-25 atom% Pb.
  • the first layer 21 (1000 ⁇ thick) of the bottom electrode was formed by sputtering, with the substrate heated at 300°C.
  • the second layer 23 (1000 ⁇ thick) of the bottom electrode was formed by sputtering, with the substrate heated at 300°C. Sputtering was carried out using a dual sputtering apparatus capable of manipulating two targets of Pt and Pb simultaneously and controlling the sputtering speeds independently for the respective targets.
  • the ferroelectric thin film 30 is a thin film (ca. 1000 ⁇ thick) formed by sputtering from PZT having a composition of Pb(Zr 0.52 Ti 0.48 )O 3 , with the substrate kept at room temperature.
  • the substrate with deposited layers underwent heat treatment for crystallization. This heat treatment is rapid thermal annealing (RTA) at 650°C for 2 minutes in an atmosphere with a low oxygen concentration.
  • RTA rapid thermal annealing
  • the top electrode 17 of double layer structure was formed. It is composed of a first layer 40 (adjacent to the ferroelectric layer) and a second layer 44.
  • the first layer 40 (1000 ⁇ thick) of the top electrode was formed from Pt 3 Pb in the same way as used for the second layer 23 of the bottom electrode.
  • the second layer 44 (1000 ⁇ ) was formed from Pt by sputtering in the same way as used for the first layer 21 of the bottom electrode.
  • Fig. 10 is the result of XRD analysis of the ferroelectric capacitor in this example.
  • the XRD analysis was carried out before the ferroelectric thin film 30 was formed or in the stage in which the second layer of the bottom electrode had been formed from Pt 3 Pb intermetallic compound. It is noted that the layer of Pt 3 Pb is strongly oriented in the (111) plane under the influence of the layer of Pt which orients mainly in the (111) plane.
  • the lattice constant of Pt 3 Pb is 4.03-4.04 ⁇ and the lattice constant of Pt is 3.91 ⁇ .
  • Fig. 11 shows the lattice constant of the second layer 23 of the bottom electrode, with the Pb content varied.
  • the second layer 23 of the bottom electrode which is a layer of Pt 3 Pb intermetallic compound, has a lattice constant which is larger than that of the first layer 21 of the bottom electrode, which is a layer of Pt.
  • the lattice constant of the former is close to that of the ferroelectric thin film of PZT.
  • the lattice constant of the second layer 23 of the bottom electrode or the layer of Pt 3 Pb intermetallic compound is indicated by the mark ⁇ if the layer is formed at room temperature and by the mark ⁇ if the layer is formed at 300°C.
  • the lattice constant of the first layer 21 of the bottom electrode or the layer of Pt is indicated by the mark ⁇ if the layer is formed at room temperature and by the mark ⁇ if the layer is formed at 300°C.
  • the hatched area in Fig. 11 denotes the values of lattice constant of the ferroelectric thin film of PZT.
  • the sample was analyzed by X-ray diffractometry. It was found that the ferroelectric layer of PZT strongly orients in the (111) plane and has a lattice constant of 4.04 ⁇ .
  • Fig. 12 is a schematic diagram showing the atom arrangement of the bottom electrode and ferroelectric thin film. All of the first layer (Pt) of the bottom electrode, the second layer (Pt 3 Pb) of the bottom electrode, and the ferroelectric thin film of PZT strongly orient in the (111) plane, so that they take on the atom arrangement as shown in Fig. 12.
  • the atom arrangement in each layer in the (111) plane is schematically shown.
  • 110 represents an oxygen atom
  • 102 represents a Pb atom
  • 101 represents a Pt atom.
  • Pt, Pt 3 Pb, and PZT have a lattice constant of 3.91 ⁇ , 4.04 ⁇ , and 4.04 ⁇ , respectively. Therefore, they has a closest interatomic distance of 2.76 ⁇ , 2.85 ⁇ , and 2.85 ⁇ , respectively, in the (111) plane. Since the difference in lattice constant between Pt and PZT is about 3.9%, a stress due to this difference occurs in the interface if PZT is formed directly on the bottom electrode of Pt. This stress in the interface is a cause for deterioration of the ferroelectric characteristics. On the other hand, there is substantially no difference in lattice constant between Pt 3 Pb and PZT; therefore, no stress occurs in the interface if the electrode in direct contact with PZT is formed from Pt 3 Pb as in this example.
  • the first layer of the top electrode is formed from Pt 3 Pb, it is possible to prevent the polarizing characteristics from being deteriorated by hydrogen, as demonstrated in Example 1.
  • the fact that the lattice strain is relieved in the upper and lower interfaces of the ferroelectric thin film greatly improves the fatigue characteristics, as in the case of Example 1.
  • the top electrode is bi-layer structure, with the first layer being Pt 3 Pb, the second layer being Pt.
  • Forming the second layer of the top electrode from Pt produces the following effect.
  • the top electrode is formed by etching after the film for the top electrode has been formed. During etching, the film of Pt 3 Pb may be degraded and contact between the top electrode and wiring may be deteriorated by halogen gas and resist material used for etching.
  • the second layer of the top electrode formed from Pt protects Pt 3 Pb and prevents the film morphology from being deteriorated in the etching step and the ashing step that follows resist removal.
  • the second layer of the top electrode is formed from Pt; however, it may also be formed from any of W, Ta, Ir, Ru, Pd, Ni, and Cu, with the effect remaining the same.
  • This Pt 3 Pb prevents Pb from diffusing from PZT to the electrode during heat treatment for PZT crystallization. Owing to the effect of preventing Pb diffusion, together with the above-mentioned effects of reducing strain in the interface and producing strong orientation, it is possible to prevent a degraded layer from occurring near the interface of the electrode. (This degraded layer is a cause for deterioration of polarizing characteristics.) For this reason, the ferroelectric layer of PZT can be made as thin as 800 ⁇ in this example. This thin ferroelectric layer of PZT permits memory to be driven at a lower voltage. In addition, the effect of preventing deterioration by hydrogen reduction protects the characteristics from being deteriorated in the interconnect process which evolves hydrogen. Therefore, the ferroelectric capacitor can be mounted on the logic having the multilevel interconnects structure.
  • the ferroelectric capacitor in this example retains a low value of coercive electric field (Ec) and the a large value of remanent polarization (Pr), which is less subject to deterioration by processing.
  • the ferroelectric capacitor helps to realize memory that can be driven at a low voltage.
  • the ferroelectric capacitor scarcely decreases in Pr even after switching cycles.
  • the ferroelectric capacitor part mentioned above can be used as non-volatile ferroelectric memory. It can also be used as DRAM capacitor that utilizes the high dielectric characteristic.
  • Fig. 13 is a sectional view of the ferroelectric capacitor in this example. It is composed of an top electrode 25, a ferroelectric thin film 30, a bottom electrode 20, a buffer layer 15, and a substrate 11.
  • the substrate 11 is a silicon wafer substrate having an SiO 2 layer formed by thermal oxidation.
  • the buffer layer 15 is a Ti layer (200 ⁇ thick) formed by sputtering, with the substrate heated at 300°C.
  • the bottom electrode 20 which is a thin film (1000 ⁇ thick) of Pt-Pb intermetallic compound.
  • This sputtering employs a sintered body of Pt-15 atom% Pb as the target.
  • the substrate was heated at 300°C.
  • the results of X-ray diffractometry indicate that the thin film of Pt-Pb intermetallic compound has the face centered cubic structure, with a lattice constant of 4.04 ⁇ , and strongly orients in the (111) plane.
  • the ferroelectric thin film 30 is a thin film (ca. 1200 ⁇ thick) formed by sputtering from PZT having a composition of Pb(Zr 0.52 Ti 0.48 )O 3 , with the substrate kept in the range from room temperature to 450°C.
  • the substrate with deposited layers underwent heat treatment for crystallization. This heat treatment is rapid thermal annealing (RTA) at 650°C for 2 minutes in an atmosphere of oxygen.
  • RTA rapid thermal annealing
  • the top electrode 25 (1000 ⁇ thick) was formed from Pt-Pb intermetallic compound in the same way as for the bottom electrode 20.
  • the resulting ferroelectric capacitor was examined by TEM-EDX analysis, SIMS analysis, and ICP analysis. It was found that there is very little diffusion of Pb from the PZT thin film into the upper and bottom electrodes. It was also found that the PZT film has the desired composition and the PZT film is free from degraded layer. It was also found that the upper and bottom electrodes are formed from the intermetallic compound of Pt 3 Pb having the L1 2 crystal structure. In this example, both the top electrode layer and the bottom electrode layer are entirely composed of the intermetallic compound. However, there may be an instance in which crystalline particles of intermetallic compound exist in part of the electrode layer. The same effect as mentioned above is also produced in this instance. Therefore, this instance is also within the scope of the present invention.
  • the results of X-ray diffractometry indicate that the PZT thin film strongly orients in the (111) plane.
  • the reason for this is that the bottom electrode orients in the (111) plane and its lattice constant is close to that of PZT, so that epitaxial growth occurs.
  • the lattice constant of the intermetallic compound (Pt 3 Pb) obtained by X-ray diffractometry (peak positions) and electron beam diffraction is larger than that of Pt alone; it is very close to that of PZT. This is evidenced by the fact that lattice strain is relieved in the interface of the bottom electrode and stress in the interface is suppressed.
  • the top electrode is made of the intermetallic compound of Pt 3 Pb, the ferroelectric capacitor has a small stress in the interface of the top electrode and has good hydrogen resistance characteristics which is an issue when the protective insulating film is formed afterwards.
  • the ferroelectric capacitor in this example retains a low level of coercive electric field (Ec) and keeps a high level of remanent polarization (Pr). It scarcely decreases in Pr even after switching cycles.
  • Fig. 14 is a sectional view of the ferroelectric capacitor in this example.
  • the substrate 11 and the buffer layer 15 are the same as those in Examples 1 to 3.
  • the buffer layer is formed first, and then the Pt layer (1000 ⁇ thick) is formed in the same as in Example 2. Subsequently, the Pb layer (100 ⁇ thick) is formed by sputtering.
  • the PZT film (1200 ⁇ thick) is formed in the same way as in Example 1.
  • heat treatment (RTA) for crystallization is carried out in oxygen at 650°C for 2 minutes.
  • the substrate is kept at a constant temperature of 300°C.
  • Pb diffuses into the Pt layer.
  • the bottom electrode 16 of double layer structure is formed as shown in Fig. 14. It is composed of a first layer 21 of Pt and a second layer 23 of Pt 3 Pb intermetallic compound. Then, the top electrode 27, which is a Pt layer (1000 ⁇ thick), is formed by sputtering. Thus there is obtained the desired ferroelectric capacitor.
  • the sample was examined by X-ray diffractometry. It was found that they strongly orient in the (111) plane. This is because the Pt layer orients under the influence of the orientation of the Ti buffer layer 15 and the Pt layer was formed directly on the Ti buffer layer without an interlayer between them. If there exists an interlayer of another substance between the Ti buffer layer and the Pt layer, then both the bottom electrode 16 and the ferroelectric 30 will not strongly orient.
  • the ferroelectric capacitor in this example retains a low level of coercive electric field (Ec) and keeps a high level of remanent polarization (Pr). It scarcely decreases in Pr even after switching cycles.
  • Fig. 17 is a schematic sectional view of the ferroelectric memory cell in this example.
  • This memory cell is produced in the following manner.
  • a silicon substrate 61 On a silicon substrate 61 are formed a source 67 and a drain 68.
  • an SiO 2 layer 62 (250 ⁇ thick) by oxidation.
  • a convex SiO 2 film At the center of the substrate is formed a convex SiO 2 film by patterning through a mask.
  • a polycrystalline silicon layer On this SiO 2 film is formed a polycrystalline silicon layer (4500 ⁇ thick) by CVD.
  • On the entire surface is formed an SiO 2 layer 62 (250 ⁇ thick) by oxidation.
  • the capacitor corresponding to this semiconductor MOS is formed in the following manner. First, a Ti buffer layer 15 (2000 ⁇ thick) is formed by heating at 300°C.
  • the drain 68 is connected to the top electrode of Pt 3 Pb through a conductor 171 of aluminum or the like. (This is schematically shown in Fig. 17.) In some case, the drain 68 may be connected to the bottom electrode of Pt 3 Pb through a conductor 171 of aluminum or the like. In this way, there is formed the ferroelectric memory cell of so-called 1-MOS 1-capacitor type.
  • the thus obtained ferroelectric memory cell gives the remanent polarization, with polarity in the direction of voltage application, when a voltage greater than the coercive electric field is applied from the upper (or lower) electrode to the lower (or upper) electrode of the ferroelectric capacitor. If the direction of the remanent polarization is made to correspond to the state of "0" or "1", it is possible to perform writing to the memory. Also, it is possible to read out "1" or "0” by detecting the change in capacity of accumulated charge as the hysteresis characteristics of ferroelectric that is obtained by application of a voltage greater than coercive electric field.
  • the ferroelectric memory cell has the capacitor part in which the electrode is made of specific materials of the present invention. Therefore, the ferroelectric memory cell has a high level of polarization and deteriorates very little after repeated use.
  • the ferroelectric capacitor is used as the capacitor of a semiconductor MOS.
  • the same effect as mentioned above will be produced also in the ferroelectric memory constructed such that the ferroelectric capacitor is formed on the gate of a semiconductor field effect transistor.
  • Fig. 18 is a schematic diagram showing the semiconductor device provided with the ferroelectric memory cell in this example.
  • the semiconductor device has the ferroelectric capacitors (shown in Example 1) arranged two-dimensionally such that the bottom electrodes 73a, 73b, 74c, ... and the top electrodes 71a, 71b, 71c, ... intersect at right angles.
  • each capacitor is composed the upper and bottom electrodes of Pt-Pb intermetallic compound and the ferroelectric thin film 75 of PZT.
  • a Ti buffer layer 77 is formed between the substrate 79 and the bottom electrodes 73a, 73b, ...
  • one cell is selected by selecting one from the top electrodes and one from the bottom electrodes by means of the access circuit.
  • One transistor (not shown) near the capacitor is driven so as to apply a voltage for writing or reading.
  • the memory cell functions in this way.
  • Fig. 19 a conceptual diagram showing the system LSI provided with the ferroelectric memory cell in this example.
  • One-chip logic is composed of an external interface 301, a CPU 302, and a ferroelectric memory 303.
  • the CPU 302 is composed of an address unit 305, an execution unit 306, an order unit 307, and a bass unit 308.
  • the CPU 302 exchanges information with the ferroelectric memory 303 through the bass unit 308.
  • the system LSI exchanges data with an external information machine (not shown) through the external interface 301. Date communications may be accomplished through interconnects or by electric wave or infrared rays without interconnects.
  • the ferroelectric memory 303 used to need a ROM (to store programs) and a RAM (to write and read data randomly).
  • the ROM is EPROM and the RAM is DRAM. In other words, more than one kind of memory is required.
  • the ferroelectric memory 303 alone constitutes the necessary unit.
  • the ferroelectric memory is non-volatile and is capable of high-speed writing and reading. Therefore, it functions as both ROM and RAM. Constituting the memory unit with the ferroelectric memory alone makes it possible to allocate the region for ROM and RAM as desired.
  • This ferroelectric memory element has the capacitor structure as shown in Example 1. It has the top electrode of Pt 3 Pb; therefore, it is scarcely subject to deterioration by hydrogen and is superior in film fatigue characteristics. Even though interconnect process is repeated twice or more after the ferroelectric capacitor has been formed, the resulting the ferroelectric memory in system LSI does not deteriorate in polarizing characteristics.
  • Fig. 20 a conceptual diagram showing a contactless type IC card provided with the ferroelectric memory cell in this example.
  • the contact type IC card 201 is composed of a transmitting and receiving device 202, a microcomputer chip with built-in memory 204, and an antenna coil 205.
  • the antenna coil 205 receives electric waves (containing date 207) sent from an external data conversion unit 203.
  • the received electric waves are converted into a voltage, which in turn drives the microcomputer chip 204 through the transmitting and receiving unit 202.
  • the data 207 is sent to the external data conversion unit 203 in the opposite direction.
  • the microcomputer chip 204 is provided with the ferroelectric memory unit 206 of the present invention.
  • the ferroelectric memory element 206 is one in which the ferroelectric thin film of PZT has a thickness of 1000 ⁇ or less, so that it can be driven at a lower voltage.
  • the top electrode is made of Pt-Pb intermetallic compound, it is possible to protect PZT from being deteriorated by hydrogen. Therefore, it is possible to provide ferroelectric memory which is not subject to deterioration in polarizing characteristics. It is also possible to provide ferroelectric memory which has a low strain in the interface between the PZT and the electrode and which is less subject to deterioration due to repeated polarization and inversion. Also, if the bottom electrode is made of Pt-Pb intermetallic compound, it is possible to greatly reduce the diffusion of Pb from PZT to the electrode and hence it is possible to prevent the formation of a degraded layer in the ferroelectric thin film.
  • the present invention it is possible to prevent the formation of a degraded layer in the ferroelectric thin film of the ferroelectric memory. Also, according to the present invention, it is possible to provide an electrode material which lowers stress in the interface between the ferroelectric thin film and the electrode. Further, according to the present invention, it is possible to produce a ferroelectric memory which has a high level of polarization and is less vulnerable to deterioration due to repeated use.
  • the present invention can be applied to ferroelectric memory, particularly non-volatile ferroelectric memory (FeRAM), system LSI provided with non-volatile memory, semiconductor device typified by DRAM in which the ferroelectric is used as the capacitor, and electronic machines and equipment, such as IC card, which is provided with said devices.
  • FeRAM non-volatile ferroelectric memory
  • system LSI provided with non-volatile memory
  • semiconductor device typified by DRAM in which the ferroelectric is used as the capacitor
  • electronic machines and equipment such as IC card

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EP98943084A 1998-09-22 1998-09-22 Ferroelectric device and semiconductor device Withdrawn EP1117132A1 (en)

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FR2914492A1 (fr) * 2007-03-27 2008-10-03 Soitec Silicon On Insulator Procede de fabrication de structures avec couches ferroelectriques reportees.

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