DE69934975D1 - Verfahren zur Herstellung von Kondensatorelementen auf einem Halbleitersubstrat - Google Patents
Verfahren zur Herstellung von Kondensatorelementen auf einem HalbleitersubstratInfo
- Publication number
- DE69934975D1 DE69934975D1 DE69934975T DE69934975T DE69934975D1 DE 69934975 D1 DE69934975 D1 DE 69934975D1 DE 69934975 T DE69934975 T DE 69934975T DE 69934975 T DE69934975 T DE 69934975T DE 69934975 D1 DE69934975 D1 DE 69934975D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor substrate
- capacitor elements
- producing capacitor
- producing
- elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/7681—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving one or more buried masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP99830492A EP1073101B1 (de) | 1999-07-30 | 1999-07-30 | Verfahren zur Herstellung von Kondensatorelementen auf einem Halbleitersubstrat |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69934975D1 true DE69934975D1 (de) | 2007-03-15 |
DE69934975T2 DE69934975T2 (de) | 2007-12-06 |
Family
ID=8243528
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69934975T Expired - Lifetime DE69934975T2 (de) | 1999-07-30 | 1999-07-30 | Verfahren zur Herstellung von Kondensatorelementen auf einem Halbleitersubstrat |
Country Status (4)
Country | Link |
---|---|
US (1) | US6503823B1 (de) |
EP (1) | EP1073101B1 (de) |
JP (1) | JP2001053229A (de) |
DE (1) | DE69934975T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6803306B2 (en) * | 2001-01-04 | 2004-10-12 | Broadcom Corporation | High density metal capacitor using via etch stopping layer as field dielectric in dual-damascence interconnect process |
US20030006480A1 (en) * | 2001-06-29 | 2003-01-09 | Jenny Lian | MIMCap with high dielectric constant insulator |
US8240217B2 (en) * | 2007-10-15 | 2012-08-14 | Kavlico Corporation | Diaphragm isolation forming through subtractive etching |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5219787A (en) * | 1990-07-23 | 1993-06-15 | Microelectronics And Computer Technology Corporation | Trenching techniques for forming channels, vias and components in substrates |
JPH06204404A (ja) * | 1992-12-28 | 1994-07-22 | Hitachi Ltd | 半導体装置、並びに容量素子およびその製造方法 |
US5508881A (en) * | 1994-02-01 | 1996-04-16 | Quality Microcircuits Corporation | Capacitors and interconnect lines for use with integrated circuits |
US5708559A (en) * | 1995-10-27 | 1998-01-13 | International Business Machines Corporation | Precision analog metal-metal capacitor |
JPH09306988A (ja) * | 1996-03-13 | 1997-11-28 | Sony Corp | 多層配線の形成方法 |
JPH11168200A (ja) * | 1997-10-01 | 1999-06-22 | Mitsubishi Electric Corp | キャパシタを有する半導体装置およびその製造方法 |
US6242299B1 (en) * | 1999-04-01 | 2001-06-05 | Ramtron International Corporation | Barrier layer to protect a ferroelectric capacitor after contact has been made to the capacitor electrode |
-
1999
- 1999-07-30 DE DE69934975T patent/DE69934975T2/de not_active Expired - Lifetime
- 1999-07-30 EP EP99830492A patent/EP1073101B1/de not_active Expired - Lifetime
-
2000
- 2000-07-26 US US09/626,005 patent/US6503823B1/en not_active Expired - Lifetime
- 2000-07-26 JP JP2000225509A patent/JP2001053229A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2001053229A (ja) | 2001-02-23 |
EP1073101A1 (de) | 2001-01-31 |
DE69934975T2 (de) | 2007-12-06 |
US6503823B1 (en) | 2003-01-07 |
EP1073101B1 (de) | 2007-01-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |